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由 Fugang Duan 提交于
imx6sl fec MDIO clock source is from ipg 66Mhz, but the currect imx6sl device tree define it as "enet_ref" clock (50Mhz), so the patch just corrects imx6sl dtsi fec "ipg" clock. Signed-off-by: NFugang Duan <B38611@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
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