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由 Vivek Gautam 提交于
Adding required gate clocks for USB3.0 DRD controller present on Exynos7. Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com> Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
83f191a7
Adding required gate clocks for USB3.0 DRD controller present on Exynos7. Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com> Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>