• V
    drm/i915: Fix eDP link training when switching pipes on VLV/CHV · 7b713f50
    Ville Syrjälä 提交于
    When switching from one pipe to another, the power sequencer of the new
    pipe seems to need a bit of kicking to lock into the port. Even the vdd
    force bit doesn't work before the power sequencer has been sufficiently
    kicked, so this must be done before any AUX transactions are attempted.
    
    After extensive experimentation I've determined that it's sufficient
    to first write the port register with the correct values except the
    port must remain disabled, then we can do a second write to enable the
    port, after which the power sequencer is operational and allows the port
    to start up properly.
    
    Contrary to my earlier theories we don't need to enable the port with
    the idle pattern, so let's just use training pattern 1 as that's what
    other platforms use here.
    
    v2: Refine the kick procedure
    Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: NImre Deak <imre.deak@intel.com>
    Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    7b713f50
intel_dp.c 151.0 KB