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    drm/i915: Flush TLBs before releasing backing store · 7938d615
    Tvrtko Ursulin 提交于
    We need to flush TLBs before releasing backing store otherwise userspace
    is able to encounter stale entries if a) it is not declaring access to
    certain buffers and b) it races with the backing store release from a
    such undeclared execution already executing on the GPU in parallel.
    
    The approach taken is to mark any buffer objects which were ever bound
    to the GPU and to trigger a serialized TLB flush when their backing
    store is released.
    
    Alternatively the flushing could be done on VMA unbind, at which point
    we would be able to ascertain whether there is potential a parallel GPU
    execution (which could race), but essentially it boils down to paying
    the cost of TLB flushes potentially needlessly at VMA unbind time (when
    the backing store is not known to be going away so not needed for
    safety), versus potentially needlessly at backing store relase time
    (since we at that point cannot tell whether there is anything executing
    on the GPU which uses that object).
    
    Thereforce simplicity of implementation has been chosen for now with
    scope to benchmark and refine later as required.
    Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
    Reported-by: NSushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
    Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    Acked-by: NDave Airlie <airlied@redhat.com>
    Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
    Cc: Jon Bloomfield <jon.bloomfield@intel.com>
    Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
    Cc: Jani Nikula <jani.nikula@intel.com>
    Cc: stable@vger.kernel.org
    Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
    7938d615
i915_reg.h 522.2 KB