The current ARM PMU binding relies on the PMU interrupts being listed in
CPU logical order, which the device-tree author simply cannot know
anything about.

This patch introduces a new "interrupt-affinity" property, which makes
the relationship between the PMU interrupts and their corresponding
CPU explicit.
Acked-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>