This is no official errata, but I noticed that the channel reset may
stop working if the DMA state engine is in the READ_FLUSH state.

This patch uses the channel debug1 register to wait for the DMA
statemachine to leave the READ_FLUSH state. After that we can continue
to reset the channel.

Tested on i.MX28.
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>