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    ASoC: fsl_ssi: Don't try to round-up for PM divisor calculation · 6c8ca30e
    Nicolin Chen 提交于
    According to i.MX6 Series Reference Manual, the formula to calculate
    the sys clock is
    
    sysclk rate = bclk rate * (div2 + 1) * (7 * psr + 1) * (pm + 1) * 2
    
    Commit aafa85e7 ("ASoC: fsl_ssi: Add DAI master mode support for
    SSI on i.MX series") added the divisor calculation which relies on
    the clk_round_rate(). However, at that time, clk_round_rate() didn't
    provide closest clock rates for some cases because it might not use
    a correct rounding policy. So using the original formula (pm + 1) for
    PM divisor was not able to give us a desired clock rate. And then we
    used (pm + 2) to do the trick.
    
    However, the clk-divider driver has been refined a lot since commit
    b11d282d ("clk: divider: fix rate calculation for fractional rates")
    Now using (pm + 2) trick would result an incorrect clock rate.
    
    So this patch fixes the problem by removing the useless trick.
    Reported-by: NStephane Cerveau <scerveau@voxtok.com>
    Signed-off-by: NNicolin Chen <nicoleotsuka@gmail.com>
    Signed-off-by: NMark Brown <broonie@kernel.org>
    6c8ca30e
fsl_ssi.c 42.3 KB