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    drm/v3d: Don't clear MMU control bits on exception · 66f3ac48
    Phil Elwell 提交于
    raspberrypi inclusion
    category: feature
    bugzilla: 50432
    
    --------------------------------
    
    MMU exception conditions are reported in the V3D_MMU_CTRL register as
    write-1-to-clear (W1C) bits. The MMU interrupt handling code clears any
    exceptions, but does so by masking out any other bits and writing the
    result back. There are some important control bits in that register,
    including MMU_ENABLE, so a safer approach is to simply write back the
    value just read unaltered.
    
    This patch doesn't remove the cause of the apparent PTE errors, but it
    does reduce the impact to just an error in the kernel log.
    Signed-off-by: NPhil Elwell <phil@raspberrypi.org>
    Signed-off-by: NFang Yafen <yafen@iscas.ac.cn>
    Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
    66f3ac48
v3d_irq.c 7.1 KB