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由 Andreas Herrmann 提交于
After reset these registers have unknown values. This might cause problems when evaluating SMMU_GFSR and/or SMMU_CB_FSR in handlers for combined interrupts. Signed-off-by: NAndreas Herrmann <andreas.herrmann@calxeda.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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