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    libnvdimm: re-enable deep flush for pmem devices via fsync() · 5fdf8e5b
    Dave Jiang 提交于
    Re-enable deep flush so that users always have a way to be sure that a
    write makes it all the way out to media. Writes from the PMEM driver
    always arrive at the NVDIMM since movnt is used to bypass the cache, and
    the driver relies on the ADR (Asynchronous DRAM Refresh) mechanism to
    flush write buffers on power failure. The Deep Flush mechanism is there
    to explicitly write buffers to protect against (rare) ADR failure.  This
    change prevents a regression in deep flush behavior so that applications
    can continue to depend on fsync() as a mechanism to trigger deep flush
    in the filesystem-DAX case.
    
    Fixes: 06e8ccda ("acpi: nfit: Add support for detect platform CPU cache...")
    Reviewed-by: NJeff Moyer <jmoyer@redhat.com>
    Signed-off-by: NDave Jiang <dave.jiang@intel.com>
    Signed-off-by: NDan Williams <dan.j.williams@intel.com>
    5fdf8e5b
pmem.c 14.3 KB