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由 dave graham 提交于
82571 and 82572 Errata #13 documents that the Si feature DMA Dynamic Clock Gating should be disabled, and identifies the workaround of disabling the feature by EEPROM setting. EEPROM versions that do not include the recommended workaround have been found in the field, and so some customers remain at risk. Because the feature DMA Dynamic clock Gating can be disabled by directly setting the appropriate bit in the E1000_CTRL_EXT register, this patch overrides the EEPROM setting, and force-disables the feature. Signed-off-by: Ndave graham <david.graham@intel.com> Acked-by: NBruce Allan <bruce.w.allan@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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