stable inclusion
from stable-5.10.4
commit c72aa2169db1836b2ea1477c7d251c9d1076dc4e
bugzilla: 46903

--------------------------------

[ Upstream commit a4ccc376 ]

PHY disable/enable resets PLL registers to default values. Thus in
addition to restoring several registers we also need to restore VCO rate
settings.
Signed-off-by: NDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: c6659785 ("drm/msm/dsi/pll: call vco set rate explicitly")
Signed-off-by: NRob Clark <robdclark@chromium.org>
Signed-off-by: NSasha Levin <sashal@kernel.org>
Signed-off-by: NChen Jun <chenjun102@huawei.com>
Acked-by: NXie XiuQi <xiexiuqi@huawei.com>