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由 Eric Nelson 提交于
To quote from section 1.3.1 of the data sheet: The SGTL5000 has an internal reset that is deasserted 8 SYS_MCLK cycles after all power rails have been brought up. After this time, communication can start ... 1.0us represents 8 SYS_MCLK cycles at the minimum 8.0 MHz SYS_MCLK. Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com> Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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