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    powerpc/powernv: Introduce sysfs control for fastsleep workaround behavior · 5703d2f4
    Shreyas B. Prabhu 提交于
    Fastsleep is one of the idle state which cpuidle subsystem currently
    uses on power8 machines. In this state L2 cache is brought down to a
    threshold voltage. Therefore when the core is in fastsleep, the
    communication between L2 and L3 needs to be fenced. But there is a bug
    in the current power8 chips surrounding this fencing.
    
    OPAL provides a workaround which precludes the possibility of hitting
    this bug. But running with this workaround applied causes checkstop
    if any correctable error in L2 cache directory is detected. Hence OPAL
    also provides a way to undo the workaround.
    
    In the existing implementation, workaround is applied by the last thread
    of the core entering fastsleep and undone by the first thread waking up.
    But this has a performance cost. These OPAL calls account for roughly
    4000 cycles everytime the core has to enter or wakeup from fastsleep.
    
    This patch introduces a sysfs attribute (fastsleep_workaround_applyonce)
    to choose the behavior of this workaround.
    
    By default, fastsleep_workaround_applyonce = 0. In this case, workaround
    is applied/undone everytime the core enters/exits fastsleep.
    
    fastsleep_workaround_applyonce = 1. In this case the workaround is
    applied once on all the cores and never undone. This can be triggered by
    echo 1 > /sys/devices/system/cpu/fastsleep_workaround_applyonce
    
    For simplicity this attribute can be modified only once. Implying, once
    fastsleep_workaround_applyonce is changed to 1, it cannot be reverted
    to the default state.
    Signed-off-by: NShreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
    Reviewed-by: NPreeti U Murthy <preeti@linux.vnet.ibm.com>
    Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
    5703d2f4
opal.h 11.7 KB