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    drm/i915/vlv: assert and de-assert sideband reset at boot and resume v3 · 57021059
    Jesse Barnes 提交于
    This is a bit like the CMN reset de-assert we do in DPIO_CTL, except
    that it resets the whole common lane section of the PHY.  This is
    required on machines where the BIOS doesn't do this for us on boot or
    resume to properly re-calibrate and get the PHY ready to transmit data.
    
    Without this patch, such machines won't resume correctly much of the time,
    with the symptom being a 'port ready' timeout and/or a link training
    failure.
    
    Note that simply asserting reset at suspend and de-asserting at resume
    is not sufficient, nor is simply de-asserting at boot.  Both of these
    cases have been tested and have still been found to have failures on
    some configurations.
    
    v2: extract simpler set_power_well function for use in reset_dpio (Imre)
        move to reset_dpio (Daniel & Ville)
    v3: don't reset if DPIO reset is already de-asserted (Imre)
    Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
    Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
    Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    57021059
intel_display.c 345.5 KB