This is documented in the reference manuals as GIC_CLK_ROOT.

In some out-of-tree DVFS scenarios the gic clock can end up as the only
user of sys_pll2 so if we don't define the gic clk explicitly it might
be turned off.

This applies to both 8mq and 8mm: same clk register but diffferent
parents.
Signed-off-by: NLeonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: NAbel Vesa <abel.vesa@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>