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由 Tomasz Figa 提交于
Since PLL input frequency must be known before PLL registration, mout_vpllsrc clock which is a reference clock of VPLL must be registered before VPLL. This patch reorders clock registration to register mout_vpllsrc before VPLL. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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