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    drm/i915: Shuffle fifo underrun disable/enable points for gmch platforms · 4a3436e8
    Ville Syrjälä 提交于
    Gen2 reports FIFO underruns whenever no planes are enabled on the pipe.
    So in order to avoid false positives we must enable the FIFO underrun
    reporting only when at least one plane is enabled on the pipe. For
    now just move the underrun reporting enable/disable points to the
    other side of the plane enable/disable point. That doesn't cover cases
    when we turn off all the planes for the pipe but leave the pipe running
    on purpose, but it's better than the current situation.
    
    On gen4+ we can actually move the underrun reporting enable/disable to
    the opposite ends of the crtc enable/disable hooks. I suppose in theory
    we could leave the underrun reporting enabled all the time, except on
    VLV where PIPESTAT stops working when the display power well is down.
    If we ever get around to unifying the PIPESTAT irq handling for all
    gmch platforms, we should still follow the VLV route for other platforms.
    It would also micro-optimize the irq handler a bit since we could then
    skip the PIPESTAT reads for all disabled pipes.
    
    Gen3 is still a mystery, but for now I'm going to assume it behaves
    like gen4+.
    Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: NThomas Wood <thomas.wood@intel.com>
    Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    4a3436e8
intel_display.c 343.2 KB