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mainline inclusion from mainline-v5.14-rc1 commit c9450883 category: feature bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I5HAC1 CVE: NA Intel-SIG: commit c9450883 EDAC/i10nm: Add support for high bandwidth memory. Backport to add EDAC HBM support. -------------------------------- A future Xeon processor will include in-package HBM (high bandwidth memory). The in-package HBM memory controller shares the same architecture with the regular DDR memory controller. Add the HBM memory controller devices for EDAC support. Tested-by: NHongyu Ning <hongyu.ning@linux.intel.com> Signed-off-by: NQiuxu Zhuo <qiuxu.zhuo@intel.com> Signed-off-by: NTony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/r/20210611170123.1057025-4-tony.luck@intel.comSigned-off-by: NYouquan Song <youquan.song@intel.com>
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