• J
    coresight: etm4x: Workaround CPU hung bug on HiSilicon ETM · 425154ed
    Junhao He 提交于
    driver inclusion
    category: bugfix
    bugzilla: https://gitee.com/openeuler/kernel/issues/I5EZY2
    
    ------------------------------------------------------------------
    
    In FIFO mode, when the state of sink buffer is full, the sink device will
    continuously backpressures the ETM, so that the ETM cannot switch to the
    idle state. In this case, the WFx instruction cannot be executed because
    the CPU detects that the ETM is not in the idle state which that will
    cause CPU hung.
    We workaround this issue on HiSilicon ETM by setting bit 13 of TRCAUXCTLR
    which is used to indicate that the ETM is in the idle state.
    
    The call trace is shown below:
     rcu: INFO: rcu_sched detected stalls on CPUs/tasks:
     rcu: 	10-...0: (1 ticks this GP) idle=5b6/1/0x4000000000000000 softirq=12309/12318 fqs=114196
     	(detected by 67, t=330041 jiffies, g=309253, q=453663)
     Task dump for CPU 10:
     task:ksoftirqd/10    state:R  running task     stack:    0 pid:   64 ppid:     2 flags:0x0000000a
     Call trace:
      __switch_to+0xbc/0xfc
     irqtime_account_irq+0x58/0xc4
     __do_softirq+0x6c/0x358
     run_ksoftirqd+0x68/0x90
     smpboot_thread_fn+0x15c/0x1a0
     kthread+0x108/0x13c
     ret_from_fork+0x10/0x18
    watchdog: BUG: soft lockup - CPU#35 stuck for 22s! [bash:133345]
    ...
    Call trace:
     smp_call_function_single+0x178/0x190
     etm4_disable_sysfs+0x74/0xfc [coresight_etm4x]
     etm4_disable+0x6c/0x70 [coresight_etm4x]
     coresight_disable_source+0x7c/0xa0 [coresight]
     coresight_disable+0x6c/0x13c [coresight]
     enable_source_store+0x88/0xa0 [coresight]
     dev_attr_store+0x20/0x34
     sysfs_kf_write+0x4c/0x5c
     kernfs_fop_write_iter+0x130/0x1c0
     new_sync_write+0xec/0x18c
     vfs_write+0x214/0x2ac
     ksys_write+0x70/0xfc
     __arm64_sys_write+0x24/0x30
     el0_svc_common.constprop.0+0x7c/0x1bc
     do_el0_svc+0x2c/0x94
     el0_svc+0x20/0x30
     el0_sync_handler+0xb0/0xb4
     el0_sync+0x160/0x180
    Signed-off-by: NQi Liu <liuqi115@huawei.com>
    Signed-off-by: NJunhao He <hejunhao3@huawei.com>
    Reviewed-by: NJay Fang <f.fangjian@huawei.com>
    Acked-by: NXie XiuQi <xiexiuqi@huawei.com>
    Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
    425154ed
coresight-etm4x-core.c 49.8 KB