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由 Chen-Yu Tsai 提交于
On the A64, the MMC module clocks are fixed in the new timing mode, i.e. they do not have a bit to select the mode. These clocks have a 2x divider somewhere between the clock and the MMC module. To be consistent with other SoCs supporting the new timing mode, we model the 2x divider as a fixed post-divider on the MMC module clocks. To do this, we first add fixed post-divider to the MP style clocks, which the MMC module clocks are. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Tested-by: NAndre Przywara <andre.przywara@arm.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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