Add a driver for the APCS clock controller. It is part of the APCS
hardware block, which among other things implements also a combined
mux and half integer divider functionality. It can choose between a
fixed-rate clock or the dedicated APCS (A53) PLL. The source and the
divider can be set both at the same time.

This is required for enabling CPU frequency scaling on MSM8916-based
platforms.
Signed-off-by: NGeorgi Djakov <georgi.djakov@linaro.org>
Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: NAmit Kucheria <amit.kucheria@linaro.org>
[sboyd@codeaurora.org: Include rcg header for parent_map, drop
multiple unneeded includes, add COMPILE_TEST to APCS depends,
made tristate/modular]
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>