• F
    x86/cpufeatures: Enumerate the new AVX512 BFLOAT16 instructions · 3094b42a
    Fenghua Yu 提交于
    mainline inclusion
    from mainline-v5.3-rc1
    commit b302e4b1
    category: feature
    bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=44
    CVE: NA
    
    -----------------------------------------------
    
    AVX512 BFLOAT16 instructions support 16-bit BFLOAT16 floating-point
    format (BF16) for deep learning optimization.
    
    BF16 is a short version of 32-bit single-precision floating-point
    format (FP32) and has several advantages over 16-bit half-precision
    floating-point format (FP16). BF16 keeps FP32 accumulation after
    multiplication without loss of precision, offers more than enough
    range for deep learning training tasks, and doesn't need to handle
    hardware exception.
    
    AVX512 BFLOAT16 instructions are enumerated in CPUID.7.1:EAX[bit 5]
    AVX512_BF16.
    
    CPUID.7.1:EAX contains only feature bits. Reuse the currently empty
    word 12 as a pure features word to hold the feature bits including
    AVX512_BF16.
    
    Detailed information of the CPUID bit and AVX512 BFLOAT16 instructions
    can be found in the latest Intel Architecture Instruction Set Extensions
    and Future Features Programming Reference.
    
     [ bp: Check CPUID(7) subleaf validity before accessing subleaf 1. ]
    Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
    Signed-off-by: NBorislav Petkov <bp@suse.de>
    Cc: "Chang S. Bae" <chang.seok.bae@intel.com>
    Cc: Frederic Weisbecker <frederic@kernel.org>
    Cc: "H. Peter Anvin" <hpa@zytor.com>
    Cc: Ingo Molnar <mingo@redhat.com>
    Cc: Jann Horn <jannh@google.com>
    Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
    Cc: Michael Ellerman <mpe@ellerman.id.au>
    Cc: Nadav Amit <namit@vmware.com>
    Cc: Paolo Bonzini <pbonzini@redhat.com>
    Cc: Pavel Tatashin <pasha.tatashin@oracle.com>
    Cc: Peter Feiner <pfeiner@google.com>
    Cc: Radim Krcmar <rkrcmar@redhat.com>
    Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
    Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
    Cc: Robert Hoo <robert.hu@linux.intel.com>
    Cc: "Sean J Christopherson" <sean.j.christopherson@intel.com>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: Thomas Lendacky <Thomas.Lendacky@amd.com>
    Cc: x86 <x86@kernel.org>
    Link: https://lkml.kernel.org/r/1560794416-217638-3-git-send-email-fenghua.yu@intel.comSigned-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
    Reviewed-by: NXiongfeng Wang <wangxiongfeng2@huawei.com>
    Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>
    3094b42a
cpufeatures.h 26.4 KB