mainline inclusion
from mainline-v5.12-rc1
commit 32451614
category: feature
feature: SPR PMU core event enhancement
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I596BF

Intel-SIG: commit 32451614 ("perf/x86/intel: Support CPUID 10.ECX to
disable fixed counters")

-------------------------------------

With Architectural Performance Monitoring Version 5, CPUID 10.ECX cpu
leaf indicates the fixed counter enumeration. This extends the previous
count to a bitmap which allows disabling even lower fixed counters.
It could be used by a Hypervisor.

The existing intel_ctrl variable is used to remember the bitmask of the
counters. All code that reads all counters is fixed to check this extra
bitmask.
Suggested-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
Originally-by: NAndi Kleen <ak@linux.intel.com>
Signed-off-by: NKan Liang <kan.liang@linux.intel.com>
Signed-off-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1611873611-156687-6-git-send-email-kan.liang@linux.intel.comSigned-off-by: NYunying Sun <yunying.sun@intel.com>
Signed-off-by: NJun Tian <jun.j.tian@intel.com>
Signed-off-by: NJason Zeng <jason.zeng@intel.com>