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    perf/x86/amd/ibs: Fix waking up from S3 for AMD family 10h · bee09ed9
    Robert Richter 提交于
    On AMD family 10h we see following error messages while waking up from
    S3 for all non-boot CPUs leading to a failed IBS initialization:
    
     Enabling non-boot CPUs ...
     smpboot: Booting Node 0 Processor 1 APIC 0x1
     [Firmware Bug]: cpu 1, try to use APIC500 (LVT offset 0) for vector 0x400, but the register is already in use for vector 0xf9 on another cpu
     perf: IBS APIC setup failed on cpu #1
     process: Switch to broadcast mode on CPU1
     CPU1 is up
     ...
     ACPI: Waking up from system sleep state S3
    
    Reason for this is that during suspend the LVT offset for the IBS
    vector gets lost and needs to be reinialized while resuming.
    
    The offset is read from the IBSCTL msr. On family 10h the offset needs
    to be 1 as offset 0 is used for the MCE threshold interrupt, but
    firmware assings it for IBS to 0 too. The kernel needs to reprogram
    the vector. The msr is a readonly node msr, but a new value can be
    written via pci config space access. The reinitialization is
    implemented for family 10h in setup_ibs_ctl() which is forced during
    IBS setup.
    
    This patch fixes IBS setup after waking up from S3 by adding
    resume/supend hooks for the boot cpu which does the offset
    reinitialization.
    
    Marking it as stable to let distros pick up this fix.
    Signed-off-by: NRobert Richter <rric@kernel.org>
    Signed-off-by: NPeter Zijlstra <peterz@infradead.org>
    Cc: <stable@vger.kernel.org> v3.2..
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Link: http://lkml.kernel.org/r/1389797849-5565-1-git-send-email-rric.net@gmail.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
    bee09ed9
perf_event_amd_ibs.c 21.4 KB