• N
    mm: generalise COW SMC TLB flushing race comment · 111fe718
    Nicholas Piggin 提交于
    I'm not sure if I'm completely missing something here, but AFAIKS the
    reference to the mysterious "COW SMC race" confuses the issue.  The
    original changelog and mailing list thread didn't help me either.
    
    This SMC race is where the problem was detected, but isn't the general
    problem bigger and more obvious: that the new PTE could be picked up at
    any time by any TLB while entries for the old PTE exist in other TLBs
    before the TLB flush takes effect?
    
    The case where the iTLB and dTLB of a CPU are pointing at different pages
    is an interesting one but follows from the general problem.
    
    The other (minor) thing with the comment I think it makes it a bit clearer
    to say what the old code was doing (i.e., it avoids the race as opposed to
    what?).
    
    References: 4ce072f1 ("mm: fix a race condition under SMC + COW")
    Link: https://lkml.kernel.org/r/20201215121119.351650-1-npiggin@gmail.comReviewed-by: NMatthew Wilcox (Oracle) <willy@infradead.org>
    Cc: Suresh Siddha <suresh.b.siddha@intel.com>
    Cc: "David S. Miller" <davem@davemloft.net>
    Cc: Hugh Dickins <hughd@google.com>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Suresh Siddha <sbsiddha@gmail.com>
    Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
    Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
    111fe718
memory.c 141.5 KB
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