The offsets for the SZ registers are wrong. Updated.
Signed-off-by: NDave Jiang <dave.jiang@intel.com>
Reported-by: NSandeep Mann <sandeep@purestorage.com>
Tested-by: NZachary Ross <zacharyx.ross@intel.com>
Signed-off-by: NJon Mason <jdmason@kudzu.us>