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    arm64: mm: create new fine-grained mappings at boot · 068a17a5
    Mark Rutland 提交于
    At boot we may change the granularity of the tables mapping the kernel
    (by splitting or making sections). This may happen when we create the
    linear mapping (in __map_memblock), or at any point we try to apply
    fine-grained permissions to the kernel (e.g. fixup_executable,
    mark_rodata_ro, fixup_init).
    
    Changing the active page tables in this manner may result in multiple
    entries for the same address being allocated into TLBs, risking problems
    such as TLB conflict aborts or issues derived from the amalgamation of
    TLB entries. Generally, a break-before-make (BBM) approach is necessary
    to avoid conflicts, but we cannot do this for the kernel tables as it
    risks unmapping text or data being used to do so.
    
    Instead, we can create a new set of tables from scratch in the safety of
    the existing mappings, and subsequently migrate over to these using the
    new cpu_replace_ttbr1 helper, which avoids the two sets of tables being
    active simultaneously.
    
    To avoid issues when we later modify permissions of the page tables
    (e.g. in fixup_init), we must create the page tables at a granularity
    such that later modification does not result in splitting of tables.
    
    This patch applies this strategy, creating a new set of fine-grained
    page tables from scratch, and safely migrating to them. The existing
    fixmap and kasan shadow page tables are reused in the new fine-grained
    tables.
    Signed-off-by: NMark Rutland <mark.rutland@arm.com>
    Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com>
    Cc: Andrey Ryabinin <ryabinin.a.a@gmail.com>
    Tested-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
    Reviewed-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
    Tested-by: NJeremy Linton <jeremy.linton@arm.com>
    Cc: Laura Abbott <labbott@fedoraproject.org>
    Cc: Will Deacon <will.deacon@arm.com>
    Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
    068a17a5
mmu.c 17.6 KB