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由 Atsushi Nemoto 提交于
A spi transfer with zero length is not invalid. For example, such transfer (len == 0 && delay_usecs != 0) can be used to achieve delay before first CLK edge after chipselect assertion. Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp> Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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