Most of the blk-ctrl reset bits are found in one register, however
there are two bits in offset 8 for pulling the MIPI DPHY out of reset
and one of them needs to be set when IMX8MM_DISPBLK_PD_MIPI_CSI is brought
out of reset or the MIPI_CSI hangs.

Since MIPI_DSI is impacted, add the additional one for MIPI_DSI too.

Fixes: 926e57c0 ("soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl")
Signed-off-by: NAdam Ford <aford173@gmail.com>
Reviewed-by: NFabio Estevam <festevam@gmail.com>
Reviewed-by: NLucas Stach <l.stach@pengutronix.de>
Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>