x86_emulate.c 53.7 KB
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/******************************************************************************
 * x86_emulate.c
 *
 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
 *
 * Copyright (c) 2005 Keir Fraser
 *
 * Linux coding style, mod r/m decoder, segment base fixes, real-mode
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 * privileged instructions:
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 *
 * Copyright (C) 2006 Qumranet
 *
 *   Avi Kivity <avi@qumranet.com>
 *   Yaniv Kamay <yaniv@qumranet.com>
 *
 * This work is licensed under the terms of the GNU GPL, version 2.  See
 * the COPYING file in the top-level directory.
 *
 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
 */

#ifndef __KERNEL__
#include <stdio.h>
#include <stdint.h>
#include <public/xen.h>
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#define DPRINTF(_f, _a ...) printf(_f , ## _a)
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#else
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#include <linux/kvm_host.h>
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#define DPRINTF(x...) do {} while (0)
#endif
#include <linux/module.h>
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#include <asm/kvm_x86_emulate.h>
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/*
 * Opcode effective-address decode tables.
 * Note that we only emulate instructions that have at least one memory
 * operand (excluding implicit stack references). We assume that stack
 * references and instruction fetches will never occur in special memory
 * areas that require emulation. So, for example, 'mov <imm>,<reg>' need
 * not be handled.
 */

/* Operand sizes: 8-bit operands or specified/overridden size. */
#define ByteOp      (1<<0)	/* 8-bit operands. */
/* Destination operand type. */
#define ImplicitOps (1<<1)	/* Implicit in opcode. No generic decode. */
#define DstReg      (2<<1)	/* Register operand. */
#define DstMem      (3<<1)	/* Memory operand. */
#define DstMask     (3<<1)
/* Source operand type. */
#define SrcNone     (0<<3)	/* No source operand. */
#define SrcImplicit (0<<3)	/* Source operand is implicit in the opcode. */
#define SrcReg      (1<<3)	/* Register operand. */
#define SrcMem      (2<<3)	/* Memory operand. */
#define SrcMem16    (3<<3)	/* Memory operand (16-bit). */
#define SrcMem32    (4<<3)	/* Memory operand (32-bit). */
#define SrcImm      (5<<3)	/* Immediate operand. */
#define SrcImmByte  (6<<3)	/* 8-bit sign-extended immediate operand. */
#define SrcMask     (7<<3)
/* Generic ModRM decode. */
#define ModRM       (1<<6)
/* Destination is only written; never read. */
#define Mov         (1<<7)
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#define BitOp       (1<<8)
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#define MemAbs      (1<<9)      /* Memory operand is absolute displacement */
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#define String      (1<<10)     /* String instruction (rep capable) */
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#define Stack       (1<<11)     /* Stack instruction (push/pop) */
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#define Group       (1<<14)     /* Bits 3:5 of modrm byte extend opcode */
#define GroupDual   (1<<15)     /* Alternate decoding of mod == 3 */
#define GroupMask   0xff        /* Group number stored in bits 0:7 */
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enum {
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	Group1_80, Group1_81, Group1_82, Group1_83,
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	Group1A, Group3_Byte, Group3, Group4, Group5, Group7,
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};

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static u16 opcode_table[256] = {
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	/* 0x00 - 0x07 */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
	0, 0, 0, 0,
	/* 0x08 - 0x0F */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
	0, 0, 0, 0,
	/* 0x10 - 0x17 */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
	0, 0, 0, 0,
	/* 0x18 - 0x1F */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
	0, 0, 0, 0,
	/* 0x20 - 0x27 */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
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	SrcImmByte, SrcImm, 0, 0,
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	/* 0x28 - 0x2F */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
	0, 0, 0, 0,
	/* 0x30 - 0x37 */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
	0, 0, 0, 0,
	/* 0x38 - 0x3F */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
	0, 0, 0, 0,
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	/* 0x40 - 0x47 */
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	DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
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	/* 0x48 - 0x4F */
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	DstReg, DstReg, DstReg, DstReg,	DstReg, DstReg, DstReg, DstReg,
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	/* 0x50 - 0x57 */
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	SrcReg | Stack, SrcReg | Stack, SrcReg | Stack, SrcReg | Stack,
	SrcReg | Stack, SrcReg | Stack, SrcReg | Stack, SrcReg | Stack,
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	/* 0x58 - 0x5F */
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	DstReg | Stack, DstReg | Stack, DstReg | Stack, DstReg | Stack,
	DstReg | Stack, DstReg | Stack, DstReg | Stack, DstReg | Stack,
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	/* 0x60 - 0x67 */
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	0, 0, 0, DstReg | SrcMem32 | ModRM | Mov /* movsxd (x86/64) */ ,
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	0, 0, 0, 0,
	/* 0x68 - 0x6F */
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	SrcImm | Mov | Stack, 0, SrcImmByte | Mov | Stack, 0,
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	SrcNone  | ByteOp  | ImplicitOps, SrcNone  | ImplicitOps, /* insb, insw/insd */
	SrcNone  | ByteOp  | ImplicitOps, SrcNone  | ImplicitOps, /* outsb, outsw/outsd */
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	/* 0x70 - 0x77 */
	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
	/* 0x78 - 0x7F */
	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
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	/* 0x80 - 0x87 */
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	Group | Group1_80, Group | Group1_81,
	Group | Group1_82, Group | Group1_83,
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	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
	/* 0x88 - 0x8F */
	ByteOp | DstMem | SrcReg | ModRM | Mov, DstMem | SrcReg | ModRM | Mov,
	ByteOp | DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
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	DstMem | SrcReg | ModRM | Mov, ModRM | DstReg,
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	DstReg | SrcMem | ModRM | Mov, Group | Group1A,
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	/* 0x90 - 0x97 */
	DstReg, DstReg, DstReg, DstReg,	DstReg, DstReg, DstReg, DstReg,
	/* 0x98 - 0x9F */
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	0, 0, 0, 0, ImplicitOps | Stack, ImplicitOps | Stack, 0, 0,
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	/* 0xA0 - 0xA7 */
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	ByteOp | DstReg | SrcMem | Mov | MemAbs, DstReg | SrcMem | Mov | MemAbs,
	ByteOp | DstMem | SrcReg | Mov | MemAbs, DstMem | SrcReg | Mov | MemAbs,
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	ByteOp | ImplicitOps | Mov | String, ImplicitOps | Mov | String,
	ByteOp | ImplicitOps | String, ImplicitOps | String,
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	/* 0xA8 - 0xAF */
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	0, 0, ByteOp | ImplicitOps | Mov | String, ImplicitOps | Mov | String,
	ByteOp | ImplicitOps | Mov | String, ImplicitOps | Mov | String,
	ByteOp | ImplicitOps | String, ImplicitOps | String,
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	/* 0xB0 - 0xBF */
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	0, 0, 0, 0, 0, 0, 0, 0,
	DstReg | SrcImm | Mov, 0, 0, 0, 0, 0, 0, 0,
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	/* 0xC0 - 0xC7 */
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	ByteOp | DstMem | SrcImm | ModRM, DstMem | SrcImmByte | ModRM,
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	0, ImplicitOps | Stack, 0, 0,
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	ByteOp | DstMem | SrcImm | ModRM | Mov, DstMem | SrcImm | ModRM | Mov,
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	/* 0xC8 - 0xCF */
	0, 0, 0, 0, 0, 0, 0, 0,
	/* 0xD0 - 0xD7 */
	ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
	ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
	0, 0, 0, 0,
	/* 0xD8 - 0xDF */
	0, 0, 0, 0, 0, 0, 0, 0,
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	/* 0xE0 - 0xE7 */
	0, 0, 0, 0, 0, 0, 0, 0,
	/* 0xE8 - 0xEF */
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	ImplicitOps | Stack, SrcImm | ImplicitOps,
	ImplicitOps, SrcImmByte | ImplicitOps,
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	0, 0, 0, 0,
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	/* 0xF0 - 0xF7 */
	0, 0, 0, 0,
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	ImplicitOps, ImplicitOps, Group | Group3_Byte, Group | Group3,
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	/* 0xF8 - 0xFF */
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	ImplicitOps, 0, ImplicitOps, ImplicitOps,
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	0, 0, Group | Group4, Group | Group5,
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};

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static u16 twobyte_table[256] = {
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	/* 0x00 - 0x0F */
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	0, Group | GroupDual | Group7, 0, 0, 0, 0, ImplicitOps, 0,
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	ImplicitOps, ImplicitOps, 0, 0, 0, ImplicitOps | ModRM, 0, 0,
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	/* 0x10 - 0x1F */
	0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps | ModRM, 0, 0, 0, 0, 0, 0, 0,
	/* 0x20 - 0x2F */
	ModRM | ImplicitOps, ModRM, ModRM | ImplicitOps, ModRM, 0, 0, 0, 0,
	0, 0, 0, 0, 0, 0, 0, 0,
	/* 0x30 - 0x3F */
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	ImplicitOps, 0, ImplicitOps, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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	/* 0x40 - 0x47 */
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	/* 0x48 - 0x4F */
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
	/* 0x50 - 0x5F */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
	/* 0x60 - 0x6F */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
	/* 0x70 - 0x7F */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
	/* 0x80 - 0x8F */
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	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
	ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
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	/* 0x90 - 0x9F */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
	/* 0xA0 - 0xA7 */
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	0, 0, 0, DstMem | SrcReg | ModRM | BitOp, 0, 0, 0, 0,
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	/* 0xA8 - 0xAF */
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	0, 0, 0, DstMem | SrcReg | ModRM | BitOp, 0, 0, 0, 0,
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	/* 0xB0 - 0xB7 */
	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM, 0,
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	    DstMem | SrcReg | ModRM | BitOp,
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	0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov,
	    DstReg | SrcMem16 | ModRM | Mov,
	/* 0xB8 - 0xBF */
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	0, 0, DstMem | SrcImmByte | ModRM, DstMem | SrcReg | ModRM | BitOp,
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	0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov,
	    DstReg | SrcMem16 | ModRM | Mov,
	/* 0xC0 - 0xCF */
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	0, 0, 0, DstMem | SrcReg | ModRM | Mov, 0, 0, 0, ImplicitOps | ModRM,
	0, 0, 0, 0, 0, 0, 0, 0,
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	/* 0xD0 - 0xDF */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
	/* 0xE0 - 0xEF */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
	/* 0xF0 - 0xFF */
	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};

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static u16 group_table[] = {
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	[Group1_80*8] =
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	[Group1_81*8] =
	DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
	DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
	DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
	DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
	[Group1_82*8] =
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	ByteOp | DstMem | SrcImm | ModRM, ByteOp | DstMem | SrcImm | ModRM,
	[Group1_83*8] =
	DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
	DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
	DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
	DstMem | SrcImmByte | ModRM, DstMem | SrcImmByte | ModRM,
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	[Group1A*8] =
	DstMem | SrcNone | ModRM | Mov | Stack, 0, 0, 0, 0, 0, 0, 0,
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	[Group3_Byte*8] =
	ByteOp | SrcImm | DstMem | ModRM, 0,
	ByteOp | DstMem | SrcNone | ModRM, ByteOp | DstMem | SrcNone | ModRM,
	0, 0, 0, 0,
	[Group3*8] =
	DstMem | SrcImm | ModRM | SrcImm, 0,
	DstMem | SrcNone | ModRM, ByteOp | DstMem | SrcNone | ModRM,
	0, 0, 0, 0,
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	[Group4*8] =
	ByteOp | DstMem | SrcNone | ModRM, ByteOp | DstMem | SrcNone | ModRM,
	0, 0, 0, 0, 0, 0,
	[Group5*8] =
	DstMem | SrcNone | ModRM, DstMem | SrcNone | ModRM, 0, 0,
	SrcMem | ModRM, 0, SrcMem | ModRM | Stack, 0,
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	[Group7*8] =
	0, 0, ModRM | SrcMem, ModRM | SrcMem,
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	SrcNone | ModRM | DstMem | Mov, 0,
	SrcMem16 | ModRM | Mov, SrcMem | ModRM | ByteOp,
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};

static u16 group2_table[] = {
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	[Group7*8] =
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	SrcNone | ModRM, 0, 0, 0,
	SrcNone | ModRM | DstMem | Mov, 0,
	SrcMem16 | ModRM | Mov, 0,
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};

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/* EFLAGS bit definitions. */
#define EFLG_OF (1<<11)
#define EFLG_DF (1<<10)
#define EFLG_SF (1<<7)
#define EFLG_ZF (1<<6)
#define EFLG_AF (1<<4)
#define EFLG_PF (1<<2)
#define EFLG_CF (1<<0)

/*
 * Instruction emulation:
 * Most instructions are emulated directly via a fragment of inline assembly
 * code. This allows us to save/restore EFLAGS and thus very easily pick up
 * any modified flags.
 */

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#if defined(CONFIG_X86_64)
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#define _LO32 "k"		/* force 32-bit operand */
#define _STK  "%%rsp"		/* stack pointer */
#elif defined(__i386__)
#define _LO32 ""		/* force 32-bit operand */
#define _STK  "%%esp"		/* stack pointer */
#endif

/*
 * These EFLAGS bits are restored from saved value during emulation, and
 * any changes are written back to the saved value after emulation.
 */
#define EFLAGS_MASK (EFLG_OF|EFLG_SF|EFLG_ZF|EFLG_AF|EFLG_PF|EFLG_CF)

/* Before executing instruction: restore necessary bits in EFLAGS. */
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#define _PRE_EFLAGS(_sav, _msk, _tmp)					\
	/* EFLAGS = (_sav & _msk) | (EFLAGS & ~_msk); _sav &= ~_msk; */ \
	"movl %"_sav",%"_LO32 _tmp"; "                                  \
	"push %"_tmp"; "                                                \
	"push %"_tmp"; "                                                \
	"movl %"_msk",%"_LO32 _tmp"; "                                  \
	"andl %"_LO32 _tmp",("_STK"); "                                 \
	"pushf; "                                                       \
	"notl %"_LO32 _tmp"; "                                          \
	"andl %"_LO32 _tmp",("_STK"); "                                 \
	"andl %"_LO32 _tmp","__stringify(BITS_PER_LONG/4)"("_STK"); "	\
	"pop  %"_tmp"; "                                                \
	"orl  %"_LO32 _tmp",("_STK"); "                                 \
	"popf; "                                                        \
	"pop  %"_sav"; "
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/* After executing instruction: write-back necessary bits in EFLAGS. */
#define _POST_EFLAGS(_sav, _msk, _tmp) \
	/* _sav |= EFLAGS & _msk; */		\
	"pushf; "				\
	"pop  %"_tmp"; "			\
	"andl %"_msk",%"_LO32 _tmp"; "		\
	"orl  %"_LO32 _tmp",%"_sav"; "

/* Raw emulation: instruction has two explicit operands. */
#define __emulate_2op_nobyte(_op,_src,_dst,_eflags,_wx,_wy,_lx,_ly,_qx,_qy) \
	do { 								    \
		unsigned long _tmp;					    \
									    \
		switch ((_dst).bytes) {					    \
		case 2:							    \
			__asm__ __volatile__ (				    \
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				_PRE_EFLAGS("0", "4", "2")		    \
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				_op"w %"_wx"3,%1; "			    \
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				_POST_EFLAGS("0", "4", "2")		    \
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				: "=m" (_eflags), "=m" ((_dst).val),        \
				  "=&r" (_tmp)				    \
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				: _wy ((_src).val), "i" (EFLAGS_MASK));     \
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			break;						    \
		case 4:							    \
			__asm__ __volatile__ (				    \
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				_PRE_EFLAGS("0", "4", "2")		    \
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				_op"l %"_lx"3,%1; "			    \
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				_POST_EFLAGS("0", "4", "2")		    \
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				: "=m" (_eflags), "=m" ((_dst).val),	    \
				  "=&r" (_tmp)				    \
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				: _ly ((_src).val), "i" (EFLAGS_MASK));     \
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			break;						    \
		case 8:							    \
			__emulate_2op_8byte(_op, _src, _dst,		    \
					    _eflags, _qx, _qy);		    \
			break;						    \
		}							    \
	} while (0)

#define __emulate_2op(_op,_src,_dst,_eflags,_bx,_by,_wx,_wy,_lx,_ly,_qx,_qy) \
	do {								     \
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		unsigned long __tmp;					     \
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		switch ((_dst).bytes) {				             \
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		case 1:							     \
			__asm__ __volatile__ (				     \
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				_PRE_EFLAGS("0", "4", "2")		     \
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				_op"b %"_bx"3,%1; "			     \
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				_POST_EFLAGS("0", "4", "2")		     \
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				: "=m" (_eflags), "=m" ((_dst).val),	     \
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				  "=&r" (__tmp)				     \
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				: _by ((_src).val), "i" (EFLAGS_MASK));      \
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			break;						     \
		default:						     \
			__emulate_2op_nobyte(_op, _src, _dst, _eflags,	     \
					     _wx, _wy, _lx, _ly, _qx, _qy);  \
			break;						     \
		}							     \
	} while (0)

/* Source operand is byte-sized and may be restricted to just %cl. */
#define emulate_2op_SrcB(_op, _src, _dst, _eflags)                      \
	__emulate_2op(_op, _src, _dst, _eflags,				\
		      "b", "c", "b", "c", "b", "c", "b", "c")

/* Source operand is byte, word, long or quad sized. */
#define emulate_2op_SrcV(_op, _src, _dst, _eflags)                      \
	__emulate_2op(_op, _src, _dst, _eflags,				\
		      "b", "q", "w", "r", _LO32, "r", "", "r")

/* Source operand is word, long or quad sized. */
#define emulate_2op_SrcV_nobyte(_op, _src, _dst, _eflags)               \
	__emulate_2op_nobyte(_op, _src, _dst, _eflags,			\
			     "w", "r", _LO32, "r", "", "r")

/* Instruction has only one explicit operand (no source operand). */
#define emulate_1op(_op, _dst, _eflags)                                    \
	do {								\
		unsigned long _tmp;					\
									\
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		switch ((_dst).bytes) {				        \
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		case 1:							\
			__asm__ __volatile__ (				\
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				_PRE_EFLAGS("0", "3", "2")		\
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				_op"b %1; "				\
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				_POST_EFLAGS("0", "3", "2")		\
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				: "=m" (_eflags), "=m" ((_dst).val),	\
				  "=&r" (_tmp)				\
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				: "i" (EFLAGS_MASK));			\
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			break;						\
		case 2:							\
			__asm__ __volatile__ (				\
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				_PRE_EFLAGS("0", "3", "2")		\
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				_op"w %1; "				\
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				_POST_EFLAGS("0", "3", "2")		\
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				: "=m" (_eflags), "=m" ((_dst).val),	\
				  "=&r" (_tmp)				\
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				: "i" (EFLAGS_MASK));			\
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437 438 439
			break;						\
		case 4:							\
			__asm__ __volatile__ (				\
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				_PRE_EFLAGS("0", "3", "2")		\
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				_op"l %1; "				\
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				_POST_EFLAGS("0", "3", "2")		\
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				: "=m" (_eflags), "=m" ((_dst).val),	\
				  "=&r" (_tmp)				\
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				: "i" (EFLAGS_MASK));			\
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			break;						\
		case 8:							\
			__emulate_1op_8byte(_op, _dst, _eflags);	\
			break;						\
		}							\
	} while (0)

/* Emulate an instruction with quadword operands (x86/64 only). */
454
#if defined(CONFIG_X86_64)
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#define __emulate_2op_8byte(_op, _src, _dst, _eflags, _qx, _qy)           \
	do {								  \
		__asm__ __volatile__ (					  \
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			_PRE_EFLAGS("0", "4", "2")			  \
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			_op"q %"_qx"3,%1; "				  \
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			_POST_EFLAGS("0", "4", "2")			  \
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			: "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
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			: _qy ((_src).val), "i" (EFLAGS_MASK));		\
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	} while (0)

#define __emulate_1op_8byte(_op, _dst, _eflags)                           \
	do {								  \
		__asm__ __volatile__ (					  \
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			_PRE_EFLAGS("0", "3", "2")			  \
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			_op"q %1; "					  \
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			_POST_EFLAGS("0", "3", "2")			  \
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			: "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
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			: "i" (EFLAGS_MASK));				  \
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	} while (0)

#elif defined(__i386__)
#define __emulate_2op_8byte(_op, _src, _dst, _eflags, _qx, _qy)
#define __emulate_1op_8byte(_op, _dst, _eflags)
#endif				/* __i386__ */

/* Fetch next part of the instruction being emulated. */
#define insn_fetch(_type, _size, _eip)                                  \
({	unsigned long _x;						\
483
	rc = do_insn_fetch(ctxt, ops, (_eip), &_x, (_size));		\
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	if (rc != 0)							\
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		goto done;						\
	(_eip) += (_size);						\
	(_type)_x;							\
})

490 491 492 493 494
static inline unsigned long ad_mask(struct decode_cache *c)
{
	return (1UL << (c->ad_bytes << 3)) - 1;
}

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/* Access/update address held in a register, based on addressing mode. */
496 497 498 499 500 501 502 503 504 505 506 507 508 509 510
static inline unsigned long
address_mask(struct decode_cache *c, unsigned long reg)
{
	if (c->ad_bytes == sizeof(unsigned long))
		return reg;
	else
		return reg & ad_mask(c);
}

static inline unsigned long
register_address(struct decode_cache *c, unsigned long base, unsigned long reg)
{
	return base + address_mask(c, reg);
}

511 512 513 514 515 516 517 518
static inline void
register_address_increment(struct decode_cache *c, unsigned long *reg, int inc)
{
	if (c->ad_bytes == sizeof(unsigned long))
		*reg += inc;
	else
		*reg = (*reg & ~ad_mask(c)) | ((*reg + inc) & ad_mask(c));
}
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520 521 522 523
static inline void jmp_rel(struct decode_cache *c, int rel)
{
	register_address_increment(c, &c->eip, rel);
}
524

525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559
static int do_fetch_insn_byte(struct x86_emulate_ctxt *ctxt,
			      struct x86_emulate_ops *ops,
			      unsigned long linear, u8 *dest)
{
	struct fetch_cache *fc = &ctxt->decode.fetch;
	int rc;
	int size;

	if (linear < fc->start || linear >= fc->end) {
		size = min(15UL, PAGE_SIZE - offset_in_page(linear));
		rc = ops->read_std(linear, fc->data, size, ctxt->vcpu);
		if (rc)
			return rc;
		fc->start = linear;
		fc->end = linear + size;
	}
	*dest = fc->data[linear - fc->start];
	return 0;
}

static int do_insn_fetch(struct x86_emulate_ctxt *ctxt,
			 struct x86_emulate_ops *ops,
			 unsigned long eip, void *dest, unsigned size)
{
	int rc = 0;

	eip += ctxt->cs_base;
	while (size--) {
		rc = do_fetch_insn_byte(ctxt, ops, eip++, dest++);
		if (rc)
			return rc;
	}
	return 0;
}

560 561 562 563 564 565 566
/*
 * Given the 'reg' portion of a ModRM byte, and a register block, return a
 * pointer into the block that addresses the relevant register.
 * @highbyte_regs specifies whether to decode AH,CH,DH,BH.
 */
static void *decode_register(u8 modrm_reg, unsigned long *regs,
			     int highbyte_regs)
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{
	void *p;

	p = &regs[modrm_reg];
	if (highbyte_regs && modrm_reg >= 4 && modrm_reg < 8)
		p = (unsigned char *)&regs[modrm_reg & 3] + 1;
	return p;
}

static int read_descriptor(struct x86_emulate_ctxt *ctxt,
			   struct x86_emulate_ops *ops,
			   void *ptr,
			   u16 *size, unsigned long *address, int op_bytes)
{
	int rc;

	if (op_bytes == 2)
		op_bytes = 3;
	*address = 0;
586 587
	rc = ops->read_std((unsigned long)ptr, (unsigned long *)size, 2,
			   ctxt->vcpu);
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	if (rc)
		return rc;
590 591
	rc = ops->read_std((unsigned long)ptr + 2, address, op_bytes,
			   ctxt->vcpu);
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	return rc;
}

595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629
static int test_cc(unsigned int condition, unsigned int flags)
{
	int rc = 0;

	switch ((condition & 15) >> 1) {
	case 0: /* o */
		rc |= (flags & EFLG_OF);
		break;
	case 1: /* b/c/nae */
		rc |= (flags & EFLG_CF);
		break;
	case 2: /* z/e */
		rc |= (flags & EFLG_ZF);
		break;
	case 3: /* be/na */
		rc |= (flags & (EFLG_CF|EFLG_ZF));
		break;
	case 4: /* s */
		rc |= (flags & EFLG_SF);
		break;
	case 5: /* p/pe */
		rc |= (flags & EFLG_PF);
		break;
	case 7: /* le/ng */
		rc |= (flags & EFLG_ZF);
		/* fall through */
	case 6: /* l/nge */
		rc |= (!(flags & EFLG_SF) != !(flags & EFLG_OF));
		break;
	}

	/* Odd condition identifiers (lsb == 1) have inverted sense. */
	return (!!rc ^ (condition & 1));
}

630 631 632 633
static void decode_register_operand(struct operand *op,
				    struct decode_cache *c,
				    int inhibit_bytereg)
{
634
	unsigned reg = c->modrm_reg;
635
	int highbyte_regs = c->rex_prefix == 0;
636 637 638

	if (!(c->d & ModRM))
		reg = (c->b & 7) | ((c->rex_prefix & 1) << 3);
639 640
	op->type = OP_REG;
	if ((c->d & ByteOp) && !inhibit_bytereg) {
641
		op->ptr = decode_register(reg, c->regs, highbyte_regs);
642 643 644
		op->val = *(u8 *)op->ptr;
		op->bytes = 1;
	} else {
645
		op->ptr = decode_register(reg, c->regs, 0);
646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661
		op->bytes = c->op_bytes;
		switch (op->bytes) {
		case 2:
			op->val = *(u16 *)op->ptr;
			break;
		case 4:
			op->val = *(u32 *)op->ptr;
			break;
		case 8:
			op->val = *(u64 *) op->ptr;
			break;
		}
	}
	op->orig_val = op->val;
}

662 663 664 665 666
static int decode_modrm(struct x86_emulate_ctxt *ctxt,
			struct x86_emulate_ops *ops)
{
	struct decode_cache *c = &ctxt->decode;
	u8 sib;
667
	int index_reg = 0, base_reg = 0, scale;
668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683
	int rc = 0;

	if (c->rex_prefix) {
		c->modrm_reg = (c->rex_prefix & 4) << 1;	/* REX.R */
		index_reg = (c->rex_prefix & 2) << 2; /* REX.X */
		c->modrm_rm = base_reg = (c->rex_prefix & 1) << 3; /* REG.B */
	}

	c->modrm = insn_fetch(u8, 1, c->eip);
	c->modrm_mod |= (c->modrm & 0xc0) >> 6;
	c->modrm_reg |= (c->modrm & 0x38) >> 3;
	c->modrm_rm |= (c->modrm & 0x07);
	c->modrm_ea = 0;
	c->use_modrm_ea = 1;

	if (c->modrm_mod == 3) {
684 685 686
		c->modrm_ptr = decode_register(c->modrm_rm,
					       c->regs, c->d & ByteOp);
		c->modrm_val = *(unsigned long *)c->modrm_ptr;
687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742
		return rc;
	}

	if (c->ad_bytes == 2) {
		unsigned bx = c->regs[VCPU_REGS_RBX];
		unsigned bp = c->regs[VCPU_REGS_RBP];
		unsigned si = c->regs[VCPU_REGS_RSI];
		unsigned di = c->regs[VCPU_REGS_RDI];

		/* 16-bit ModR/M decode. */
		switch (c->modrm_mod) {
		case 0:
			if (c->modrm_rm == 6)
				c->modrm_ea += insn_fetch(u16, 2, c->eip);
			break;
		case 1:
			c->modrm_ea += insn_fetch(s8, 1, c->eip);
			break;
		case 2:
			c->modrm_ea += insn_fetch(u16, 2, c->eip);
			break;
		}
		switch (c->modrm_rm) {
		case 0:
			c->modrm_ea += bx + si;
			break;
		case 1:
			c->modrm_ea += bx + di;
			break;
		case 2:
			c->modrm_ea += bp + si;
			break;
		case 3:
			c->modrm_ea += bp + di;
			break;
		case 4:
			c->modrm_ea += si;
			break;
		case 5:
			c->modrm_ea += di;
			break;
		case 6:
			if (c->modrm_mod != 0)
				c->modrm_ea += bp;
			break;
		case 7:
			c->modrm_ea += bx;
			break;
		}
		if (c->modrm_rm == 2 || c->modrm_rm == 3 ||
		    (c->modrm_rm == 6 && c->modrm_mod != 0))
			if (!c->override_base)
				c->override_base = &ctxt->ss_base;
		c->modrm_ea = (u16)c->modrm_ea;
	} else {
		/* 32/64-bit ModR/M decode. */
743
		if ((c->modrm_rm & 7) == 4) {
744 745 746 747 748
			sib = insn_fetch(u8, 1, c->eip);
			index_reg |= (sib >> 3) & 7;
			base_reg |= sib & 7;
			scale = sib >> 6;

749 750 751
			if ((base_reg & 7) == 5 && c->modrm_mod == 0)
				c->modrm_ea += insn_fetch(s32, 4, c->eip);
			else
752
				c->modrm_ea += c->regs[base_reg];
753
			if (index_reg != 4)
754
				c->modrm_ea += c->regs[index_reg] << scale;
755 756
		} else if ((c->modrm_rm & 7) == 5 && c->modrm_mod == 0) {
			if (ctxt->mode == X86EMUL_MODE_PROT64)
757
				c->rip_relative = 1;
758
		} else
759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797
			c->modrm_ea += c->regs[c->modrm_rm];
		switch (c->modrm_mod) {
		case 0:
			if (c->modrm_rm == 5)
				c->modrm_ea += insn_fetch(s32, 4, c->eip);
			break;
		case 1:
			c->modrm_ea += insn_fetch(s8, 1, c->eip);
			break;
		case 2:
			c->modrm_ea += insn_fetch(s32, 4, c->eip);
			break;
		}
	}
done:
	return rc;
}

static int decode_abs(struct x86_emulate_ctxt *ctxt,
		      struct x86_emulate_ops *ops)
{
	struct decode_cache *c = &ctxt->decode;
	int rc = 0;

	switch (c->ad_bytes) {
	case 2:
		c->modrm_ea = insn_fetch(u16, 2, c->eip);
		break;
	case 4:
		c->modrm_ea = insn_fetch(u32, 4, c->eip);
		break;
	case 8:
		c->modrm_ea = insn_fetch(u64, 8, c->eip);
		break;
	}
done:
	return rc;
}

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int
799
x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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{
801
	struct decode_cache *c = &ctxt->decode;
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	int rc = 0;
	int mode = ctxt->mode;
804
	int def_op_bytes, def_ad_bytes, group;
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	/* Shadow copy of register state. Committed on successful emulation. */

808
	memset(c, 0, sizeof(struct decode_cache));
809 810
	c->eip = ctxt->vcpu->arch.rip;
	memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs);
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	switch (mode) {
	case X86EMUL_MODE_REAL:
	case X86EMUL_MODE_PROT16:
815
		def_op_bytes = def_ad_bytes = 2;
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		break;
	case X86EMUL_MODE_PROT32:
818
		def_op_bytes = def_ad_bytes = 4;
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		break;
820
#ifdef CONFIG_X86_64
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	case X86EMUL_MODE_PROT64:
822 823
		def_op_bytes = 4;
		def_ad_bytes = 8;
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		break;
#endif
	default:
		return -1;
	}

830 831 832
	c->op_bytes = def_op_bytes;
	c->ad_bytes = def_ad_bytes;

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	/* Legacy prefixes. */
834
	for (;;) {
835
		switch (c->b = insn_fetch(u8, 1, c->eip)) {
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		case 0x66:	/* operand-size override */
837 838
			/* switch between 2/4 bytes */
			c->op_bytes = def_op_bytes ^ 6;
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839 840 841
			break;
		case 0x67:	/* address-size override */
			if (mode == X86EMUL_MODE_PROT64)
842
				/* switch between 4/8 bytes */
843
				c->ad_bytes = def_ad_bytes ^ 12;
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			else
845
				/* switch between 2/4 bytes */
846
				c->ad_bytes = def_ad_bytes ^ 6;
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			break;
		case 0x2e:	/* CS override */
849
			c->override_base = &ctxt->cs_base;
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850 851
			break;
		case 0x3e:	/* DS override */
852
			c->override_base = &ctxt->ds_base;
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			break;
		case 0x26:	/* ES override */
855
			c->override_base = &ctxt->es_base;
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			break;
		case 0x64:	/* FS override */
858
			c->override_base = &ctxt->fs_base;
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			break;
		case 0x65:	/* GS override */
861
			c->override_base = &ctxt->gs_base;
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			break;
		case 0x36:	/* SS override */
864
			c->override_base = &ctxt->ss_base;
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			break;
866 867 868
		case 0x40 ... 0x4f: /* REX */
			if (mode != X86EMUL_MODE_PROT64)
				goto done_prefixes;
869
			c->rex_prefix = c->b;
870
			continue;
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		case 0xf0:	/* LOCK */
872
			c->lock_prefix = 1;
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			break;
874
		case 0xf2:	/* REPNE/REPNZ */
875 876
			c->rep_prefix = REPNE_PREFIX;
			break;
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		case 0xf3:	/* REP/REPE/REPZ */
878
			c->rep_prefix = REPE_PREFIX;
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			break;
		default:
			goto done_prefixes;
		}
883 884 885

		/* Any legacy prefix after a REX prefix nullifies its effect. */

886
		c->rex_prefix = 0;
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	}

done_prefixes:

	/* REX prefix. */
892
	if (c->rex_prefix)
893
		if (c->rex_prefix & 8)
894
			c->op_bytes = 8;	/* REX.W */
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895 896

	/* Opcode byte(s). */
897 898
	c->d = opcode_table[c->b];
	if (c->d == 0) {
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		/* Two-byte opcode? */
900 901 902 903
		if (c->b == 0x0f) {
			c->twobyte = 1;
			c->b = insn_fetch(u8, 1, c->eip);
			c->d = twobyte_table[c->b];
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		}
905
	}
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906

907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922
	if (c->d & Group) {
		group = c->d & GroupMask;
		c->modrm = insn_fetch(u8, 1, c->eip);
		--c->eip;

		group = (group << 3) + ((c->modrm >> 3) & 7);
		if ((c->d & GroupDual) && (c->modrm >> 6) == 3)
			c->d = group2_table[group];
		else
			c->d = group_table[group];
	}

	/* Unrecognised? */
	if (c->d == 0) {
		DPRINTF("Cannot emulate %02x\n", c->b);
		return -1;
A
Avi Kivity 已提交
923 924
	}

925 926 927
	if (mode == X86EMUL_MODE_PROT64 && (c->d & Stack))
		c->op_bytes = 8;

A
Avi Kivity 已提交
928
	/* ModRM and SIB bytes. */
929 930 931 932 933 934
	if (c->d & ModRM)
		rc = decode_modrm(ctxt, ops);
	else if (c->d & MemAbs)
		rc = decode_abs(ctxt, ops);
	if (rc)
		goto done;
A
Avi Kivity 已提交
935

936 937 938 939 940 941 942 943 944 945 946 947
	if (!c->override_base)
		c->override_base = &ctxt->ds_base;
	if (mode == X86EMUL_MODE_PROT64 &&
	    c->override_base != &ctxt->fs_base &&
	    c->override_base != &ctxt->gs_base)
		c->override_base = NULL;

	if (c->override_base)
		c->modrm_ea += *c->override_base;

	if (c->ad_bytes != 8)
		c->modrm_ea = (u32)c->modrm_ea;
A
Avi Kivity 已提交
948 949 950 951
	/*
	 * Decode and fetch the source operand: register, memory
	 * or immediate.
	 */
952
	switch (c->d & SrcMask) {
A
Avi Kivity 已提交
953 954 955
	case SrcNone:
		break;
	case SrcReg:
956
		decode_register_operand(&c->src, c, 0);
A
Avi Kivity 已提交
957 958
		break;
	case SrcMem16:
959
		c->src.bytes = 2;
A
Avi Kivity 已提交
960 961
		goto srcmem_common;
	case SrcMem32:
962
		c->src.bytes = 4;
A
Avi Kivity 已提交
963 964
		goto srcmem_common;
	case SrcMem:
965 966
		c->src.bytes = (c->d & ByteOp) ? 1 :
							   c->op_bytes;
967
		/* Don't fetch the address for invlpg: it could be unmapped. */
M
Mike Day 已提交
968
		if (c->twobyte && c->b == 0x01 && c->modrm_reg == 7)
969
			break;
M
Mike Day 已提交
970
	srcmem_common:
971 972 973 974
		/*
		 * For instructions with a ModR/M byte, switch to register
		 * access if Mod = 3.
		 */
975 976
		if ((c->d & ModRM) && c->modrm_mod == 3) {
			c->src.type = OP_REG;
977
			c->src.val = c->modrm_val;
978
			c->src.ptr = c->modrm_ptr;
979 980
			break;
		}
981
		c->src.type = OP_MEM;
A
Avi Kivity 已提交
982 983
		break;
	case SrcImm:
984 985 986 987 988
		c->src.type = OP_IMM;
		c->src.ptr = (unsigned long *)c->eip;
		c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
		if (c->src.bytes == 8)
			c->src.bytes = 4;
A
Avi Kivity 已提交
989
		/* NB. Immediates are sign-extended as necessary. */
990
		switch (c->src.bytes) {
A
Avi Kivity 已提交
991
		case 1:
992
			c->src.val = insn_fetch(s8, 1, c->eip);
A
Avi Kivity 已提交
993 994
			break;
		case 2:
995
			c->src.val = insn_fetch(s16, 2, c->eip);
A
Avi Kivity 已提交
996 997
			break;
		case 4:
998
			c->src.val = insn_fetch(s32, 4, c->eip);
A
Avi Kivity 已提交
999 1000 1001 1002
			break;
		}
		break;
	case SrcImmByte:
1003 1004 1005 1006
		c->src.type = OP_IMM;
		c->src.ptr = (unsigned long *)c->eip;
		c->src.bytes = 1;
		c->src.val = insn_fetch(s8, 1, c->eip);
A
Avi Kivity 已提交
1007 1008 1009
		break;
	}

1010
	/* Decode and fetch the destination operand: register or memory. */
1011
	switch (c->d & DstMask) {
1012 1013
	case ImplicitOps:
		/* Special instructions do their own operand decoding. */
1014
		return 0;
1015
	case DstReg:
1016
		decode_register_operand(&c->dst, c,
1017
			 c->twobyte && (c->b == 0xb6 || c->b == 0xb7));
1018 1019
		break;
	case DstMem:
1020
		if ((c->d & ModRM) && c->modrm_mod == 3) {
1021
			c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
1022
			c->dst.type = OP_REG;
1023
			c->dst.val = c->dst.orig_val = c->modrm_val;
1024
			c->dst.ptr = c->modrm_ptr;
1025 1026
			break;
		}
1027 1028 1029 1030
		c->dst.type = OP_MEM;
		break;
	}

1031 1032 1033
	if (c->rip_relative)
		c->modrm_ea += c->eip;

1034 1035 1036 1037
done:
	return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0;
}

1038 1039 1040 1041 1042 1043 1044
static inline void emulate_push(struct x86_emulate_ctxt *ctxt)
{
	struct decode_cache *c = &ctxt->decode;

	c->dst.type  = OP_MEM;
	c->dst.bytes = c->op_bytes;
	c->dst.val = c->src.val;
1045
	register_address_increment(c, &c->regs[VCPU_REGS_RSP], -c->op_bytes);
1046
	c->dst.ptr = (void *) register_address(c, ctxt->ss_base,
1047 1048 1049 1050 1051 1052 1053 1054 1055
					       c->regs[VCPU_REGS_RSP]);
}

static inline int emulate_grp1a(struct x86_emulate_ctxt *ctxt,
				struct x86_emulate_ops *ops)
{
	struct decode_cache *c = &ctxt->decode;
	int rc;

1056
	rc = ops->read_std(register_address(c, ctxt->ss_base,
1057 1058 1059 1060 1061
					    c->regs[VCPU_REGS_RSP]),
			   &c->dst.val, c->dst.bytes, ctxt->vcpu);
	if (rc != 0)
		return rc;

1062
	register_address_increment(c, &c->regs[VCPU_REGS_RSP], c->dst.bytes);
1063 1064 1065 1066

	return 0;
}

1067
static inline void emulate_grp2(struct x86_emulate_ctxt *ctxt)
1068
{
1069
	struct decode_cache *c = &ctxt->decode;
1070 1071
	switch (c->modrm_reg) {
	case 0:	/* rol */
1072
		emulate_2op_SrcB("rol", c->src, c->dst, ctxt->eflags);
1073 1074
		break;
	case 1:	/* ror */
1075
		emulate_2op_SrcB("ror", c->src, c->dst, ctxt->eflags);
1076 1077
		break;
	case 2:	/* rcl */
1078
		emulate_2op_SrcB("rcl", c->src, c->dst, ctxt->eflags);
1079 1080
		break;
	case 3:	/* rcr */
1081
		emulate_2op_SrcB("rcr", c->src, c->dst, ctxt->eflags);
1082 1083 1084
		break;
	case 4:	/* sal/shl */
	case 6:	/* sal/shl */
1085
		emulate_2op_SrcB("sal", c->src, c->dst, ctxt->eflags);
1086 1087
		break;
	case 5:	/* shr */
1088
		emulate_2op_SrcB("shr", c->src, c->dst, ctxt->eflags);
1089 1090
		break;
	case 7:	/* sar */
1091
		emulate_2op_SrcB("sar", c->src, c->dst, ctxt->eflags);
1092 1093 1094 1095 1096
		break;
	}
}

static inline int emulate_grp3(struct x86_emulate_ctxt *ctxt,
1097
			       struct x86_emulate_ops *ops)
1098 1099 1100 1101 1102 1103
{
	struct decode_cache *c = &ctxt->decode;
	int rc = 0;

	switch (c->modrm_reg) {
	case 0 ... 1:	/* test */
1104
		emulate_2op_SrcV("test", c->src, c->dst, ctxt->eflags);
1105 1106 1107 1108 1109
		break;
	case 2:	/* not */
		c->dst.val = ~c->dst.val;
		break;
	case 3:	/* neg */
1110
		emulate_1op("neg", c->dst, ctxt->eflags);
1111 1112 1113 1114 1115 1116 1117 1118 1119 1120
		break;
	default:
		DPRINTF("Cannot emulate %02x\n", c->b);
		rc = X86EMUL_UNHANDLEABLE;
		break;
	}
	return rc;
}

static inline int emulate_grp45(struct x86_emulate_ctxt *ctxt,
1121
			       struct x86_emulate_ops *ops)
1122 1123 1124 1125 1126
{
	struct decode_cache *c = &ctxt->decode;

	switch (c->modrm_reg) {
	case 0:	/* inc */
1127
		emulate_1op("inc", c->dst, ctxt->eflags);
1128 1129
		break;
	case 1:	/* dec */
1130
		emulate_1op("dec", c->dst, ctxt->eflags);
1131 1132
		break;
	case 4: /* jmp abs */
1133
		c->eip = c->src.val;
1134 1135
		break;
	case 6:	/* push */
1136
		emulate_push(ctxt);
1137 1138 1139 1140 1141 1142 1143
		break;
	}
	return 0;
}

static inline int emulate_grp9(struct x86_emulate_ctxt *ctxt,
			       struct x86_emulate_ops *ops,
1144
			       unsigned long memop)
1145 1146 1147 1148 1149
{
	struct decode_cache *c = &ctxt->decode;
	u64 old, new;
	int rc;

1150
	rc = ops->read_emulated(memop, &old, 8, ctxt->vcpu);
1151 1152 1153 1154 1155 1156 1157 1158
	if (rc != 0)
		return rc;

	if (((u32) (old >> 0) != (u32) c->regs[VCPU_REGS_RAX]) ||
	    ((u32) (old >> 32) != (u32) c->regs[VCPU_REGS_RDX])) {

		c->regs[VCPU_REGS_RAX] = (u32) (old >> 0);
		c->regs[VCPU_REGS_RDX] = (u32) (old >> 32);
1159
		ctxt->eflags &= ~EFLG_ZF;
1160 1161 1162 1163 1164

	} else {
		new = ((u64)c->regs[VCPU_REGS_RCX] << 32) |
		       (u32) c->regs[VCPU_REGS_RBX];

1165
		rc = ops->cmpxchg_emulated(memop, &old, &new, 8, ctxt->vcpu);
1166 1167
		if (rc != 0)
			return rc;
1168
		ctxt->eflags |= EFLG_ZF;
1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214
	}
	return 0;
}

static inline int writeback(struct x86_emulate_ctxt *ctxt,
			    struct x86_emulate_ops *ops)
{
	int rc;
	struct decode_cache *c = &ctxt->decode;

	switch (c->dst.type) {
	case OP_REG:
		/* The 4-byte case *is* correct:
		 * in 64-bit mode we zero-extend.
		 */
		switch (c->dst.bytes) {
		case 1:
			*(u8 *)c->dst.ptr = (u8)c->dst.val;
			break;
		case 2:
			*(u16 *)c->dst.ptr = (u16)c->dst.val;
			break;
		case 4:
			*c->dst.ptr = (u32)c->dst.val;
			break;	/* 64b: zero-ext */
		case 8:
			*c->dst.ptr = c->dst.val;
			break;
		}
		break;
	case OP_MEM:
		if (c->lock_prefix)
			rc = ops->cmpxchg_emulated(
					(unsigned long)c->dst.ptr,
					&c->dst.orig_val,
					&c->dst.val,
					c->dst.bytes,
					ctxt->vcpu);
		else
			rc = ops->write_emulated(
					(unsigned long)c->dst.ptr,
					&c->dst.val,
					c->dst.bytes,
					ctxt->vcpu);
		if (rc != 0)
			return rc;
1215 1216 1217 1218
		break;
	case OP_NONE:
		/* no writeback */
		break;
1219 1220 1221 1222 1223 1224
	default:
		break;
	}
	return 0;
}

1225
int
1226
x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
1227
{
1228
	unsigned long memop = 0;
1229
	u64 msr_data;
1230
	unsigned long saved_eip = 0;
1231
	struct decode_cache *c = &ctxt->decode;
1232
	int rc = 0;
1233

1234 1235 1236 1237 1238
	/* Shadow copy of register state. Committed on successful emulation.
	 * NOTE: we can copy them from vcpu as x86_decode_insn() doesn't
	 * modify them.
	 */

1239
	memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs);
1240 1241
	saved_eip = c->eip;

1242
	if (((c->d & ModRM) && (c->modrm_mod != 3)) || (c->d & MemAbs))
1243
		memop = c->modrm_ea;
1244

1245 1246 1247
	if (c->rep_prefix && (c->d & String)) {
		/* All REP prefixes have the same first termination condition */
		if (c->regs[VCPU_REGS_RCX] == 0) {
1248
			ctxt->vcpu->arch.rip = c->eip;
1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261
			goto done;
		}
		/* The second termination condition only applies for REPE
		 * and REPNE. Test if the repeat string operation prefix is
		 * REPE/REPZ or REPNE/REPNZ and if it's the case it tests the
		 * corresponding termination condition according to:
		 * 	- if REPE/REPZ and ZF = 0 then done
		 * 	- if REPNE/REPNZ and ZF = 1 then done
		 */
		if ((c->b == 0xa6) || (c->b == 0xa7) ||
				(c->b == 0xae) || (c->b == 0xaf)) {
			if ((c->rep_prefix == REPE_PREFIX) &&
				((ctxt->eflags & EFLG_ZF) == 0)) {
1262
					ctxt->vcpu->arch.rip = c->eip;
1263 1264 1265 1266
					goto done;
			}
			if ((c->rep_prefix == REPNE_PREFIX) &&
				((ctxt->eflags & EFLG_ZF) == EFLG_ZF)) {
1267
				ctxt->vcpu->arch.rip = c->eip;
1268 1269 1270 1271
				goto done;
			}
		}
		c->regs[VCPU_REGS_RCX]--;
1272
		c->eip = ctxt->vcpu->arch.rip;
1273 1274
	}

1275
	if (c->src.type == OP_MEM) {
1276
		c->src.ptr = (unsigned long *)memop;
1277
		c->src.val = 0;
M
Mike Day 已提交
1278 1279 1280 1281 1282
		rc = ops->read_emulated((unsigned long)c->src.ptr,
					&c->src.val,
					c->src.bytes,
					ctxt->vcpu);
		if (rc != 0)
1283 1284 1285 1286 1287 1288 1289 1290 1291
			goto done;
		c->src.orig_val = c->src.val;
	}

	if ((c->d & DstMask) == ImplicitOps)
		goto special_insn;


	if (c->dst.type == OP_MEM) {
1292
		c->dst.ptr = (unsigned long *)memop;
1293 1294
		c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
		c->dst.val = 0;
1295 1296
		if (c->d & BitOp) {
			unsigned long mask = ~(c->dst.bytes * 8 - 1);
1297

1298 1299
			c->dst.ptr = (void *)c->dst.ptr +
						   (c->src.val & mask) / 8;
1300
		}
1301 1302 1303 1304 1305
		if (!(c->d & Mov) &&
				   /* optimisation - avoid slow emulated read */
		    ((rc = ops->read_emulated((unsigned long)c->dst.ptr,
					   &c->dst.val,
					  c->dst.bytes, ctxt->vcpu)) != 0))
1306 1307
			goto done;
	}
1308
	c->dst.orig_val = c->dst.val;
1309

1310 1311
special_insn:

1312
	if (c->twobyte)
A
Avi Kivity 已提交
1313 1314
		goto twobyte_insn;

1315
	switch (c->b) {
A
Avi Kivity 已提交
1316 1317
	case 0x00 ... 0x05:
	      add:		/* add */
1318
		emulate_2op_SrcV("add", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1319 1320 1321
		break;
	case 0x08 ... 0x0d:
	      or:		/* or */
1322
		emulate_2op_SrcV("or", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1323 1324 1325
		break;
	case 0x10 ... 0x15:
	      adc:		/* adc */
1326
		emulate_2op_SrcV("adc", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1327 1328 1329
		break;
	case 0x18 ... 0x1d:
	      sbb:		/* sbb */
1330
		emulate_2op_SrcV("sbb", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1331
		break;
1332
	case 0x20 ... 0x23:
A
Avi Kivity 已提交
1333
	      and:		/* and */
1334
		emulate_2op_SrcV("and", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1335
		break;
1336
	case 0x24:              /* and al imm8 */
1337 1338 1339 1340 1341
		c->dst.type = OP_REG;
		c->dst.ptr = &c->regs[VCPU_REGS_RAX];
		c->dst.val = *(u8 *)c->dst.ptr;
		c->dst.bytes = 1;
		c->dst.orig_val = c->dst.val;
1342 1343
		goto and;
	case 0x25:              /* and ax imm16, or eax imm32 */
1344 1345 1346 1347 1348
		c->dst.type = OP_REG;
		c->dst.bytes = c->op_bytes;
		c->dst.ptr = &c->regs[VCPU_REGS_RAX];
		if (c->op_bytes == 2)
			c->dst.val = *(u16 *)c->dst.ptr;
1349
		else
1350 1351
			c->dst.val = *(u32 *)c->dst.ptr;
		c->dst.orig_val = c->dst.val;
1352
		goto and;
A
Avi Kivity 已提交
1353 1354
	case 0x28 ... 0x2d:
	      sub:		/* sub */
1355
		emulate_2op_SrcV("sub", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1356 1357 1358
		break;
	case 0x30 ... 0x35:
	      xor:		/* xor */
1359
		emulate_2op_SrcV("xor", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1360 1361 1362
		break;
	case 0x38 ... 0x3d:
	      cmp:		/* cmp */
1363
		emulate_2op_SrcV("cmp", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1364
		break;
1365 1366 1367 1368 1369 1370 1371 1372 1373 1374
	case 0x40 ... 0x47: /* inc r16/r32 */
		emulate_1op("inc", c->dst, ctxt->eflags);
		break;
	case 0x48 ... 0x4f: /* dec r16/r32 */
		emulate_1op("dec", c->dst, ctxt->eflags);
		break;
	case 0x50 ... 0x57:  /* push reg */
		c->dst.type  = OP_MEM;
		c->dst.bytes = c->op_bytes;
		c->dst.val = c->src.val;
1375
		register_address_increment(c, &c->regs[VCPU_REGS_RSP],
1376 1377
					   -c->op_bytes);
		c->dst.ptr = (void *) register_address(
1378
			c, ctxt->ss_base, c->regs[VCPU_REGS_RSP]);
1379 1380 1381
		break;
	case 0x58 ... 0x5f: /* pop reg */
	pop_instruction:
1382
		if ((rc = ops->read_std(register_address(c, ctxt->ss_base,
1383 1384 1385 1386
			c->regs[VCPU_REGS_RSP]), c->dst.ptr,
			c->op_bytes, ctxt->vcpu)) != 0)
			goto done;

1387
		register_address_increment(c, &c->regs[VCPU_REGS_RSP],
1388 1389 1390
					   c->op_bytes);
		c->dst.type = OP_NONE;	/* Disable writeback. */
		break;
A
Avi Kivity 已提交
1391
	case 0x63:		/* movsxd */
1392
		if (ctxt->mode != X86EMUL_MODE_PROT64)
A
Avi Kivity 已提交
1393
			goto cannot_emulate;
1394
		c->dst.val = (s32) c->src.val;
A
Avi Kivity 已提交
1395
		break;
1396
	case 0x68: /* push imm */
1397 1398 1399 1400 1401 1402 1403 1404 1405
	case 0x6a: /* push imm8 */
		emulate_push(ctxt);
		break;
	case 0x6c:		/* insb */
	case 0x6d:		/* insw/insd */
		 if (kvm_emulate_pio_string(ctxt->vcpu, NULL,
				1,
				(c->d & ByteOp) ? 1 : c->op_bytes,
				c->rep_prefix ?
1406
				address_mask(c, c->regs[VCPU_REGS_RCX]) : 1,
1407
				(ctxt->eflags & EFLG_DF),
1408
				register_address(c, ctxt->es_base,
1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421
						 c->regs[VCPU_REGS_RDI]),
				c->rep_prefix,
				c->regs[VCPU_REGS_RDX]) == 0) {
			c->eip = saved_eip;
			return -1;
		}
		return 0;
	case 0x6e:		/* outsb */
	case 0x6f:		/* outsw/outsd */
		if (kvm_emulate_pio_string(ctxt->vcpu, NULL,
				0,
				(c->d & ByteOp) ? 1 : c->op_bytes,
				c->rep_prefix ?
1422
				address_mask(c, c->regs[VCPU_REGS_RCX]) : 1,
1423
				(ctxt->eflags & EFLG_DF),
1424
				register_address(c, c->override_base ?
1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437
							*c->override_base :
							ctxt->ds_base,
						 c->regs[VCPU_REGS_RSI]),
				c->rep_prefix,
				c->regs[VCPU_REGS_RDX]) == 0) {
			c->eip = saved_eip;
			return -1;
		}
		return 0;
	case 0x70 ... 0x7f: /* jcc (short) */ {
		int rel = insn_fetch(s8, 1, c->eip);

		if (test_cc(c->b, ctxt->eflags))
1438
			jmp_rel(c, rel);
1439 1440
		break;
	}
A
Avi Kivity 已提交
1441
	case 0x80 ... 0x83:	/* Grp1 */
1442
		switch (c->modrm_reg) {
A
Avi Kivity 已提交
1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461
		case 0:
			goto add;
		case 1:
			goto or;
		case 2:
			goto adc;
		case 3:
			goto sbb;
		case 4:
			goto and;
		case 5:
			goto sub;
		case 6:
			goto xor;
		case 7:
			goto cmp;
		}
		break;
	case 0x84 ... 0x85:
1462
		emulate_2op_SrcV("test", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1463 1464
		break;
	case 0x86 ... 0x87:	/* xchg */
1465
	xchg:
A
Avi Kivity 已提交
1466
		/* Write back the register source. */
1467
		switch (c->dst.bytes) {
A
Avi Kivity 已提交
1468
		case 1:
1469
			*(u8 *) c->src.ptr = (u8) c->dst.val;
A
Avi Kivity 已提交
1470 1471
			break;
		case 2:
1472
			*(u16 *) c->src.ptr = (u16) c->dst.val;
A
Avi Kivity 已提交
1473 1474
			break;
		case 4:
1475
			*c->src.ptr = (u32) c->dst.val;
A
Avi Kivity 已提交
1476 1477
			break;	/* 64b reg: zero-extend */
		case 8:
1478
			*c->src.ptr = c->dst.val;
A
Avi Kivity 已提交
1479 1480 1481 1482 1483 1484
			break;
		}
		/*
		 * Write back the memory destination with implicit LOCK
		 * prefix.
		 */
1485 1486
		c->dst.val = c->src.val;
		c->lock_prefix = 1;
A
Avi Kivity 已提交
1487 1488
		break;
	case 0x88 ... 0x8b:	/* mov */
1489
		goto mov;
1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502
	case 0x8c: { /* mov r/m, sreg */
		struct kvm_segment segreg;

		if (c->modrm_reg <= 5)
			kvm_get_segment(ctxt->vcpu, &segreg, c->modrm_reg);
		else {
			printk(KERN_INFO "0x8c: Invalid segreg in modrm byte 0x%02x\n",
			       c->modrm);
			goto cannot_emulate;
		}
		c->dst.val = segreg.selector;
		break;
	}
N
Nitin A Kamble 已提交
1503
	case 0x8d: /* lea r16/r32, m */
1504
		c->dst.val = c->modrm_ea;
N
Nitin A Kamble 已提交
1505
		break;
1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527
	case 0x8e: { /* mov seg, r/m16 */
		uint16_t sel;
		int type_bits;
		int err;

		sel = c->src.val;
		if (c->modrm_reg <= 5) {
			type_bits = (c->modrm_reg == 1) ? 9 : 1;
			err = kvm_load_segment_descriptor(ctxt->vcpu, sel,
							  type_bits, c->modrm_reg);
		} else {
			printk(KERN_INFO "Invalid segreg in modrm byte 0x%02x\n",
					c->modrm);
			goto cannot_emulate;
		}

		if (err < 0)
			goto cannot_emulate;

		c->dst.type = OP_NONE;  /* Disable writeback. */
		break;
	}
A
Avi Kivity 已提交
1528
	case 0x8f:		/* pop (sole member of Grp1a) */
1529 1530
		rc = emulate_grp1a(ctxt, ops);
		if (rc != 0)
A
Avi Kivity 已提交
1531 1532
			goto done;
		break;
1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543
	case 0x90: /* nop / xchg r8,rax */
		if (!(c->rex_prefix & 1)) { /* nop */
			c->dst.type = OP_NONE;
			break;
		}
	case 0x91 ... 0x97: /* xchg reg,rax */
		c->src.type = c->dst.type = OP_REG;
		c->src.bytes = c->dst.bytes = c->op_bytes;
		c->src.ptr = (unsigned long *) &c->regs[VCPU_REGS_RAX];
		c->src.val = *(c->src.ptr);
		goto xchg;
N
Nitin A Kamble 已提交
1544
	case 0x9c: /* pushf */
1545
		c->src.val =  (unsigned long) ctxt->eflags;
1546 1547
		emulate_push(ctxt);
		break;
N
Nitin A Kamble 已提交
1548
	case 0x9d: /* popf */
1549
		c->dst.ptr = (unsigned long *) &ctxt->eflags;
N
Nitin A Kamble 已提交
1550
		goto pop_instruction;
1551 1552 1553 1554 1555 1556 1557
	case 0xa0 ... 0xa1:	/* mov */
		c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
		c->dst.val = c->src.val;
		break;
	case 0xa2 ... 0xa3:	/* mov */
		c->dst.val = (unsigned long)c->regs[VCPU_REGS_RAX];
		break;
A
Avi Kivity 已提交
1558
	case 0xa4 ... 0xa5:	/* movs */
1559 1560
		c->dst.type = OP_MEM;
		c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
1561
		c->dst.ptr = (unsigned long *)register_address(c,
1562 1563
						   ctxt->es_base,
						   c->regs[VCPU_REGS_RDI]);
1564
		if ((rc = ops->read_emulated(register_address(c,
1565 1566 1567 1568 1569
		      c->override_base ? *c->override_base :
					ctxt->ds_base,
					c->regs[VCPU_REGS_RSI]),
					&c->dst.val,
					c->dst.bytes, ctxt->vcpu)) != 0)
A
Avi Kivity 已提交
1570
			goto done;
1571
		register_address_increment(c, &c->regs[VCPU_REGS_RSI],
1572
				       (ctxt->eflags & EFLG_DF) ? -c->dst.bytes
1573
							   : c->dst.bytes);
1574
		register_address_increment(c, &c->regs[VCPU_REGS_RDI],
1575
				       (ctxt->eflags & EFLG_DF) ? -c->dst.bytes
1576
							   : c->dst.bytes);
A
Avi Kivity 已提交
1577 1578
		break;
	case 0xa6 ... 0xa7:	/* cmps */
1579 1580
		c->src.type = OP_NONE; /* Disable writeback. */
		c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
1581
		c->src.ptr = (unsigned long *)register_address(c,
1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592
				c->override_base ? *c->override_base :
						   ctxt->ds_base,
						   c->regs[VCPU_REGS_RSI]);
		if ((rc = ops->read_emulated((unsigned long)c->src.ptr,
						&c->src.val,
						c->src.bytes,
						ctxt->vcpu)) != 0)
			goto done;

		c->dst.type = OP_NONE; /* Disable writeback. */
		c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
1593
		c->dst.ptr = (unsigned long *)register_address(c,
1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605
						   ctxt->es_base,
						   c->regs[VCPU_REGS_RDI]);
		if ((rc = ops->read_emulated((unsigned long)c->dst.ptr,
						&c->dst.val,
						c->dst.bytes,
						ctxt->vcpu)) != 0)
			goto done;

		DPRINTF("cmps: mem1=0x%p mem2=0x%p\n", c->src.ptr, c->dst.ptr);

		emulate_2op_SrcV("cmp", c->src, c->dst, ctxt->eflags);

1606
		register_address_increment(c, &c->regs[VCPU_REGS_RSI],
1607 1608
				       (ctxt->eflags & EFLG_DF) ? -c->src.bytes
								  : c->src.bytes);
1609
		register_address_increment(c, &c->regs[VCPU_REGS_RDI],
1610 1611 1612 1613
				       (ctxt->eflags & EFLG_DF) ? -c->dst.bytes
								  : c->dst.bytes);

		break;
A
Avi Kivity 已提交
1614
	case 0xaa ... 0xab:	/* stos */
1615 1616
		c->dst.type = OP_MEM;
		c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
1617
		c->dst.ptr = (unsigned long *)register_address(c,
1618 1619
						   ctxt->es_base,
						   c->regs[VCPU_REGS_RDI]);
1620
		c->dst.val = c->regs[VCPU_REGS_RAX];
1621
		register_address_increment(c, &c->regs[VCPU_REGS_RDI],
1622
				       (ctxt->eflags & EFLG_DF) ? -c->dst.bytes
1623
							   : c->dst.bytes);
A
Avi Kivity 已提交
1624 1625
		break;
	case 0xac ... 0xad:	/* lods */
1626 1627 1628
		c->dst.type = OP_REG;
		c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
		c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
1629
		if ((rc = ops->read_emulated(register_address(c,
1630 1631 1632 1633 1634 1635
				c->override_base ? *c->override_base :
						   ctxt->ds_base,
						 c->regs[VCPU_REGS_RSI]),
						 &c->dst.val,
						 c->dst.bytes,
						 ctxt->vcpu)) != 0)
A
Avi Kivity 已提交
1636
			goto done;
1637
		register_address_increment(c, &c->regs[VCPU_REGS_RSI],
1638
				       (ctxt->eflags & EFLG_DF) ? -c->dst.bytes
1639
							   : c->dst.bytes);
A
Avi Kivity 已提交
1640 1641 1642 1643
		break;
	case 0xae ... 0xaf:	/* scas */
		DPRINTF("Urk! I don't handle SCAS.\n");
		goto cannot_emulate;
1644 1645
	case 0xb8: /* mov r, imm */
		goto mov;
1646 1647 1648
	case 0xc0 ... 0xc1:
		emulate_grp2(ctxt);
		break;
1649 1650 1651
	case 0xc3: /* ret */
		c->dst.ptr = &c->eip;
		goto pop_instruction;
1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663
	case 0xc6 ... 0xc7:	/* mov (sole member of Grp11) */
	mov:
		c->dst.val = c->src.val;
		break;
	case 0xd0 ... 0xd1:	/* Grp2 */
		c->src.val = 1;
		emulate_grp2(ctxt);
		break;
	case 0xd2 ... 0xd3:	/* Grp2 */
		c->src.val = c->regs[VCPU_REGS_RCX];
		emulate_grp2(ctxt);
		break;
1664 1665
	case 0xe8: /* call (near) */ {
		long int rel;
1666
		switch (c->op_bytes) {
1667
		case 2:
1668
			rel = insn_fetch(s16, 2, c->eip);
1669 1670
			break;
		case 4:
1671
			rel = insn_fetch(s32, 4, c->eip);
1672 1673 1674 1675 1676
			break;
		default:
			DPRINTF("Call: Invalid op_bytes\n");
			goto cannot_emulate;
		}
1677
		c->src.val = (unsigned long) c->eip;
1678
		jmp_rel(c, rel);
1679
		c->op_bytes = c->ad_bytes;
1680 1681
		emulate_push(ctxt);
		break;
1682 1683
	}
	case 0xe9: /* jmp rel */
1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710
		goto jmp;
	case 0xea: /* jmp far */ {
		uint32_t eip;
		uint16_t sel;

		switch (c->op_bytes) {
		case 2:
			eip = insn_fetch(u16, 2, c->eip);
			break;
		case 4:
			eip = insn_fetch(u32, 4, c->eip);
			break;
		default:
			DPRINTF("jmp far: Invalid op_bytes\n");
			goto cannot_emulate;
		}
		sel = insn_fetch(u16, 2, c->eip);
		if (kvm_load_segment_descriptor(ctxt->vcpu, sel, 9, VCPU_SREG_CS) < 0) {
			DPRINTF("jmp far: Failed to load CS descriptor\n");
			goto cannot_emulate;
		}

		c->eip = eip;
		break;
	}
	case 0xeb:
	      jmp:		/* jmp rel short */
1711
		jmp_rel(c, c->src.val);
1712
		c->dst.type = OP_NONE; /* Disable writeback. */
1713
		break;
1714
	case 0xf4:              /* hlt */
1715
		ctxt->vcpu->arch.halt_request = 1;
1716 1717 1718 1719 1720 1721
		goto done;
	case 0xf5:	/* cmc */
		/* complement carry flag from eflags reg */
		ctxt->eflags ^= EFLG_CF;
		c->dst.type = OP_NONE;	/* Disable writeback. */
		break;
1722 1723 1724 1725 1726
	case 0xf6 ... 0xf7:	/* Grp3 */
		rc = emulate_grp3(ctxt, ops);
		if (rc != 0)
			goto done;
		break;
1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738
	case 0xf8: /* clc */
		ctxt->eflags &= ~EFLG_CF;
		c->dst.type = OP_NONE;	/* Disable writeback. */
		break;
	case 0xfa: /* cli */
		ctxt->eflags &= ~X86_EFLAGS_IF;
		c->dst.type = OP_NONE;	/* Disable writeback. */
		break;
	case 0xfb: /* sti */
		ctxt->eflags |= X86_EFLAGS_IF;
		c->dst.type = OP_NONE;	/* Disable writeback. */
		break;
1739 1740 1741 1742 1743
	case 0xfe ... 0xff:	/* Grp4/Grp5 */
		rc = emulate_grp45(ctxt, ops);
		if (rc != 0)
			goto done;
		break;
A
Avi Kivity 已提交
1744
	}
1745 1746 1747 1748 1749 1750 1751

writeback:
	rc = writeback(ctxt, ops);
	if (rc != 0)
		goto done;

	/* Commit shadow register state. */
1752 1753
	memcpy(ctxt->vcpu->arch.regs, c->regs, sizeof c->regs);
	ctxt->vcpu->arch.rip = c->eip;
1754 1755 1756 1757 1758 1759 1760

done:
	if (rc == X86EMUL_UNHANDLEABLE) {
		c->eip = saved_eip;
		return -1;
	}
	return 0;
A
Avi Kivity 已提交
1761 1762

twobyte_insn:
1763
	switch (c->b) {
A
Avi Kivity 已提交
1764
	case 0x01: /* lgdt, lidt, lmsw */
1765
		switch (c->modrm_reg) {
A
Avi Kivity 已提交
1766 1767 1768
			u16 size;
			unsigned long address;

1769
		case 0: /* vmcall */
1770
			if (c->modrm_mod != 3 || c->modrm_rm != 1)
1771 1772
				goto cannot_emulate;

1773 1774 1775 1776
			rc = kvm_fix_hypercall(ctxt->vcpu);
			if (rc)
				goto done;

1777 1778
			/* Let the processor re-execute the fixed hypercall */
			c->eip = ctxt->vcpu->arch.rip;
1779 1780
			/* Disable writeback. */
			c->dst.type = OP_NONE;
1781
			break;
A
Avi Kivity 已提交
1782
		case 2: /* lgdt */
1783 1784
			rc = read_descriptor(ctxt, ops, c->src.ptr,
					     &size, &address, c->op_bytes);
A
Avi Kivity 已提交
1785 1786 1787
			if (rc)
				goto done;
			realmode_lgdt(ctxt->vcpu, size, address);
1788 1789
			/* Disable writeback. */
			c->dst.type = OP_NONE;
A
Avi Kivity 已提交
1790
			break;
1791
		case 3: /* lidt/vmmcall */
1792
			if (c->modrm_mod == 3 && c->modrm_rm == 1) {
1793 1794 1795 1796
				rc = kvm_fix_hypercall(ctxt->vcpu);
				if (rc)
					goto done;
				kvm_emulate_hypercall(ctxt->vcpu);
1797
			} else {
1798
				rc = read_descriptor(ctxt, ops, c->src.ptr,
1799
						     &size, &address,
1800
						     c->op_bytes);
1801 1802 1803 1804
				if (rc)
					goto done;
				realmode_lidt(ctxt->vcpu, size, address);
			}
1805 1806
			/* Disable writeback. */
			c->dst.type = OP_NONE;
A
Avi Kivity 已提交
1807 1808
			break;
		case 4: /* smsw */
1809 1810
			c->dst.bytes = 2;
			c->dst.val = realmode_get_cr(ctxt->vcpu, 0);
A
Avi Kivity 已提交
1811 1812
			break;
		case 6: /* lmsw */
1813 1814
			realmode_lmsw(ctxt->vcpu, (u16)c->src.val,
				      &ctxt->eflags);
1815
			c->dst.type = OP_NONE;
A
Avi Kivity 已提交
1816 1817
			break;
		case 7: /* invlpg*/
1818
			emulate_invlpg(ctxt->vcpu, memop);
1819 1820
			/* Disable writeback. */
			c->dst.type = OP_NONE;
A
Avi Kivity 已提交
1821 1822 1823 1824 1825
			break;
		default:
			goto cannot_emulate;
		}
		break;
1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842
	case 0x06:
		emulate_clts(ctxt->vcpu);
		c->dst.type = OP_NONE;
		break;
	case 0x08:		/* invd */
	case 0x09:		/* wbinvd */
	case 0x0d:		/* GrpP (prefetch) */
	case 0x18:		/* Grp16 (prefetch/nop) */
		c->dst.type = OP_NONE;
		break;
	case 0x20: /* mov cr, reg */
		if (c->modrm_mod != 3)
			goto cannot_emulate;
		c->regs[c->modrm_rm] =
				realmode_get_cr(ctxt->vcpu, c->modrm_reg);
		c->dst.type = OP_NONE;	/* no writeback */
		break;
A
Avi Kivity 已提交
1843
	case 0x21: /* mov from dr to reg */
1844
		if (c->modrm_mod != 3)
A
Avi Kivity 已提交
1845
			goto cannot_emulate;
1846
		rc = emulator_get_dr(ctxt, c->modrm_reg, &c->regs[c->modrm_rm]);
1847 1848 1849
		if (rc)
			goto cannot_emulate;
		c->dst.type = OP_NONE;	/* no writeback */
A
Avi Kivity 已提交
1850
		break;
1851 1852 1853 1854 1855 1856 1857
	case 0x22: /* mov reg, cr */
		if (c->modrm_mod != 3)
			goto cannot_emulate;
		realmode_set_cr(ctxt->vcpu,
				c->modrm_reg, c->modrm_val, &ctxt->eflags);
		c->dst.type = OP_NONE;
		break;
A
Avi Kivity 已提交
1858
	case 0x23: /* mov from reg to dr */
1859
		if (c->modrm_mod != 3)
A
Avi Kivity 已提交
1860
			goto cannot_emulate;
1861 1862
		rc = emulator_set_dr(ctxt, c->modrm_reg,
				     c->regs[c->modrm_rm]);
1863 1864 1865
		if (rc)
			goto cannot_emulate;
		c->dst.type = OP_NONE;	/* no writeback */
A
Avi Kivity 已提交
1866
		break;
1867 1868 1869 1870 1871 1872
	case 0x30:
		/* wrmsr */
		msr_data = (u32)c->regs[VCPU_REGS_RAX]
			| ((u64)c->regs[VCPU_REGS_RDX] << 32);
		rc = kvm_set_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], msr_data);
		if (rc) {
1873
			kvm_inject_gp(ctxt->vcpu, 0);
1874
			c->eip = ctxt->vcpu->arch.rip;
1875 1876 1877 1878 1879 1880 1881 1882
		}
		rc = X86EMUL_CONTINUE;
		c->dst.type = OP_NONE;
		break;
	case 0x32:
		/* rdmsr */
		rc = kvm_get_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], &msr_data);
		if (rc) {
1883
			kvm_inject_gp(ctxt->vcpu, 0);
1884
			c->eip = ctxt->vcpu->arch.rip;
1885 1886 1887 1888 1889 1890 1891
		} else {
			c->regs[VCPU_REGS_RAX] = (u32)msr_data;
			c->regs[VCPU_REGS_RDX] = msr_data >> 32;
		}
		rc = X86EMUL_CONTINUE;
		c->dst.type = OP_NONE;
		break;
A
Avi Kivity 已提交
1892
	case 0x40 ... 0x4f:	/* cmov */
1893
		c->dst.val = c->dst.orig_val = c->src.val;
1894 1895
		if (!test_cc(c->b, ctxt->eflags))
			c->dst.type = OP_NONE; /* no writeback */
A
Avi Kivity 已提交
1896
		break;
1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914
	case 0x80 ... 0x8f: /* jnz rel, etc*/ {
		long int rel;

		switch (c->op_bytes) {
		case 2:
			rel = insn_fetch(s16, 2, c->eip);
			break;
		case 4:
			rel = insn_fetch(s32, 4, c->eip);
			break;
		case 8:
			rel = insn_fetch(s64, 8, c->eip);
			break;
		default:
			DPRINTF("jnz: Invalid op_bytes\n");
			goto cannot_emulate;
		}
		if (test_cc(c->b, ctxt->eflags))
1915
			jmp_rel(c, rel);
1916 1917 1918
		c->dst.type = OP_NONE;
		break;
	}
1919 1920
	case 0xa3:
	      bt:		/* bt */
Q
Qing He 已提交
1921
		c->dst.type = OP_NONE;
1922 1923
		/* only subword offset */
		c->src.val &= (c->dst.bytes << 3) - 1;
1924
		emulate_2op_SrcV_nobyte("bt", c->src, c->dst, ctxt->eflags);
1925 1926 1927
		break;
	case 0xab:
	      bts:		/* bts */
1928 1929
		/* only subword offset */
		c->src.val &= (c->dst.bytes << 3) - 1;
1930
		emulate_2op_SrcV_nobyte("bts", c->src, c->dst, ctxt->eflags);
1931
		break;
A
Avi Kivity 已提交
1932 1933 1934 1935 1936
	case 0xb0 ... 0xb1:	/* cmpxchg */
		/*
		 * Save real source value, then compare EAX against
		 * destination.
		 */
1937 1938
		c->src.orig_val = c->src.val;
		c->src.val = c->regs[VCPU_REGS_RAX];
1939 1940
		emulate_2op_SrcV("cmp", c->src, c->dst, ctxt->eflags);
		if (ctxt->eflags & EFLG_ZF) {
A
Avi Kivity 已提交
1941
			/* Success: write back to memory. */
1942
			c->dst.val = c->src.orig_val;
A
Avi Kivity 已提交
1943 1944
		} else {
			/* Failure: write the value we saw to EAX. */
1945 1946
			c->dst.type = OP_REG;
			c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
A
Avi Kivity 已提交
1947 1948 1949 1950
		}
		break;
	case 0xb3:
	      btr:		/* btr */
1951 1952
		/* only subword offset */
		c->src.val &= (c->dst.bytes << 3) - 1;
1953
		emulate_2op_SrcV_nobyte("btr", c->src, c->dst, ctxt->eflags);
A
Avi Kivity 已提交
1954 1955
		break;
	case 0xb6 ... 0xb7:	/* movzx */
1956 1957 1958
		c->dst.bytes = c->op_bytes;
		c->dst.val = (c->d & ByteOp) ? (u8) c->src.val
						       : (u16) c->src.val;
A
Avi Kivity 已提交
1959 1960
		break;
	case 0xba:		/* Grp8 */
1961
		switch (c->modrm_reg & 3) {
A
Avi Kivity 已提交
1962 1963 1964 1965 1966 1967 1968 1969 1970 1971
		case 0:
			goto bt;
		case 1:
			goto bts;
		case 2:
			goto btr;
		case 3:
			goto btc;
		}
		break;
1972 1973
	case 0xbb:
	      btc:		/* btc */
1974 1975
		/* only subword offset */
		c->src.val &= (c->dst.bytes << 3) - 1;
1976
		emulate_2op_SrcV_nobyte("btc", c->src, c->dst, ctxt->eflags);
1977
		break;
A
Avi Kivity 已提交
1978
	case 0xbe ... 0xbf:	/* movsx */
1979 1980 1981
		c->dst.bytes = c->op_bytes;
		c->dst.val = (c->d & ByteOp) ? (s8) c->src.val :
							(s16) c->src.val;
A
Avi Kivity 已提交
1982
		break;
1983
	case 0xc3:		/* movnti */
1984 1985 1986
		c->dst.bytes = c->op_bytes;
		c->dst.val = (c->op_bytes == 4) ? (u32) c->src.val :
							(u64) c->src.val;
1987
		break;
A
Avi Kivity 已提交
1988
	case 0xc7:		/* Grp9 (cmpxchg8b) */
1989
		rc = emulate_grp9(ctxt, ops, memop);
1990 1991
		if (rc != 0)
			goto done;
1992
		c->dst.type = OP_NONE;
1993
		break;
A
Avi Kivity 已提交
1994 1995 1996 1997
	}
	goto writeback;

cannot_emulate:
1998
	DPRINTF("Cannot emulate %02x\n", c->b);
1999
	c->eip = saved_eip;
A
Avi Kivity 已提交
2000 2001
	return -1;
}