i8259.c 14.5 KB
Newer Older
1 2 3 4 5
/*
 * 8259 interrupt controller emulation
 *
 * Copyright (c) 2003-2004 Fabrice Bellard
 * Copyright (c) 2007 Intel Corporation
N
Nicolas Kaiser 已提交
6
 * Copyright 2009 Red Hat, Inc. and/or its affiliates.
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 * Authors:
 *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
 *   Port from Qemu.
 */
#include <linux/mm.h>
30
#include <linux/slab.h>
31
#include <linux/bitops.h>
32
#include "irq.h"
33 34

#include <linux/kvm_host.h>
35
#include "trace.h"
36

37 38 39
#define pr_pic_unimpl(fmt, ...)	\
	pr_err_ratelimited("kvm: pic: " fmt, ## __VA_ARGS__)

40 41
static void pic_irq_request(struct kvm *kvm, int level);

42 43 44
static void pic_lock(struct kvm_pic *s)
	__acquires(&s->lock)
{
45
	spin_lock(&s->lock);
46 47 48 49 50 51
}

static void pic_unlock(struct kvm_pic *s)
	__releases(&s->lock)
{
	bool wakeup = s->wakeup_needed;
52 53
	struct kvm_vcpu *vcpu, *found = NULL;
	int i;
54 55 56

	s->wakeup_needed = false;

57
	spin_unlock(&s->lock);
58 59

	if (wakeup) {
60 61 62 63 64 65 66
		kvm_for_each_vcpu(i, vcpu, s->kvm) {
			if (kvm_apic_accept_pic_intr(vcpu)) {
				found = vcpu;
				break;
			}
		}

67 68 69
		if (!found)
			return;

70
		kvm_make_request(KVM_REQ_EVENT, found);
71
		kvm_vcpu_kick(found);
72 73 74
	}
}

75 76 77
static void pic_clear_isr(struct kvm_kpic_state *s, int irq)
{
	s->isr &= ~(1 << irq);
78 79
	if (s != &s->pics_state->pics[0])
		irq += 8;
G
Gleb Natapov 已提交
80 81 82 83 84 85
	/*
	 * We are dropping lock while calling ack notifiers since ack
	 * notifier callbacks for assigned devices call into PIC recursively.
	 * Other interrupt may be delivered to PIC while lock is dropped but
	 * it should be safe since PIC state is already updated at this stage.
	 */
86
	pic_unlock(s->pics_state);
87
	kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq);
88
	pic_lock(s->pics_state);
M
Marcelo Tosatti 已提交
89 90
}

91 92 93
/*
 * set irq level. If an edge is detected, then the IRR is set to 1
 */
94
static inline int pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
95
{
96
	int mask, ret = 1;
97 98 99
	mask = 1 << irq;
	if (s->elcr & mask)	/* level triggered */
		if (level) {
100
			ret = !(s->irr & mask);
101 102 103 104 105 106 107 108
			s->irr |= mask;
			s->last_irr |= mask;
		} else {
			s->irr &= ~mask;
			s->last_irr &= ~mask;
		}
	else	/* edge triggered */
		if (level) {
109 110
			if ((s->last_irr & mask) == 0) {
				ret = !(s->irr & mask);
111
				s->irr |= mask;
112
			}
113 114 115
			s->last_irr |= mask;
		} else
			s->last_irr &= ~mask;
116 117

	return (s->imr & mask) ? -1 : ret;
118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180
}

/*
 * return the highest priority found in mask (highest = smallest
 * number). Return 8 if no irq
 */
static inline int get_priority(struct kvm_kpic_state *s, int mask)
{
	int priority;
	if (mask == 0)
		return 8;
	priority = 0;
	while ((mask & (1 << ((priority + s->priority_add) & 7))) == 0)
		priority++;
	return priority;
}

/*
 * return the pic wanted interrupt. return -1 if none
 */
static int pic_get_irq(struct kvm_kpic_state *s)
{
	int mask, cur_priority, priority;

	mask = s->irr & ~s->imr;
	priority = get_priority(s, mask);
	if (priority == 8)
		return -1;
	/*
	 * compute current priority. If special fully nested mode on the
	 * master, the IRQ coming from the slave is not taken into account
	 * for the priority computation.
	 */
	mask = s->isr;
	if (s->special_fully_nested_mode && s == &s->pics_state->pics[0])
		mask &= ~(1 << 2);
	cur_priority = get_priority(s, mask);
	if (priority < cur_priority)
		/*
		 * higher priority found: an irq should be generated
		 */
		return (priority + s->priority_add) & 7;
	else
		return -1;
}

/*
 * raise irq to CPU if necessary. must be called every time the active
 * irq may change
 */
static void pic_update_irq(struct kvm_pic *s)
{
	int irq2, irq;

	irq2 = pic_get_irq(&s->pics[1]);
	if (irq2 >= 0) {
		/*
		 * if irq request by slave pic, signal master PIC
		 */
		pic_set_irq1(&s->pics[0], 2, 1);
		pic_set_irq1(&s->pics[0], 2, 0);
	}
	irq = pic_get_irq(&s->pics[0]);
181
	pic_irq_request(s->kvm, irq >= 0);
182 183
}

184 185
void kvm_pic_update_irq(struct kvm_pic *s)
{
186
	pic_lock(s);
187
	pic_update_irq(s);
188
	pic_unlock(s);
189 190
}

191
int kvm_pic_set_irq(struct kvm_pic *s, int irq, int irq_source_id, int level)
192
{
193 194 195
	int ret, irq_level;

	BUG_ON(irq < 0 || irq >= PIC_NUM_PINS);
196

197
	pic_lock(s);
198 199 200 201 202 203
	irq_level = __kvm_irq_line_state(&s->irq_states[irq],
					 irq_source_id, level);
	ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, irq_level);
	pic_update_irq(s);
	trace_kvm_pic_set_irq(irq >> 3, irq & 7, s->pics[irq >> 3].elcr,
			      s->pics[irq >> 3].imr, ret == 0);
204
	pic_unlock(s);
205 206

	return ret;
207 208
}

209 210 211 212 213 214 215 216 217 218
void kvm_pic_clear_all(struct kvm_pic *s, int irq_source_id)
{
	int i;

	pic_lock(s);
	for (i = 0; i < PIC_NUM_PINS; i++)
		__clear_bit(irq_source_id, &s->irq_states[i]);
	pic_unlock(s);
}

219 220 221 222 223
/*
 * acknowledge interrupt 'irq'
 */
static inline void pic_intack(struct kvm_kpic_state *s, int irq)
{
224
	s->isr |= 1 << irq;
225 226 227 228 229
	/*
	 * We don't clear a level sensitive interrupt here
	 */
	if (!(s->elcr & (1 << irq)))
		s->irr &= ~(1 << irq);
G
Gleb Natapov 已提交
230 231 232 233 234 235 236

	if (s->auto_eoi) {
		if (s->rotate_on_auto_eoi)
			s->priority_add = (irq + 1) & 7;
		pic_clear_isr(s, irq);
	}

237 238
}

M
Marcelo Tosatti 已提交
239
int kvm_pic_read_irq(struct kvm *kvm)
240 241
{
	int irq, irq2, intno;
M
Marcelo Tosatti 已提交
242
	struct kvm_pic *s = pic_irqchip(kvm);
243

244 245
	s->output = 0;

246
	pic_lock(s);
247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270
	irq = pic_get_irq(&s->pics[0]);
	if (irq >= 0) {
		pic_intack(&s->pics[0], irq);
		if (irq == 2) {
			irq2 = pic_get_irq(&s->pics[1]);
			if (irq2 >= 0)
				pic_intack(&s->pics[1], irq2);
			else
				/*
				 * spurious IRQ on slave controller
				 */
				irq2 = 7;
			intno = s->pics[1].irq_base + irq2;
			irq = irq2 + 8;
		} else
			intno = s->pics[0].irq_base + irq;
	} else {
		/*
		 * spurious IRQ on host controller
		 */
		irq = 7;
		intno = s->pics[0].irq_base + irq;
	}
	pic_update_irq(s);
271
	pic_unlock(s);
272 273 274 275

	return intno;
}

276
void kvm_pic_reset(struct kvm_kpic_state *s)
277
{
278 279
	int irq, i;
	struct kvm_vcpu *vcpu;
G
Gleb Natapov 已提交
280
	u8 edge_irr = s->irr & ~s->elcr;
281
	bool found = false;
M
Marcelo Tosatti 已提交
282

283
	s->last_irr = 0;
G
Gleb Natapov 已提交
284
	s->irr &= s->elcr;
285 286 287
	s->imr = 0;
	s->priority_add = 0;
	s->special_mask = 0;
G
Gleb Natapov 已提交
288 289 290 291 292 293
	s->read_reg_select = 0;
	if (!s->init4) {
		s->special_fully_nested_mode = 0;
		s->auto_eoi = 0;
	}
	s->init_state = 1;
294

295 296 297 298 299 300 301 302 303 304 305
	kvm_for_each_vcpu(i, vcpu, s->pics_state->kvm)
		if (kvm_apic_accept_pic_intr(vcpu)) {
			found = true;
			break;
		}


	if (!found)
		return;

	for (irq = 0; irq < PIC_NUM_PINS/2; irq++)
G
Gleb Natapov 已提交
306
		if (edge_irr & (1 << irq))
307
			pic_clear_isr(s, irq);
308 309 310 311 312 313 314 315 316 317 318 319
}

static void pic_ioport_write(void *opaque, u32 addr, u32 val)
{
	struct kvm_kpic_state *s = opaque;
	int priority, cmd, irq;

	addr &= 1;
	if (addr == 0) {
		if (val & 0x10) {
			s->init4 = val & 1;
			if (val & 0x02)
320
				pr_pic_unimpl("single mode not supported");
321
			if (val & 0x08)
322
				pr_pic_unimpl(
G
Gleb Natapov 已提交
323 324
						"level sensitive irq not supported");
			kvm_pic_reset(s);
325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345
		} else if (val & 0x08) {
			if (val & 0x04)
				s->poll = 1;
			if (val & 0x02)
				s->read_reg_select = val & 1;
			if (val & 0x40)
				s->special_mask = (val >> 5) & 1;
		} else {
			cmd = val >> 5;
			switch (cmd) {
			case 0:
			case 4:
				s->rotate_on_auto_eoi = cmd >> 2;
				break;
			case 1:	/* end of interrupt */
			case 5:
				priority = get_priority(s, s->isr);
				if (priority != 8) {
					irq = (priority + s->priority_add) & 7;
					if (cmd == 5)
						s->priority_add = (irq + 1) & 7;
G
Gleb Natapov 已提交
346
					pic_clear_isr(s, irq);
347 348 349 350 351
					pic_update_irq(s->pics_state);
				}
				break;
			case 3:
				irq = val & 7;
352
				pic_clear_isr(s, irq);
353 354 355 356 357 358 359 360 361
				pic_update_irq(s->pics_state);
				break;
			case 6:
				s->priority_add = (val + 1) & 7;
				pic_update_irq(s->pics_state);
				break;
			case 7:
				irq = val & 7;
				s->priority_add = (irq + 1) & 7;
362
				pic_clear_isr(s, irq);
363 364 365 366 367 368 369 370
				pic_update_irq(s->pics_state);
				break;
			default:
				break;	/* no operation */
			}
		}
	} else
		switch (s->init_state) {
371 372 373
		case 0: { /* normal mode */
			u8 imr_diff = s->imr ^ val,
				off = (s == &s->pics_state->pics[0]) ? 0 : 8;
374
			s->imr = val;
375 376 377 378 379 380 381
			for (irq = 0; irq < PIC_NUM_PINS/2; irq++)
				if (imr_diff & (1 << irq))
					kvm_fire_mask_notifiers(
						s->pics_state->kvm,
						SELECT_PIC(irq + off),
						irq + off,
						!!(s->imr & (1 << irq)));
382 383
			pic_update_irq(s->pics_state);
			break;
384
		}
385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413
		case 1:
			s->irq_base = val & 0xf8;
			s->init_state = 2;
			break;
		case 2:
			if (s->init4)
				s->init_state = 3;
			else
				s->init_state = 0;
			break;
		case 3:
			s->special_fully_nested_mode = (val >> 4) & 1;
			s->auto_eoi = (val >> 1) & 1;
			s->init_state = 0;
			break;
		}
}

static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1)
{
	int ret;

	ret = pic_get_irq(s);
	if (ret >= 0) {
		if (addr1 >> 7) {
			s->pics_state->pics[0].isr &= ~(1 << 2);
			s->pics_state->pics[0].irr &= ~(1 << 2);
		}
		s->irr &= ~(1 << ret);
414
		pic_clear_isr(s, ret);
415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458
		if (addr1 >> 7 || ret != 2)
			pic_update_irq(s->pics_state);
	} else {
		ret = 0x07;
		pic_update_irq(s->pics_state);
	}

	return ret;
}

static u32 pic_ioport_read(void *opaque, u32 addr1)
{
	struct kvm_kpic_state *s = opaque;
	unsigned int addr;
	int ret;

	addr = addr1;
	addr &= 1;
	if (s->poll) {
		ret = pic_poll_read(s, addr1);
		s->poll = 0;
	} else
		if (addr == 0)
			if (s->read_reg_select)
				ret = s->isr;
			else
				ret = s->irr;
		else
			ret = s->imr;
	return ret;
}

static void elcr_ioport_write(void *opaque, u32 addr, u32 val)
{
	struct kvm_kpic_state *s = opaque;
	s->elcr = val & s->elcr_mask;
}

static u32 elcr_ioport_read(void *opaque, u32 addr1)
{
	struct kvm_kpic_state *s = opaque;
	return s->elcr;
}

459
static int picdev_in_range(gpa_t addr)
460 461 462 463 464 465 466 467 468 469 470 471 472 473
{
	switch (addr) {
	case 0x20:
	case 0x21:
	case 0xa0:
	case 0xa1:
	case 0x4d0:
	case 0x4d1:
		return 1;
	default:
		return 0;
	}
}

474
static int picdev_write(struct kvm_pic *s,
475 476 477
			 gpa_t addr, int len, const void *val)
{
	unsigned char data = *(unsigned char *)val;
478 479
	if (!picdev_in_range(addr))
		return -EOPNOTSUPP;
480 481

	if (len != 1) {
482
		pr_pic_unimpl("non byte write\n");
483
		return 0;
484
	}
485
	pic_lock(s);
486 487 488 489 490 491 492 493 494 495 496 497
	switch (addr) {
	case 0x20:
	case 0x21:
	case 0xa0:
	case 0xa1:
		pic_ioport_write(&s->pics[addr >> 7], addr, data);
		break;
	case 0x4d0:
	case 0x4d1:
		elcr_ioport_write(&s->pics[addr & 1], addr, data);
		break;
	}
498
	pic_unlock(s);
499
	return 0;
500 501
}

502
static int picdev_read(struct kvm_pic *s,
503
		       gpa_t addr, int len, void *val)
504 505
{
	unsigned char data = 0;
506 507
	if (!picdev_in_range(addr))
		return -EOPNOTSUPP;
508 509

	if (len != 1) {
510
		memset(val, 0, len);
511
		pr_pic_unimpl("non byte read\n");
512
		return 0;
513
	}
514
	pic_lock(s);
515 516 517 518 519 520 521 522 523 524 525 526 527
	switch (addr) {
	case 0x20:
	case 0x21:
	case 0xa0:
	case 0xa1:
		data = pic_ioport_read(&s->pics[addr >> 7], addr);
		break;
	case 0x4d0:
	case 0x4d1:
		data = elcr_ioport_read(&s->pics[addr & 1], addr);
		break;
	}
	*(unsigned char *)val = data;
528
	pic_unlock(s);
529
	return 0;
530 531
}

532
static int picdev_master_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
533 534 535 536 537 538
			       gpa_t addr, int len, const void *val)
{
	return picdev_write(container_of(dev, struct kvm_pic, dev_master),
			    addr, len, val);
}

539
static int picdev_master_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
540 541 542 543 544 545
			      gpa_t addr, int len, void *val)
{
	return picdev_read(container_of(dev, struct kvm_pic, dev_master),
			    addr, len, val);
}

546
static int picdev_slave_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
547 548 549 550 551 552
			      gpa_t addr, int len, const void *val)
{
	return picdev_write(container_of(dev, struct kvm_pic, dev_slave),
			    addr, len, val);
}

553
static int picdev_slave_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
554 555 556 557 558 559
			     gpa_t addr, int len, void *val)
{
	return picdev_read(container_of(dev, struct kvm_pic, dev_slave),
			    addr, len, val);
}

560
static int picdev_eclr_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
561 562 563 564 565 566
			     gpa_t addr, int len, const void *val)
{
	return picdev_write(container_of(dev, struct kvm_pic, dev_eclr),
			    addr, len, val);
}

567
static int picdev_eclr_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev,
568 569 570 571 572 573
			    gpa_t addr, int len, void *val)
{
	return picdev_read(container_of(dev, struct kvm_pic, dev_eclr),
			    addr, len, val);
}

574 575 576
/*
 * callback when PIC0 irq status changed
 */
577
static void pic_irq_request(struct kvm *kvm, int level)
578
{
M
Marcelo Tosatti 已提交
579
	struct kvm_pic *s = pic_irqchip(kvm);
580

581
	if (!s->output)
582
		s->wakeup_needed = true;
583
	s->output = level;
584 585
}

586 587 588 589 590 591 592 593 594 595 596 597 598
static const struct kvm_io_device_ops picdev_master_ops = {
	.read     = picdev_master_read,
	.write    = picdev_master_write,
};

static const struct kvm_io_device_ops picdev_slave_ops = {
	.read     = picdev_slave_read,
	.write    = picdev_slave_write,
};

static const struct kvm_io_device_ops picdev_eclr_ops = {
	.read     = picdev_eclr_read,
	.write    = picdev_eclr_write,
G
Gregory Haskins 已提交
599 600
};

601
int kvm_pic_init(struct kvm *kvm)
602 603
{
	struct kvm_pic *s;
604 605
	int ret;

606 607
	s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL);
	if (!s)
608
		return -ENOMEM;
609
	spin_lock_init(&s->lock);
610
	s->kvm = kvm;
611 612 613 614 615 616 617 618
	s->pics[0].elcr_mask = 0xf8;
	s->pics[1].elcr_mask = 0xde;
	s->pics[0].pics_state = s;
	s->pics[1].pics_state = s;

	/*
	 * Initialize PIO device
	 */
619 620 621
	kvm_iodevice_init(&s->dev_master, &picdev_master_ops);
	kvm_iodevice_init(&s->dev_slave, &picdev_slave_ops);
	kvm_iodevice_init(&s->dev_eclr, &picdev_eclr_ops);
622
	mutex_lock(&kvm->slots_lock);
623 624 625 626 627 628 629 630 631 632 633 634 635
	ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0x20, 2,
				      &s->dev_master);
	if (ret < 0)
		goto fail_unlock;

	ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0xa0, 2, &s->dev_slave);
	if (ret < 0)
		goto fail_unreg_2;

	ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0x4d0, 2, &s->dev_eclr);
	if (ret < 0)
		goto fail_unreg_1;

636
	mutex_unlock(&kvm->slots_lock);
637

638 639 640
	kvm->arch.vpic = s;

	return 0;
641 642 643 644 645 646 647 648 649 650 651 652

fail_unreg_1:
	kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &s->dev_slave);

fail_unreg_2:
	kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &s->dev_master);

fail_unlock:
	mutex_unlock(&kvm->slots_lock);

	kfree(s);

653
	return ret;
654
}
655

656
void kvm_pic_destroy(struct kvm *kvm)
657
{
658 659
	struct kvm_pic *vpic = kvm->arch.vpic;

660 661 662
	if (!vpic)
		return;

663 664 665
	kvm_io_bus_unregister_dev(vpic->kvm, KVM_PIO_BUS, &vpic->dev_master);
	kvm_io_bus_unregister_dev(vpic->kvm, KVM_PIO_BUS, &vpic->dev_slave);
	kvm_io_bus_unregister_dev(vpic->kvm, KVM_PIO_BUS, &vpic->dev_eclr);
666 667

	kvm->arch.vpic = NULL;
668
	kfree(vpic);
669
}