ehci-au1xxx.c 8.0 KB
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/*
 * EHCI HCD (Host Controller Driver) for USB.
 *
 * Bus Glue for AMD Alchemy Au1xxx
 *
 * Based on "ohci-au1xxx.c" by Matt Porter <mporter@kernel.crashing.org>
 *
 * Modified for AMD Alchemy Au1200 EHC
 *  by K.Boge <karsten.boge@amd.com>
 *
 * This file is licenced under the GPL.
 */

#include <linux/platform_device.h>
#include <asm/mach-au1x00/au1000.h>

#define USB_HOST_CONFIG   (USB_MSR_BASE + USB_MSR_MCFG)
#define USB_MCFG_PFEN     (1<<31)
#define USB_MCFG_RDCOMB   (1<<30)
#define USB_MCFG_SSDEN    (1<<23)
#define USB_MCFG_PHYPLLEN (1<<19)
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#define USB_MCFG_UCECLKEN (1<<18)
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#define USB_MCFG_EHCCLKEN (1<<17)
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#ifdef CONFIG_DMA_COHERENT
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#define USB_MCFG_UCAM     (1<<7)
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#else
#define USB_MCFG_UCAM     (0)
#endif
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#define USB_MCFG_EBMEN    (1<<3)
#define USB_MCFG_EMEMEN   (1<<2)

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#define USBH_ENABLE_CE	(USB_MCFG_PHYPLLEN | USB_MCFG_EHCCLKEN)
#define USBH_ENABLE_INIT (USB_MCFG_PFEN  | USB_MCFG_RDCOMB |	\
			  USBH_ENABLE_CE | USB_MCFG_SSDEN  |	\
			  USB_MCFG_UCAM  | USB_MCFG_EBMEN  |	\
			  USB_MCFG_EMEMEN)
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#define USBH_DISABLE      (USB_MCFG_EBMEN | USB_MCFG_EMEMEN)

extern int usb_disabled(void);

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static void au1xxx_start_ehc(void)
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{
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	/* enable clock to EHCI block and HS PHY PLL*/
	au_writel(au_readl(USB_HOST_CONFIG) | USBH_ENABLE_CE, USB_HOST_CONFIG);
	au_sync();
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	udelay(1000);

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	/* enable EHCI mmio */
	au_writel(au_readl(USB_HOST_CONFIG) | USBH_ENABLE_INIT, USB_HOST_CONFIG);
	au_sync();
	udelay(1000);
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}

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static void au1xxx_stop_ehc(void)
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{
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	unsigned long c;
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	/* Disable mem */
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	au_writel(au_readl(USB_HOST_CONFIG) & ~USBH_DISABLE, USB_HOST_CONFIG);
	au_sync();
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	udelay(1000);
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	/* Disable EHC clock. If the HS PHY is unused disable it too. */
	c = au_readl(USB_HOST_CONFIG) & ~USB_MCFG_EHCCLKEN;
	if (!(c & USB_MCFG_UCECLKEN))		/* UDC disabled? */
		c &= ~USB_MCFG_PHYPLLEN;	/* yes: disable HS PHY PLL */
	au_writel(c, USB_HOST_CONFIG);
	au_sync();
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}

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static int au1xxx_ehci_setup(struct usb_hcd *hcd)
{
	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	int ret = ehci_init(hcd);

	ehci->need_io_watchdog = 0;
	return ret;
}

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static const struct hc_driver ehci_au1xxx_hc_driver = {
	.description		= hcd_name,
	.product_desc		= "Au1xxx EHCI",
	.hcd_priv_size		= sizeof(struct ehci_hcd),
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	/*
	 * generic hardware linkage
	 */
	.irq			= ehci_irq,
	.flags			= HCD_MEMORY | HCD_USB2,
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	/*
	 * basic lifecycle operations
	 *
	 * FIXME -- ehci_init() doesn't do enough here.
	 * See ehci-ppc-soc for a complete implementation.
	 */
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	.reset			= au1xxx_ehci_setup,
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	.start			= ehci_run,
	.stop			= ehci_stop,
	.shutdown		= ehci_shutdown,

	/*
	 * managing i/o requests and associated device resources
	 */
	.urb_enqueue		= ehci_urb_enqueue,
	.urb_dequeue		= ehci_urb_dequeue,
	.endpoint_disable	= ehci_endpoint_disable,
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	.endpoint_reset		= ehci_endpoint_reset,
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	/*
	 * scheduling support
	 */
	.get_frame_number	= ehci_get_frame,

	/*
	 * root hub support
	 */
	.hub_status_data	= ehci_hub_status_data,
	.hub_control		= ehci_hub_control,
	.bus_suspend		= ehci_bus_suspend,
	.bus_resume		= ehci_bus_resume,
	.relinquish_port	= ehci_relinquish_port,
	.port_handed_over	= ehci_port_handed_over,
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	.clear_tt_buffer_complete	= ehci_clear_tt_buffer_complete,
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};

static int ehci_hcd_au1xxx_drv_probe(struct platform_device *pdev)
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{
	struct usb_hcd *hcd;
	struct ehci_hcd *ehci;
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	struct resource *res;
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	int ret;
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	if (usb_disabled())
		return -ENODEV;
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#if defined(CONFIG_SOC_AU1200) && defined(CONFIG_DMA_COHERENT)
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	/* Au1200 AB USB does not support coherent memory */
	if (!(read_c0_prid() & 0xff)) {
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		printk(KERN_INFO "%s: this is chip revision AB!\n", pdev->name);
		printk(KERN_INFO "%s: update your board or re-configure"
				 " the kernel\n", pdev->name);
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		return -ENODEV;
	}
#endif

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	if (pdev->resource[1].flags != IORESOURCE_IRQ) {
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		pr_debug("resource[1] is not IORESOURCE_IRQ");
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		return -ENOMEM;
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	}
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	hcd = usb_create_hcd(&ehci_au1xxx_hc_driver, &pdev->dev, "Au1xxx");
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	if (!hcd)
		return -ENOMEM;
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	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	hcd->rsrc_start = res->start;
	hcd->rsrc_len = resource_size(res);
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	if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
		pr_debug("request_mem_region failed");
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		ret = -EBUSY;
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		goto err1;
	}

	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
	if (!hcd->regs) {
		pr_debug("ioremap failed");
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		ret = -ENOMEM;
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		goto err2;
	}

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	au1xxx_start_ehc();

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	ehci = hcd_to_ehci(hcd);
	ehci->caps = hcd->regs;
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	ehci->regs = hcd->regs +
		HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase));
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	/* cache this readonly data; minimize chip reads */
	ehci->hcs_params = readl(&ehci->caps->hcs_params);

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	ret = usb_add_hcd(hcd, pdev->resource[1].start,
			  IRQF_DISABLED | IRQF_SHARED);
	if (ret == 0) {
		platform_set_drvdata(pdev, hcd);
		return ret;
	}
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	au1xxx_stop_ehc();
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	iounmap(hcd->regs);
err2:
	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
err1:
	usb_put_hcd(hcd);
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	return ret;
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}

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static int ehci_hcd_au1xxx_drv_remove(struct platform_device *pdev)
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{
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	struct usb_hcd *hcd = platform_get_drvdata(pdev);

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	usb_remove_hcd(hcd);
	iounmap(hcd->regs);
	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
	usb_put_hcd(hcd);
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	au1xxx_stop_ehc();
	platform_set_drvdata(pdev, NULL);
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	return 0;
}

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#ifdef CONFIG_PM
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static int ehci_hcd_au1xxx_drv_suspend(struct device *dev)
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{
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	struct usb_hcd *hcd = dev_get_drvdata(dev);
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	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
	unsigned long flags;
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	int rc = 0;
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	if (time_before(jiffies, ehci->next_statechange))
		msleep(10);

	/* Root hub was already suspended. Disable irq emission and
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	 * mark HW unaccessible.  The PM and USB cores make sure that
	 * the root hub is either suspended or stopped.
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	 */
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	ehci_prepare_ports_for_controller_suspend(ehci, device_may_wakeup(dev));
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	spin_lock_irqsave(&ehci->lock, flags);
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	ehci_writel(ehci, 0, &ehci->regs->intr_enable);
	(void)ehci_readl(ehci, &ehci->regs->intr_enable);

	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
	spin_unlock_irqrestore(&ehci->lock, flags);

	// could save FLADJ in case of Vaux power loss
	// ... we'd only use it to handle clock skew

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	au1xxx_stop_ehc();

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	return rc;
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}
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static int ehci_hcd_au1xxx_drv_resume(struct device *dev)
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{
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	struct usb_hcd *hcd = dev_get_drvdata(dev);
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	struct ehci_hcd *ehci = hcd_to_ehci(hcd);

	au1xxx_start_ehc();

	// maybe restore FLADJ

	if (time_before(jiffies, ehci->next_statechange))
		msleep(100);

	/* Mark hardware accessible again as we are out of D3 state by now */
	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);

	/* If CF is still set, we maintained PCI Vaux power.
	 * Just undo the effect of ehci_pci_suspend().
	 */
	if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF) {
		int	mask = INTR_MASK;

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		ehci_prepare_ports_for_controller_resume(ehci);
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		if (!hcd->self.root_hub->do_remote_wakeup)
			mask &= ~STS_PCD;
		ehci_writel(ehci, mask, &ehci->regs->intr_enable);
		ehci_readl(ehci, &ehci->regs->intr_enable);
		return 0;
	}

	ehci_dbg(ehci, "lost power, restarting\n");
	usb_root_hub_lost_power(hcd->self.root_hub);

	/* Else reset, to cope with power loss or flush-to-storage
	 * style "resume" having let BIOS kick in during reboot.
	 */
	(void) ehci_halt(ehci);
	(void) ehci_reset(ehci);

	/* emptying the schedule aborts any urbs */
	spin_lock_irq(&ehci->lock);
	if (ehci->reclaim)
		end_unlink_async(ehci);
	ehci_work(ehci);
	spin_unlock_irq(&ehci->lock);

	ehci_writel(ehci, ehci->command, &ehci->regs->command);
	ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
	ehci_readl(ehci, &ehci->regs->command);	/* unblock posted writes */

	/* here we "know" root ports should always stay powered */
	ehci_port_power(ehci, 1);

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	ehci->rh_state = EHCI_RH_SUSPENDED;
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	return 0;
}
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static const struct dev_pm_ops au1xxx_ehci_pmops = {
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	.suspend	= ehci_hcd_au1xxx_drv_suspend,
	.resume		= ehci_hcd_au1xxx_drv_resume,
};

#define AU1XXX_EHCI_PMOPS &au1xxx_ehci_pmops

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#else
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#define AU1XXX_EHCI_PMOPS NULL
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#endif
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static struct platform_driver ehci_hcd_au1xxx_driver = {
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	.probe		= ehci_hcd_au1xxx_drv_probe,
	.remove		= ehci_hcd_au1xxx_drv_remove,
	.shutdown	= usb_hcd_platform_shutdown,
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	.driver = {
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		.name	= "au1xxx-ehci",
		.owner	= THIS_MODULE,
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		.pm	= AU1XXX_EHCI_PMOPS,
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	}
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};
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MODULE_ALIAS("platform:au1xxx-ehci");