rainier.dts 8.3 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
/*
 * Device Tree Source for AMCC Rainier
 *
 * Based on Sequoia code
 * Copyright (c) 2007 MontaVista Software, Inc.
 *
 * FIXME: Draft only!
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without
 * any warranty of any kind, whether express or implied.
 *
 */

/ {
	#address-cells = <2>;
	#size-cells = <1>;
	model = "amcc,rainier";
	compatible = "amcc,rainier";
20
	dcr-parent = <&/cpus/cpu@0>;
21

22 23 24 25 26 27 28 29 30
	aliases {
		ethernet0 = &EMAC0;
		ethernet1 = &EMAC1;
		serial0 = &UART0;
		serial1 = &UART1;
		serial2 = &UART2;
		serial3 = &UART3;
	};

31 32 33 34
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

35
		cpu@0 {
36
			device_type = "cpu";
37
			model = "PowerPC,440GRx";
38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104
			reg = <0>;
			clock-frequency = <0>; /* Filled in by zImage */
			timebase-frequency = <0>; /* Filled in by zImage */
			i-cache-line-size = <20>;
			d-cache-line-size = <20>;
			i-cache-size = <8000>;
			d-cache-size = <8000>;
			dcr-controller;
			dcr-access-method = "native";
		};
	};

	memory {
		device_type = "memory";
		reg = <0 0 0>; /* Filled in by zImage */
	};

	UIC0: interrupt-controller0 {
		compatible = "ibm,uic-440grx","ibm,uic";
		interrupt-controller;
		cell-index = <0>;
		dcr-reg = <0c0 009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
	};

	UIC1: interrupt-controller1 {
		compatible = "ibm,uic-440grx","ibm,uic";
		interrupt-controller;
		cell-index = <1>;
		dcr-reg = <0d0 009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <1e 4 1f 4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	UIC2: interrupt-controller2 {
		compatible = "ibm,uic-440grx","ibm,uic";
		interrupt-controller;
		cell-index = <2>;
		dcr-reg = <0e0 009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <1c 4 1d 4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	SDR0: sdr {
		compatible = "ibm,sdr-440grx", "ibm,sdr-440ep";
		dcr-reg = <00e 002>;
	};

	CPR0: cpr {
		compatible = "ibm,cpr-440grx", "ibm,cpr-440ep";
		dcr-reg = <00c 002>;
	};

	plb {
		compatible = "ibm,plb-440grx", "ibm,plb4";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges;
		clock-frequency = <0>; /* Filled in by zImage */
105

106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252
		SDRAM0: sdram {
			compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali";
			dcr-reg = <010 2>;
		};

		DMA0: dma {
			compatible = "ibm,dma-440grx", "ibm,dma-4xx";
			dcr-reg = <100 027>;
		};

		MAL0: mcmal {
			compatible = "ibm,mcmal-440grx", "ibm,mcmal2";
			dcr-reg = <180 62>;
			num-tx-chans = <2>;
			num-rx-chans = <2>;
			interrupt-parent = <&MAL0>;
			interrupts = <0 1 2 3 4>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
					/*RXEOB*/ 1 &UIC0 b 4
					/*SERR*/  2 &UIC1 0 4
					/*TXDE*/  3 &UIC1 1 4
					/*RXDE*/  4 &UIC1 2 4>;
			interrupt-map-mask = <ffffffff>;
		};

		POB0: opb {
		  	compatible = "ibm,opb-440grx", "ibm,opb";
			#address-cells = <1>;
			#size-cells = <1>;
		  	ranges = <00000000 1 00000000 80000000
			          80000000 1 80000000 80000000>;
		  	interrupt-parent = <&UIC1>;
		  	interrupts = <7 4>;
		  	clock-frequency = <0>; /* Filled in by zImage */

			EBC0: ebc {
				compatible = "ibm,ebc-440grx", "ibm,ebc";
				dcr-reg = <012 2>;
				#address-cells = <2>;
				#size-cells = <1>;
				clock-frequency = <0>; /* Filled in by zImage */
				interrupts = <5 1>;
				interrupt-parent = <&UIC1>;

				nor_flash@0,0 {
					compatible = "amd,s29gl256n", "cfi-flash";
					bank-width = <2>;
					reg = <0 000000 4000000>;
					#address-cells = <1>;
					#size-cells = <1>;
					partition@0 {
						label = "Kernel";
						reg = <0 180000>;
					};
					partition@180000 {
						label = "ramdisk";
						reg = <180000 200000>;
					};
					partition@380000 {
						label = "file system";
						reg = <380000 3aa0000>;
					};
					partition@3e20000 {
						label = "kozio";
						reg = <3e20000 140000>;
					};
					partition@3f60000 {
						label = "env";
						reg = <3f60000 40000>;
					};
					partition@3fa0000 {
						label = "u-boot";
						reg = <3fa0000 60000>;
					};
				};

			};

			UART0: serial@ef600300 {
		   		device_type = "serial";
		   		compatible = "ns16550";
		   		reg = <ef600300 8>;
		   		virtual-reg = <ef600300>;
		   		clock-frequency = <0>; /* Filled in by zImage */
		   		current-speed = <1c200>;
		   		interrupt-parent = <&UIC0>;
		   		interrupts = <0 4>;
	   		};

			UART1: serial@ef600400 {
		   		device_type = "serial";
		   		compatible = "ns16550";
		   		reg = <ef600400 8>;
		   		virtual-reg = <ef600400>;
		   		clock-frequency = <0>;
		   		current-speed = <0>;
		   		interrupt-parent = <&UIC0>;
		   		interrupts = <1 4>;
	   		};

			UART2: serial@ef600500 {
		   		device_type = "serial";
		   		compatible = "ns16550";
		   		reg = <ef600500 8>;
		   		virtual-reg = <ef600500>;
		   		clock-frequency = <0>;
		   		current-speed = <0>;
		   		interrupt-parent = <&UIC1>;
		   		interrupts = <3 4>;
	   		};

			UART3: serial@ef600600 {
		   		device_type = "serial";
		   		compatible = "ns16550";
		   		reg = <ef600600 8>;
		   		virtual-reg = <ef600600>;
		   		clock-frequency = <0>;
		   		current-speed = <0>;
		   		interrupt-parent = <&UIC1>;
		   		interrupts = <4 4>;
	   		};

			IIC0: i2c@ef600700 {
				compatible = "ibm,iic-440grx", "ibm,iic";
				reg = <ef600700 14>;
				interrupt-parent = <&UIC0>;
				interrupts = <2 4>;
			};

			IIC1: i2c@ef600800 {
				compatible = "ibm,iic-440grx", "ibm,iic";
				reg = <ef600800 14>;
				interrupt-parent = <&UIC0>;
				interrupts = <7 4>;
			};

			ZMII0: emac-zmii@ef600d00 {
				compatible = "ibm,zmii-440grx", "ibm,zmii";
				reg = <ef600d00 c>;
			};

			RGMII0: emac-rgmii@ef601000 {
				compatible = "ibm,rgmii-440grx", "ibm,rgmii";
				reg = <ef601000 8>;
253
				has-mdio;
254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281
			};

			EMAC0: ethernet@ef600e00 {
				linux,network-index = <0>;
				device_type = "network";
				compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
				interrupt-parent = <&EMAC0>;
				interrupts = <0 1>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = </*Status*/ 0 &UIC0 18 4
						/*Wake*/  1 &UIC1 1d 4>;
				reg = <ef600e00 70>;
				local-mac-address = [000000000000];
				mal-device = <&MAL0>;
				mal-tx-channel = <0>;
				mal-rx-channel = <0>;
				cell-index = <0>;
				max-frame-size = <5dc>;
				rx-fifo-size = <1000>;
				tx-fifo-size = <800>;
				phy-mode = "rgmii";
				phy-map = <00000000>;
				zmii-device = <&ZMII0>;
				zmii-channel = <0>;
				rgmii-device = <&RGMII0>;
				rgmii-channel = <0>;
282 283
				has-inverted-stacr-oc;
				has-new-stacr-staopc;
284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311
			};

			EMAC1: ethernet@ef600f00 {
				linux,network-index = <1>;
				device_type = "network";
				compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
				interrupt-parent = <&EMAC1>;
				interrupts = <0 1>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = </*Status*/ 0 &UIC0 19 4
						/*Wake*/  1 &UIC1 1f 4>;
				reg = <ef600f00 70>;
				local-mac-address = [000000000000];
				mal-device = <&MAL0>;
				mal-tx-channel = <1>;
				mal-rx-channel = <1>;
				cell-index = <1>;
				max-frame-size = <5dc>;
				rx-fifo-size = <1000>;
				tx-fifo-size = <800>;
				phy-mode = "rgmii";
				phy-map = <00000000>;
				zmii-device = <&ZMII0>;
				zmii-channel = <1>;
				rgmii-device = <&RGMII0>;
				rgmii-channel = <1>;
312 313
				has-inverted-stacr-oc;
				has-new-stacr-staopc;
314 315
			};
		};
316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342

		PCI0: pci@1ec000000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
			primary;
			reg = <1 eec00000 8	/* Config space access */
			       1 eed00000 4	/* IACK */
			       1 eed00000 4	/* Special cycle */
			       1 ef400000 40>;	/* Internal registers */

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed. Chip supports a second
			 * IO range but we don't use it for now
			 */
			ranges = <02000000 0 80000000 1 80000000 0 10000000
				01000000 0 00000000 1 e8000000 0 00100000>;

			/* Inbound 2GB range starting at 0 */
			dma-ranges = <42000000 0 0 0 0 0 80000000>;

			/* All PCI interrupts are routed to IRQ 67 */
			interrupt-map-mask = <0000 0 0 0>;
			interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
		};
343 344 345 346 347 348 349
	};

	chosen {
		linux,stdout-path = "/plb/opb/serial@ef600300";
		bootargs = "console=ttyS0,115200";
	};
};