bytcr_rt5651.c 26.6 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
/*
 *  bytcr_rt5651.c - ASoc Machine driver for Intel Byt CR platform
 *  (derived from bytcr_rt5640.c)
 *
 *  Copyright (C) 2015 Intel Corp
 *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; version 2 of the License.
 *
 *  This program is distributed in the hope that it will be useful, but
 *  WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 *  General Public License for more details.
 *
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */

#include <linux/init.h>
21
#include <linux/i2c.h>
22 23
#include <linux/module.h>
#include <linux/platform_device.h>
24
#include <linux/property.h>
25
#include <linux/acpi.h>
26
#include <linux/clk.h>
27 28
#include <linux/device.h>
#include <linux/dmi.h>
29 30
#include <linux/gpio/consumer.h>
#include <linux/gpio/machine.h>
31
#include <linux/slab.h>
32
#include <asm/cpu_device_id.h>
33
#include <asm/intel-family.h>
34
#include <asm/platform_sst_audio.h>
35 36 37 38
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/jack.h>
39
#include <sound/soc-acpi.h>
40 41
#include "../../codecs/rt5651.h"
#include "../atom/sst-atom-controls.h"
42 43 44 45

enum {
	BYT_RT5651_DMIC_MAP,
	BYT_RT5651_IN1_MAP,
46
	BYT_RT5651_IN1_IN2_MAP,
47 48
};

49 50 51 52 53 54 55
enum {
	BYT_RT5651_JD_NULL	= (RT5651_JD_NULL << 4),
	BYT_RT5651_JD1_1	= (RT5651_JD1_1 << 4),
	BYT_RT5651_JD1_2	= (RT5651_JD1_2 << 4),
	BYT_RT5651_JD2		= (RT5651_JD2 << 4),
};

56 57 58 59 60 61 62 63 64 65 66 67 68
enum {
	BYT_RT5651_OVCD_TH_600UA  = (6 << 8),
	BYT_RT5651_OVCD_TH_1500UA = (15 << 8),
	BYT_RT5651_OVCD_TH_2000UA = (20 << 8),
};

enum {
	BYT_RT5651_OVCD_SF_0P5	= (RT5651_OVCD_SF_0P5 << 13),
	BYT_RT5651_OVCD_SF_0P75	= (RT5651_OVCD_SF_0P75 << 13),
	BYT_RT5651_OVCD_SF_1P0	= (RT5651_OVCD_SF_1P0 << 13),
	BYT_RT5651_OVCD_SF_1P5	= (RT5651_OVCD_SF_1P5 << 13),
};

69 70
#define BYT_RT5651_MAP(quirk)		((quirk) & GENMASK(3, 0))
#define BYT_RT5651_JDSRC(quirk)		(((quirk) & GENMASK(7, 4)) >> 4)
71 72
#define BYT_RT5651_OVCD_TH(quirk)	(((quirk) & GENMASK(12, 8)) >> 8)
#define BYT_RT5651_OVCD_SF(quirk)	(((quirk) & GENMASK(14, 13)) >> 13)
73 74 75
#define BYT_RT5651_DMIC_EN		BIT(16)
#define BYT_RT5651_MCLK_EN		BIT(17)
#define BYT_RT5651_MCLK_25MHZ		BIT(18)
76 77 78
#define BYT_RT5651_SSP2_AIF2		BIT(19) /* default is using AIF1  */
#define BYT_RT5651_SSP0_AIF1		BIT(20)
#define BYT_RT5651_SSP0_AIF2		BIT(21)
79
#define BYT_RT5651_HP_LR_SWAPPED	BIT(22)
80

81 82 83 84 85
#define BYT_RT5651_DEFAULT_QUIRKS	(BYT_RT5651_MCLK_EN | \
					 BYT_RT5651_JD1_1   | \
					 BYT_RT5651_OVCD_TH_2000UA | \
					 BYT_RT5651_OVCD_SF_0P75)

86 87
/* jack-detect-source + dmic-en + ovcd-th + -sf + terminating empty entry */
#define MAX_NO_PROPS 5
88 89 90

struct byt_rt5651_private {
	struct clk *mclk;
91
	struct gpio_desc *ext_amp_gpio;
C
Carlo Caione 已提交
92
	struct snd_soc_jack jack;
93 94
};

95
/* Default: jack-detect on JD1_1, internal mic on in1, headsetmic on in3 */
96
static unsigned long byt_rt5651_quirk = BYT_RT5651_DEFAULT_QUIRKS |
97
					BYT_RT5651_IN1_MAP;
98 99 100 101 102 103 104

static void log_quirks(struct device *dev)
{
	if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_DMIC_MAP)
		dev_info(dev, "quirk DMIC_MAP enabled");
	if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_MAP)
		dev_info(dev, "quirk IN1_MAP enabled");
105 106
	if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_IN2_MAP)
		dev_info(dev, "quirk IN1_IN2_MAP enabled");
107
	if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) {
108 109
		dev_info(dev, "quirk realtek,jack-detect-source %ld\n",
			 BYT_RT5651_JDSRC(byt_rt5651_quirk));
110 111 112 113 114
		dev_info(dev, "quirk realtek,over-current-threshold-microamp %ld\n",
			 BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);
		dev_info(dev, "quirk realtek,over-current-scale-factor %ld\n",
			 BYT_RT5651_OVCD_SF(byt_rt5651_quirk));
	}
115 116 117 118 119 120
	if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
		dev_info(dev, "quirk DMIC enabled");
	if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
		dev_info(dev, "quirk MCLK_EN enabled");
	if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
		dev_info(dev, "quirk MCLK_25MHZ enabled");
121 122 123 124 125 126
	if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2)
		dev_info(dev, "quirk SSP2_AIF2 enabled\n");
	if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1)
		dev_info(dev, "quirk SSP0_AIF1 enabled\n");
	if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)
		dev_info(dev, "quirk SSP0_AIF2 enabled\n");
127 128 129
}

#define BYT_CODEC_DAI1	"rt5651-aif1"
130
#define BYT_CODEC_DAI2	"rt5651-aif2"
131

132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149
static int byt_rt5651_prepare_and_enable_pll1(struct snd_soc_dai *codec_dai,
					      int rate, int bclk_ratio)
{
	int clk_id, clk_freq, ret;

	/* Configure the PLL before selecting it */
	if (!(byt_rt5651_quirk & BYT_RT5651_MCLK_EN)) {
		clk_id = RT5651_PLL1_S_BCLK1,
		clk_freq = rate * bclk_ratio;
	} else {
		clk_id = RT5651_PLL1_S_MCLK;
		if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
			clk_freq = 25000000;
		else
			clk_freq = 19200000;
	}
	ret = snd_soc_dai_set_pll(codec_dai, 0, clk_id, clk_freq, rate * 512);
	if (ret < 0) {
150
		dev_err(codec_dai->component->dev, "can't set pll: %d\n", ret);
151 152 153 154 155 156
		return ret;
	}

	ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1,
				     rate * 512, SND_SOC_CLOCK_IN);
	if (ret < 0) {
157
		dev_err(codec_dai->component->dev, "can't set clock %d\n", ret);
158 159 160 161 162 163
		return ret;
	}

	return 0;
}

164 165 166 167 168 169 170 171 172
static int platform_clock_control(struct snd_soc_dapm_widget *w,
				  struct snd_kcontrol *k, int  event)
{
	struct snd_soc_dapm_context *dapm = w->dapm;
	struct snd_soc_card *card = dapm->card;
	struct snd_soc_dai *codec_dai;
	struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
	int ret;

173
	codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI1);
174 175
	if (!codec_dai)
		codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI2);
176 177 178 179 180 181 182 183 184 185 186 187 188 189 190
	if (!codec_dai) {
		dev_err(card->dev,
			"Codec dai not found; Unable to set platform clock\n");
		return -EIO;
	}

	if (SND_SOC_DAPM_EVENT_ON(event)) {
		if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
			ret = clk_prepare_enable(priv->mclk);
			if (ret < 0) {
				dev_err(card->dev,
					"could not configure MCLK state");
				return ret;
			}
		}
191
		ret = byt_rt5651_prepare_and_enable_pll1(codec_dai, 48000, 50);
192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212
	} else {
		/*
		 * Set codec clock source to internal clock before
		 * turning off the platform clock. Codec needs clock
		 * for Jack detection and button press
		 */
		ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_RCCLK,
					     48000 * 512,
					     SND_SOC_CLOCK_IN);
		if (!ret)
			if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
				clk_disable_unprepare(priv->mclk);
	}

	if (ret < 0) {
		dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
		return ret;
	}

	return 0;
}
213

214 215 216 217 218 219 220 221 222 223 224 225 226 227
static int rt5651_ext_amp_power_event(struct snd_soc_dapm_widget *w,
	struct snd_kcontrol *kcontrol, int event)
{
	struct snd_soc_card *card = w->dapm->card;
	struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);

	if (SND_SOC_DAPM_EVENT_ON(event))
		gpiod_set_value_cansleep(priv->ext_amp_gpio, 1);
	else
		gpiod_set_value_cansleep(priv->ext_amp_gpio, 0);

	return 0;
}

228 229 230 231 232
static const struct snd_soc_dapm_widget byt_rt5651_widgets[] = {
	SND_SOC_DAPM_HP("Headphone", NULL),
	SND_SOC_DAPM_MIC("Headset Mic", NULL),
	SND_SOC_DAPM_MIC("Internal Mic", NULL),
	SND_SOC_DAPM_SPK("Speaker", NULL),
233
	SND_SOC_DAPM_LINE("Line In", NULL),
234 235 236
	SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
			    platform_clock_control, SND_SOC_DAPM_PRE_PMU |
			    SND_SOC_DAPM_POST_PMD),
237 238 239
	SND_SOC_DAPM_SUPPLY("Ext Amp Power", SND_SOC_NOPM, 0, 0,
			    rt5651_ext_amp_power_event,
			    SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
240 241 242
};

static const struct snd_soc_dapm_route byt_rt5651_audio_map[] = {
243 244 245 246
	{"Headphone", NULL, "Platform Clock"},
	{"Headset Mic", NULL, "Platform Clock"},
	{"Internal Mic", NULL, "Platform Clock"},
	{"Speaker", NULL, "Platform Clock"},
247
	{"Speaker", NULL, "Ext Amp Power"},
248
	{"Line In", NULL, "Platform Clock"},
249

250 251 252 253 254
	{"Headset Mic", NULL, "micbias1"}, /* lowercase for rt5651 */
	{"Headphone", NULL, "HPOL"},
	{"Headphone", NULL, "HPOR"},
	{"Speaker", NULL, "LOUTL"},
	{"Speaker", NULL, "LOUTR"},
255 256 257
	{"IN2P", NULL, "Line In"},
	{"IN2N", NULL, "Line In"},

258 259
};

260 261 262
static const struct snd_soc_dapm_route byt_rt5651_intmic_dmic_map[] = {
	{"DMIC L1", NULL, "Internal Mic"},
	{"DMIC R1", NULL, "Internal Mic"},
263
	{"IN3P", NULL, "Headset Mic"},
264 265 266 267 268
};

static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_map[] = {
	{"Internal Mic", NULL, "micbias1"},
	{"IN1P", NULL, "Internal Mic"},
269
	{"IN3P", NULL, "Headset Mic"},
270 271
};

272 273 274 275 276 277 278
static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_in2_map[] = {
	{"Internal Mic", NULL, "micbias1"},
	{"IN1P", NULL, "Internal Mic"},
	{"IN2P", NULL, "Internal Mic"},
	{"IN3P", NULL, "Headset Mic"},
};

279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314
static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif1_map[] = {
	{"ssp0 Tx", NULL, "modem_out"},
	{"modem_in", NULL, "ssp0 Rx"},

	{"AIF1 Playback", NULL, "ssp0 Tx"},
	{"ssp0 Rx", NULL, "AIF1 Capture"},
};

static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif2_map[] = {
	{"ssp0 Tx", NULL, "modem_out"},
	{"modem_in", NULL, "ssp0 Rx"},

	{"AIF2 Playback", NULL, "ssp0 Tx"},
	{"ssp0 Rx", NULL, "AIF2 Capture"},
};

static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif1_map[] = {
	{"ssp2 Tx", NULL, "codec_out0"},
	{"ssp2 Tx", NULL, "codec_out1"},
	{"codec_in0", NULL, "ssp2 Rx"},
	{"codec_in1", NULL, "ssp2 Rx"},

	{"AIF1 Playback", NULL, "ssp2 Tx"},
	{"ssp2 Rx", NULL, "AIF1 Capture"},
};

static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif2_map[] = {
	{"ssp2 Tx", NULL, "codec_out0"},
	{"ssp2 Tx", NULL, "codec_out1"},
	{"codec_in0", NULL, "ssp2 Rx"},
	{"codec_in1", NULL, "ssp2 Rx"},

	{"AIF2 Playback", NULL, "ssp2 Tx"},
	{"ssp2 Rx", NULL, "AIF2 Capture"},
};

315 316 317 318 319
static const struct snd_kcontrol_new byt_rt5651_controls[] = {
	SOC_DAPM_PIN_SWITCH("Headphone"),
	SOC_DAPM_PIN_SWITCH("Headset Mic"),
	SOC_DAPM_PIN_SWITCH("Internal Mic"),
	SOC_DAPM_PIN_SWITCH("Speaker"),
320
	SOC_DAPM_PIN_SWITCH("Line In"),
321 322
};

C
Carlo Caione 已提交
323 324 325 326 327 328 329 330 331 332 333
static struct snd_soc_jack_pin bytcr_jack_pins[] = {
	{
		.pin	= "Headphone",
		.mask	= SND_JACK_HEADPHONE,
	},
	{
		.pin	= "Headset Mic",
		.mask	= SND_JACK_MICROPHONE,
	},
};

334 335 336 337 338
static int byt_rt5651_aif1_hw_params(struct snd_pcm_substream *substream,
					struct snd_pcm_hw_params *params)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct snd_soc_dai *codec_dai = rtd->codec_dai;
339
	snd_pcm_format_t format = params_format(params);
340
	int rate = params_rate(params);
341
	int bclk_ratio;
342

343 344 345 346 347 348
	if (format == SNDRV_PCM_FORMAT_S16_LE)
		bclk_ratio = 32;
	else
		bclk_ratio = 50;

	return byt_rt5651_prepare_and_enable_pll1(codec_dai, rate, bclk_ratio);
349 350
}

351 352 353 354 355 356
static int byt_rt5651_quirk_cb(const struct dmi_system_id *id)
{
	byt_rt5651_quirk = (unsigned long)id->driver_data;
	return 1;
}

357
static const struct dmi_system_id byt_rt5651_quirk_table[] = {
358
	{
359
		/* Chuwi Hi8 Pro (CWI513) */
360 361
		.callback = byt_rt5651_quirk_cb,
		.matches = {
362 363
			DMI_MATCH(DMI_SYS_VENDOR, "Hampoo"),
			DMI_MATCH(DMI_PRODUCT_NAME, "X1D3_C806N"),
364
		},
365 366 367
		.driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
					BYT_RT5651_IN1_MAP |
					BYT_RT5651_HP_LR_SWAPPED),
368
	},
369
	{
370
		/* Chuwi Vi8 Plus (CWI519) */
371 372
		.callback = byt_rt5651_quirk_cb,
		.matches = {
373 374
			DMI_MATCH(DMI_SYS_VENDOR, "Hampoo"),
			DMI_MATCH(DMI_PRODUCT_NAME, "D2D3_Vi8A1"),
375
		},
376 377 378
		.driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
					BYT_RT5651_IN1_MAP |
					BYT_RT5651_HP_LR_SWAPPED),
379
	},
380
	{
381
		/* KIANO SlimNote 14.2 */
382 383 384 385 386
		.callback = byt_rt5651_quirk_cb,
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "KIANO"),
			DMI_MATCH(DMI_PRODUCT_NAME, "KIANO SlimNote 14.2"),
		},
387
		.driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
388
					BYT_RT5651_IN1_IN2_MAP),
389
	},
390
	{
391
		/* Minnowboard Max B3 */
392 393
		.callback = byt_rt5651_quirk_cb,
		.matches = {
394 395
			DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"),
			DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"),
396
		},
397
		.driver_data = (void *)(BYT_RT5651_IN1_MAP),
398
	},
399
	{
400
		/* Minnowboard Turbot */
401 402
		.callback = byt_rt5651_quirk_cb,
		.matches = {
403 404
			DMI_MATCH(DMI_SYS_VENDOR, "ADI"),
			DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Turbot"),
405
		},
406 407
		.driver_data = (void *)(BYT_RT5651_MCLK_EN |
					BYT_RT5651_IN1_MAP),
408
	},
409 410 411 412 413 414 415
	{
		/* VIOS LTH17 */
		.callback = byt_rt5651_quirk_cb,
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "VIOS"),
			DMI_MATCH(DMI_PRODUCT_NAME, "LTH17"),
		},
416
		.driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
417 418
					BYT_RT5651_IN1_IN2_MAP),
	},
419 420 421
	{}
};

422 423 424 425
/*
 * Note this MUST be called before snd_soc_register_card(), so that the props
 * are in place before the codec component driver's probe function parses them.
 */
426
static int byt_rt5651_add_codec_device_props(struct device *i2c_dev)
427 428
{
	struct property_entry props[MAX_NO_PROPS] = {};
429
	int cnt = 0;
430 431 432 433

	props[cnt++] = PROPERTY_ENTRY_U32("realtek,jack-detect-source",
				BYT_RT5651_JDSRC(byt_rt5651_quirk));

434 435 436 437 438 439
	props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-threshold-microamp",
				BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);

	props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-scale-factor",
				BYT_RT5651_OVCD_SF(byt_rt5651_quirk));

440 441 442
	if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
		props[cnt++] = PROPERTY_ENTRY_BOOL("realtek,dmic-en");

443
	return device_add_properties(i2c_dev, props);
444 445
}

446 447 448
static int byt_rt5651_init(struct snd_soc_pcm_runtime *runtime)
{
	struct snd_soc_card *card = runtime->card;
449
	struct snd_soc_component *codec = runtime->codec_dai->component;
450
	struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
451 452
	const struct snd_soc_dapm_route *custom_map;
	int num_routes;
453
	int ret;
454 455 456

	card->dapm.idle_bias_off = true;

457 458 459 460 461
	/* Start with RC clk for jack-detect (we disable MCLK below) */
	if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
		snd_soc_component_update_bits(codec, RT5651_GLB_CLK,
			RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_RCCLK);

462 463 464 465 466
	switch (BYT_RT5651_MAP(byt_rt5651_quirk)) {
	case BYT_RT5651_IN1_MAP:
		custom_map = byt_rt5651_intmic_in1_map;
		num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_map);
		break;
467 468 469 470
	case BYT_RT5651_IN1_IN2_MAP:
		custom_map = byt_rt5651_intmic_in1_in2_map;
		num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_in2_map);
		break;
471
	default:
472 473
		custom_map = byt_rt5651_intmic_dmic_map;
		num_routes = ARRAY_SIZE(byt_rt5651_intmic_dmic_map);
474
	}
475 476 477
	ret = snd_soc_dapm_add_routes(&card->dapm, custom_map, num_routes);
	if (ret)
		return ret;
478

479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498
	if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) {
		ret = snd_soc_dapm_add_routes(&card->dapm,
					byt_rt5651_ssp2_aif2_map,
					ARRAY_SIZE(byt_rt5651_ssp2_aif2_map));
	} else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) {
		ret = snd_soc_dapm_add_routes(&card->dapm,
					byt_rt5651_ssp0_aif1_map,
					ARRAY_SIZE(byt_rt5651_ssp0_aif1_map));
	} else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2) {
		ret = snd_soc_dapm_add_routes(&card->dapm,
					byt_rt5651_ssp0_aif2_map,
					ARRAY_SIZE(byt_rt5651_ssp0_aif2_map));
	} else {
		ret = snd_soc_dapm_add_routes(&card->dapm,
					byt_rt5651_ssp2_aif1_map,
					ARRAY_SIZE(byt_rt5651_ssp2_aif1_map));
	}
	if (ret)
		return ret;

499 500 501 502 503 504 505 506 507
	ret = snd_soc_add_card_controls(card, byt_rt5651_controls,
					ARRAY_SIZE(byt_rt5651_controls));
	if (ret) {
		dev_err(card->dev, "unable to add card controls\n");
		return ret;
	}
	snd_soc_dapm_ignore_suspend(&card->dapm, "Headphone");
	snd_soc_dapm_ignore_suspend(&card->dapm, "Speaker");

508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531
	if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
		/*
		 * The firmware might enable the clock at
		 * boot (this information may or may not
		 * be reflected in the enable clock register).
		 * To change the rate we must disable the clock
		 * first to cover these cases. Due to common
		 * clock framework restrictions that do not allow
		 * to disable a clock that has not been enabled,
		 * we need to enable the clock first.
		 */
		ret = clk_prepare_enable(priv->mclk);
		if (!ret)
			clk_disable_unprepare(priv->mclk);

		if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
			ret = clk_set_rate(priv->mclk, 25000000);
		else
			ret = clk_set_rate(priv->mclk, 19200000);

		if (ret)
			dev_err(card->dev, "unable to set MCLK rate\n");
	}

532 533
	if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) {
		ret = snd_soc_card_jack_new(runtime->card, "Headset",
C
Carlo Caione 已提交
534 535
				    SND_JACK_HEADSET, &priv->jack,
				    bytcr_jack_pins, ARRAY_SIZE(bytcr_jack_pins));
536 537 538 539
		if (ret) {
			dev_err(runtime->dev, "jack creation failed %d\n", ret);
			return ret;
		}
C
Carlo Caione 已提交
540

541 542 543 544
		ret = snd_soc_component_set_jack(codec, &priv->jack, NULL);
		if (ret)
			return ret;
	}
C
Carlo Caione 已提交
545

546
	return 0;
547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563
}

static const struct snd_soc_pcm_stream byt_rt5651_dai_params = {
	.formats = SNDRV_PCM_FMTBIT_S24_LE,
	.rate_min = 48000,
	.rate_max = 48000,
	.channels_min = 2,
	.channels_max = 2,
};

static int byt_rt5651_codec_fixup(struct snd_soc_pcm_runtime *rtd,
			    struct snd_pcm_hw_params *params)
{
	struct snd_interval *rate = hw_param_interval(params,
			SNDRV_PCM_HW_PARAM_RATE);
	struct snd_interval *channels = hw_param_interval(params,
						SNDRV_PCM_HW_PARAM_CHANNELS);
564
	int ret, bits;
565

566
	/* The DSP will covert the FE rate to 48k, stereo */
567 568 569
	rate->min = rate->max = 48000;
	channels->min = channels->max = 2;

570 571 572 573 574 575 576 577 578 579
	if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
	    (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
		/* set SSP0 to 16-bit */
		params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
		bits = 16;
	} else {
		/* set SSP2 to 24-bit */
		params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
		bits = 24;
	}
580 581 582

	/*
	 * Default mode for SSP configuration is TDM 4 slot, override config
583
	 * with explicit setting to I2S 2ch. The word length is set with
584 585 586 587
	 * dai_set_tdm_slot() since there is no other API exposed
	 */
	ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
				  SND_SOC_DAIFMT_I2S     |
588
				  SND_SOC_DAIFMT_NB_NF   |
589 590 591 592 593 594 595 596
				  SND_SOC_DAIFMT_CBS_CFS
				  );

	if (ret < 0) {
		dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
		return ret;
	}

597
	ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, bits);
598 599 600 601 602 603 604 605
	if (ret < 0) {
		dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
		return ret;
	}

	return 0;
}

606
static const unsigned int rates_48000[] = {
607 608 609
	48000,
};

610
static const struct snd_pcm_hw_constraint_list constraints_48000 = {
611 612 613 614 615 616 617 618 619 620 621
	.count = ARRAY_SIZE(rates_48000),
	.list  = rates_48000,
};

static int byt_rt5651_aif1_startup(struct snd_pcm_substream *substream)
{
	return snd_pcm_hw_constraint_list(substream->runtime, 0,
			SNDRV_PCM_HW_PARAM_RATE,
			&constraints_48000);
}

622
static const struct snd_soc_ops byt_rt5651_aif1_ops = {
623 624 625
	.startup = byt_rt5651_aif1_startup,
};

626
static const struct snd_soc_ops byt_rt5651_be_ssp2_ops = {
627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659
	.hw_params = byt_rt5651_aif1_hw_params,
};

static struct snd_soc_dai_link byt_rt5651_dais[] = {
	[MERR_DPCM_AUDIO] = {
		.name = "Audio Port",
		.stream_name = "Audio",
		.cpu_dai_name = "media-cpu-dai",
		.codec_dai_name = "snd-soc-dummy-dai",
		.codec_name = "snd-soc-dummy",
		.platform_name = "sst-mfld-platform",
		.nonatomic = true,
		.dynamic = 1,
		.dpcm_playback = 1,
		.dpcm_capture = 1,
		.ops = &byt_rt5651_aif1_ops,
	},
	[MERR_DPCM_DEEP_BUFFER] = {
		.name = "Deep-Buffer Audio Port",
		.stream_name = "Deep-Buffer Audio",
		.cpu_dai_name = "deepbuffer-cpu-dai",
		.codec_dai_name = "snd-soc-dummy-dai",
		.codec_name = "snd-soc-dummy",
		.platform_name = "sst-mfld-platform",
		.nonatomic = true,
		.dynamic = 1,
		.dpcm_playback = 1,
		.ops = &byt_rt5651_aif1_ops,
	},
	/* CODEC<->CODEC link */
	/* back ends */
	{
		.name = "SSP2-Codec",
660
		.id = 0,
661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690
		.cpu_dai_name = "ssp2-port",
		.platform_name = "sst-mfld-platform",
		.no_pcm = 1,
		.codec_dai_name = "rt5651-aif1",
		.codec_name = "i2c-10EC5651:00",
		.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
						| SND_SOC_DAIFMT_CBS_CFS,
		.be_hw_params_fixup = byt_rt5651_codec_fixup,
		.ignore_suspend = 1,
		.nonatomic = true,
		.dpcm_playback = 1,
		.dpcm_capture = 1,
		.init = byt_rt5651_init,
		.ops = &byt_rt5651_be_ssp2_ops,
	},
};

/* SoC card */
static struct snd_soc_card byt_rt5651_card = {
	.name = "bytcr-rt5651",
	.owner = THIS_MODULE,
	.dai_link = byt_rt5651_dais,
	.num_links = ARRAY_SIZE(byt_rt5651_dais),
	.dapm_widgets = byt_rt5651_widgets,
	.num_dapm_widgets = ARRAY_SIZE(byt_rt5651_widgets),
	.dapm_routes = byt_rt5651_audio_map,
	.num_dapm_routes = ARRAY_SIZE(byt_rt5651_audio_map),
	.fully_routed = true,
};

691
static char byt_rt5651_codec_name[SND_ACPI_I2C_ID_LEN];
692 693
static char byt_rt5651_codec_aif_name[12]; /*  = "rt5651-aif[1|2]" */
static char byt_rt5651_cpu_dai_name[10]; /*  = "ssp[0|2]-port" */
694
static char byt_rt5651_long_name[40]; /* = "bytcr-rt5651-*-mic[-swapped-hp]" */
695

696 697 698 699
static const struct x86_cpu_id baytrail_cpu_ids[] = {
	{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 }, /* Valleyview */
	{}
};
700

701 702 703 704 705 706 707 708 709 710 711 712
static const struct x86_cpu_id cherrytrail_cpu_ids[] = {
	{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },     /* Braswell */
	{}
};

static const struct acpi_gpio_params ext_amp_enable_gpios = { 0, 0, false };

static const struct acpi_gpio_mapping byt_rt5651_gpios[] = {
	{ "ext-amp-enable-gpios", &ext_amp_enable_gpios, 1 },
	{ },
};

713 714 715 716
struct acpi_chan_package {   /* ACPICA seems to require 64 bit integers */
	u64 aif_value;       /* 1: AIF1, 2: AIF2 */
	u64 mclock_value;    /* usually 25MHz (0x17d7940), ignored */
};
717

718 719
static int snd_byt_rt5651_mc_probe(struct platform_device *pdev)
{
720
	const char * const mic_name[] = { "dmic", "in1", "in12" };
721
	struct byt_rt5651_private *priv;
722
	struct snd_soc_acpi_mach *mach;
723
	struct device *codec_dev;
724
	const char *i2c_name = NULL;
725
	const char *hp_swapped;
726
	bool is_bytcr = false;
727
	int ret_val = 0;
728
	int dai_index = 0;
729 730
	int i;

731
	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
732 733
	if (!priv)
		return -ENOMEM;
734 735 736 737

	/* register the soc card */
	byt_rt5651_card.dev = &pdev->dev;

738 739 740 741 742 743 744 745 746 747 748 749
	mach = byt_rt5651_card.dev->platform_data;
	snd_soc_card_set_drvdata(&byt_rt5651_card, priv);

	/* fix index of codec dai */
	for (i = 0; i < ARRAY_SIZE(byt_rt5651_dais); i++) {
		if (!strcmp(byt_rt5651_dais[i].codec_name, "i2c-10EC5651:00")) {
			dai_index = i;
			break;
		}
	}

	/* fixup codec name based on HID */
750
	i2c_name = acpi_dev_get_first_match_name(mach->id, NULL, -1);
751 752 753
	if (!i2c_name) {
		dev_err(&pdev->dev, "Error cannot find '%s' dev\n", mach->id);
		return -ENODEV;
754
	}
755 756 757
	snprintf(byt_rt5651_codec_name, sizeof(byt_rt5651_codec_name),
		"%s%s", "i2c-", i2c_name);
	byt_rt5651_dais[dai_index].codec_name = byt_rt5651_codec_name;
758

759 760 761 762 763
	codec_dev = bus_find_device_by_name(&i2c_bus_type, NULL,
					    byt_rt5651_codec_name);
	if (!codec_dev)
		return -EPROBE_DEFER;

764 765 766 767
	/*
	 * swap SSP0 if bytcr is detected
	 * (will be overridden if DMI quirk is detected)
	 */
768
	if (x86_match_cpu(baytrail_cpu_ids)) {
769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822
		struct sst_platform_info *p_info = mach->pdata;
		const struct sst_res_info *res_info = p_info->res_info;

		if (res_info->acpi_ipc_irq_index == 0)
			is_bytcr = true;
	}

	if (is_bytcr) {
		/*
		 * Baytrail CR platforms may have CHAN package in BIOS, try
		 * to find relevant routing quirk based as done on Windows
		 * platforms. We have to read the information directly from the
		 * BIOS, at this stage the card is not created and the links
		 * with the codec driver/pdata are non-existent
		 */

		struct acpi_chan_package chan_package;

		/* format specified: 2 64-bit integers */
		struct acpi_buffer format = {sizeof("NN"), "NN"};
		struct acpi_buffer state = {0, NULL};
		struct snd_soc_acpi_package_context pkg_ctx;
		bool pkg_found = false;

		state.length = sizeof(chan_package);
		state.pointer = &chan_package;

		pkg_ctx.name = "CHAN";
		pkg_ctx.length = 2;
		pkg_ctx.format = &format;
		pkg_ctx.state = &state;
		pkg_ctx.data_valid = false;

		pkg_found = snd_soc_acpi_find_package_from_hid(mach->id,
							       &pkg_ctx);
		if (pkg_found) {
			if (chan_package.aif_value == 1) {
				dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n");
				byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF1;
			} else  if (chan_package.aif_value == 2) {
				dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n");
				byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
			} else {
				dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n");
				pkg_found = false;
			}
		}

		if (!pkg_found) {
			/* no BIOS indications, assume SSP0-AIF2 connection */
			byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
		}
	}

823 824
	/* check quirks before creating card */
	dmi_check_system(byt_rt5651_quirk_table);
825 826

	/* Must be called before register_card, also see declaration comment. */
827
	ret_val = byt_rt5651_add_codec_device_props(codec_dev);
828 829
	if (ret_val) {
		put_device(codec_dev);
830
		return ret_val;
831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857
	}

	/* Cherry Trail devices use an external amplifier enable gpio */
	if (x86_match_cpu(cherrytrail_cpu_ids)) {
		devm_acpi_dev_add_driver_gpios(codec_dev, byt_rt5651_gpios);
		priv->ext_amp_gpio = devm_fwnode_get_index_gpiod_from_child(
						&pdev->dev, "ext-amp-enable", 0,
						codec_dev->fwnode,
						GPIOD_OUT_LOW, "speaker-amp");
		if (IS_ERR(priv->ext_amp_gpio)) {
			ret_val = PTR_ERR(priv->ext_amp_gpio);
			switch (ret_val) {
			case -ENOENT:
				priv->ext_amp_gpio = NULL;
				break;
			default:
				dev_err(&pdev->dev, "Failed to get ext-amp-enable GPIO: %d\n",
					ret_val);
				/* fall through */
			case -EPROBE_DEFER:
				put_device(codec_dev);
				return ret_val;
			}
		}
	}

	put_device(codec_dev);
858

859 860
	log_quirks(&pdev->dev);

861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882
	if ((byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) ||
	    (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
		/* fixup codec aif name */
		snprintf(byt_rt5651_codec_aif_name,
			sizeof(byt_rt5651_codec_aif_name),
			"%s", "rt5651-aif2");

		byt_rt5651_dais[dai_index].codec_dai_name =
			byt_rt5651_codec_aif_name;
	}

	if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
	    (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
		/* fixup cpu dai name name */
		snprintf(byt_rt5651_cpu_dai_name,
			sizeof(byt_rt5651_cpu_dai_name),
			"%s", "ssp0-port");

		byt_rt5651_dais[dai_index].cpu_dai_name =
			byt_rt5651_cpu_dai_name;
	}

883 884 885
	if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
		priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
		if (IS_ERR(priv->mclk)) {
886
			ret_val = PTR_ERR(priv->mclk);
887
			dev_err(&pdev->dev,
888 889
				"Failed to get MCLK from pmc_plt_clk_3: %d\n",
				ret_val);
890 891 892 893 894 895 896 897 898 899 900
			/*
			 * Fall back to bit clock usage for -ENOENT (clock not
			 * available likely due to missing dependencies), bail
			 * for all other errors, including -EPROBE_DEFER
			 */
			if (ret_val != -ENOENT)
				return ret_val;
			byt_rt5651_quirk &= ~BYT_RT5651_MCLK_EN;
		}
	}

901 902 903 904 905
	if (byt_rt5651_quirk & BYT_RT5651_HP_LR_SWAPPED)
		hp_swapped = "-hp-swapped";
	else
		hp_swapped = "";

906
	snprintf(byt_rt5651_long_name, sizeof(byt_rt5651_long_name),
907 908
		 "bytcr-rt5651-%s-mic%s",
		 mic_name[BYT_RT5651_MAP(byt_rt5651_quirk)], hp_swapped);
909 910
	byt_rt5651_card.long_name = byt_rt5651_long_name;

911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934
	ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5651_card);

	if (ret_val) {
		dev_err(&pdev->dev, "devm_snd_soc_register_card failed %d\n",
			ret_val);
		return ret_val;
	}
	platform_set_drvdata(pdev, &byt_rt5651_card);
	return ret_val;
}

static struct platform_driver snd_byt_rt5651_mc_driver = {
	.driver = {
		.name = "bytcr_rt5651",
	},
	.probe = snd_byt_rt5651_mc_probe,
};

module_platform_driver(snd_byt_rt5651_mc_driver);

MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver for RT5651");
MODULE_AUTHOR("Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:bytcr_rt5651");