rtl2832.c 29.1 KB
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/*
 * Realtek RTL2832 DVB-T demodulator driver
 *
 * Copyright (C) 2012 Thomas Mair <thomas.mair86@gmail.com>
 *
 *	This program is free software; you can redistribute it and/or modify
 *	it under the terms of the GNU General Public License as published by
 *	the Free Software Foundation; either version 2 of the License, or
 *	(at your option) any later version.
 *
 *	This program is distributed in the hope that it will be useful,
 *	but WITHOUT ANY WARRANTY; without even the implied warranty of
 *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *	GNU General Public License for more details.
 *
 *	You should have received a copy of the GNU General Public License along
 *	with this program; if not, write to the Free Software Foundation, Inc.,
 *	51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 */

#include "rtl2832_priv.h"
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#include "dvb_math.h"
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#include <linux/bitops.h>
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/* Max transfer size done by I2C transfer functions */
#define MAX_XFER_SIZE  64
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#define REG_MASK(b) (BIT(b + 1) - 1)
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static const struct rtl2832_reg_entry registers[] = {
	[DVBT_SOFT_RST]		= {0x1, 0x1,   2, 2},
	[DVBT_IIC_REPEAT]	= {0x1, 0x1,   3, 3},
	[DVBT_TR_WAIT_MIN_8K]	= {0x1, 0x88, 11, 2},
	[DVBT_RSD_BER_FAIL_VAL]	= {0x1, 0x8f, 15, 0},
	[DVBT_EN_BK_TRK]	= {0x1, 0xa6,  7, 7},
	[DVBT_AD_EN_REG]	= {0x0, 0x8,   7, 7},
	[DVBT_AD_EN_REG1]	= {0x0, 0x8,   6, 6},
	[DVBT_EN_BBIN]		= {0x1, 0xb1,  0, 0},
	[DVBT_MGD_THD0]		= {0x1, 0x95,  7, 0},
	[DVBT_MGD_THD1]		= {0x1, 0x96,  7, 0},
	[DVBT_MGD_THD2]		= {0x1, 0x97,  7, 0},
	[DVBT_MGD_THD3]		= {0x1, 0x98,  7, 0},
	[DVBT_MGD_THD4]		= {0x1, 0x99,  7, 0},
	[DVBT_MGD_THD5]		= {0x1, 0x9a,  7, 0},
	[DVBT_MGD_THD6]		= {0x1, 0x9b,  7, 0},
	[DVBT_MGD_THD7]		= {0x1, 0x9c,  7, 0},
	[DVBT_EN_CACQ_NOTCH]	= {0x1, 0x61,  4, 4},
	[DVBT_AD_AV_REF]	= {0x0, 0x9,   6, 0},
	[DVBT_REG_PI]		= {0x0, 0xa,   2, 0},
	[DVBT_PIP_ON]		= {0x0, 0x21,  3, 3},
	[DVBT_SCALE1_B92]	= {0x2, 0x92,  7, 0},
	[DVBT_SCALE1_B93]	= {0x2, 0x93,  7, 0},
	[DVBT_SCALE1_BA7]	= {0x2, 0xa7,  7, 0},
	[DVBT_SCALE1_BA9]	= {0x2, 0xa9,  7, 0},
	[DVBT_SCALE1_BAA]	= {0x2, 0xaa,  7, 0},
	[DVBT_SCALE1_BAB]	= {0x2, 0xab,  7, 0},
	[DVBT_SCALE1_BAC]	= {0x2, 0xac,  7, 0},
	[DVBT_SCALE1_BB0]	= {0x2, 0xb0,  7, 0},
	[DVBT_SCALE1_BB1]	= {0x2, 0xb1,  7, 0},
	[DVBT_KB_P1]		= {0x1, 0x64,  3, 1},
	[DVBT_KB_P2]		= {0x1, 0x64,  6, 4},
	[DVBT_KB_P3]		= {0x1, 0x65,  2, 0},
	[DVBT_OPT_ADC_IQ]	= {0x0, 0x6,   5, 4},
	[DVBT_AD_AVI]		= {0x0, 0x9,   1, 0},
	[DVBT_AD_AVQ]		= {0x0, 0x9,   3, 2},
	[DVBT_K1_CR_STEP12]	= {0x2, 0xad,  9, 4},
	[DVBT_TRK_KS_P2]	= {0x1, 0x6f,  2, 0},
	[DVBT_TRK_KS_I2]	= {0x1, 0x70,  5, 3},
	[DVBT_TR_THD_SET2]	= {0x1, 0x72,  3, 0},
	[DVBT_TRK_KC_P2]	= {0x1, 0x73,  5, 3},
	[DVBT_TRK_KC_I2]	= {0x1, 0x75,  2, 0},
	[DVBT_CR_THD_SET2]	= {0x1, 0x76,  7, 6},
	[DVBT_PSET_IFFREQ]	= {0x1, 0x19, 21, 0},
	[DVBT_SPEC_INV]		= {0x1, 0x15,  0, 0},
	[DVBT_RSAMP_RATIO]	= {0x1, 0x9f, 27, 2},
	[DVBT_CFREQ_OFF_RATIO]	= {0x1, 0x9d, 23, 4},
	[DVBT_FSM_STAGE]	= {0x3, 0x51,  6, 3},
	[DVBT_RX_CONSTEL]	= {0x3, 0x3c,  3, 2},
	[DVBT_RX_HIER]		= {0x3, 0x3c,  6, 4},
	[DVBT_RX_C_RATE_LP]	= {0x3, 0x3d,  2, 0},
	[DVBT_RX_C_RATE_HP]	= {0x3, 0x3d,  5, 3},
	[DVBT_GI_IDX]		= {0x3, 0x51,  1, 0},
	[DVBT_FFT_MODE_IDX]	= {0x3, 0x51,  2, 2},
	[DVBT_RSD_BER_EST]	= {0x3, 0x4e, 15, 0},
	[DVBT_CE_EST_EVM]	= {0x4, 0xc,  15, 0},
	[DVBT_RF_AGC_VAL]	= {0x3, 0x5b, 13, 0},
	[DVBT_IF_AGC_VAL]	= {0x3, 0x59, 13, 0},
	[DVBT_DAGC_VAL]		= {0x3, 0x5,   7, 0},
	[DVBT_SFREQ_OFF]	= {0x3, 0x18, 13, 0},
	[DVBT_CFREQ_OFF]	= {0x3, 0x5f, 17, 0},
	[DVBT_POLAR_RF_AGC]	= {0x0, 0xe,   1, 1},
	[DVBT_POLAR_IF_AGC]	= {0x0, 0xe,   0, 0},
	[DVBT_AAGC_HOLD]	= {0x1, 0x4,   5, 5},
	[DVBT_EN_RF_AGC]	= {0x1, 0x4,   6, 6},
	[DVBT_EN_IF_AGC]	= {0x1, 0x4,   7, 7},
	[DVBT_IF_AGC_MIN]	= {0x1, 0x8,   7, 0},
	[DVBT_IF_AGC_MAX]	= {0x1, 0x9,   7, 0},
	[DVBT_RF_AGC_MIN]	= {0x1, 0xa,   7, 0},
	[DVBT_RF_AGC_MAX]	= {0x1, 0xb,   7, 0},
	[DVBT_IF_AGC_MAN]	= {0x1, 0xc,   6, 6},
	[DVBT_IF_AGC_MAN_VAL]	= {0x1, 0xc,  13, 0},
	[DVBT_RF_AGC_MAN]	= {0x1, 0xe,   6, 6},
	[DVBT_RF_AGC_MAN_VAL]	= {0x1, 0xe,  13, 0},
	[DVBT_DAGC_TRG_VAL]	= {0x1, 0x12,  7, 0},
	[DVBT_AGC_TARG_VAL_0]	= {0x1, 0x2,   0, 0},
	[DVBT_AGC_TARG_VAL_8_1]	= {0x1, 0x3,   7, 0},
	[DVBT_AAGC_LOOP_GAIN]	= {0x1, 0xc7,  5, 1},
	[DVBT_LOOP_GAIN2_3_0]	= {0x1, 0x4,   4, 1},
	[DVBT_LOOP_GAIN2_4]	= {0x1, 0x5,   7, 7},
	[DVBT_LOOP_GAIN3]	= {0x1, 0xc8,  4, 0},
	[DVBT_VTOP1]		= {0x1, 0x6,   5, 0},
	[DVBT_VTOP2]		= {0x1, 0xc9,  5, 0},
	[DVBT_VTOP3]		= {0x1, 0xca,  5, 0},
	[DVBT_KRF1]		= {0x1, 0xcb,  7, 0},
	[DVBT_KRF2]		= {0x1, 0x7,   7, 0},
	[DVBT_KRF3]		= {0x1, 0xcd,  7, 0},
	[DVBT_KRF4]		= {0x1, 0xce,  7, 0},
	[DVBT_EN_GI_PGA]	= {0x1, 0xe5,  0, 0},
	[DVBT_THD_LOCK_UP]	= {0x1, 0xd9,  8, 0},
	[DVBT_THD_LOCK_DW]	= {0x1, 0xdb,  8, 0},
	[DVBT_THD_UP1]		= {0x1, 0xdd,  7, 0},
	[DVBT_THD_DW1]		= {0x1, 0xde,  7, 0},
	[DVBT_INTER_CNT_LEN]	= {0x1, 0xd8,  3, 0},
	[DVBT_GI_PGA_STATE]	= {0x1, 0xe6,  3, 3},
	[DVBT_EN_AGC_PGA]	= {0x1, 0xd7,  0, 0},
	[DVBT_CKOUTPAR]		= {0x1, 0x7b,  5, 5},
	[DVBT_CKOUT_PWR]	= {0x1, 0x7b,  6, 6},
	[DVBT_SYNC_DUR]		= {0x1, 0x7b,  7, 7},
	[DVBT_ERR_DUR]		= {0x1, 0x7c,  0, 0},
	[DVBT_SYNC_LVL]		= {0x1, 0x7c,  1, 1},
	[DVBT_ERR_LVL]		= {0x1, 0x7c,  2, 2},
	[DVBT_VAL_LVL]		= {0x1, 0x7c,  3, 3},
	[DVBT_SERIAL]		= {0x1, 0x7c,  4, 4},
	[DVBT_SER_LSB]		= {0x1, 0x7c,  5, 5},
	[DVBT_CDIV_PH0]		= {0x1, 0x7d,  3, 0},
	[DVBT_CDIV_PH1]		= {0x1, 0x7d,  7, 4},
	[DVBT_MPEG_IO_OPT_2_2]	= {0x0, 0x6,   7, 7},
	[DVBT_MPEG_IO_OPT_1_0]	= {0x0, 0x7,   7, 6},
	[DVBT_CKOUTPAR_PIP]	= {0x0, 0xb7,  4, 4},
	[DVBT_CKOUT_PWR_PIP]	= {0x0, 0xb7,  3, 3},
	[DVBT_SYNC_LVL_PIP]	= {0x0, 0xb7,  2, 2},
	[DVBT_ERR_LVL_PIP]	= {0x0, 0xb7,  1, 1},
	[DVBT_VAL_LVL_PIP]	= {0x0, 0xb7,  0, 0},
	[DVBT_CKOUTPAR_PID]	= {0x0, 0xb9,  4, 4},
	[DVBT_CKOUT_PWR_PID]	= {0x0, 0xb9,  3, 3},
	[DVBT_SYNC_LVL_PID]	= {0x0, 0xb9,  2, 2},
	[DVBT_ERR_LVL_PID]	= {0x0, 0xb9,  1, 1},
	[DVBT_VAL_LVL_PID]	= {0x0, 0xb9,  0, 0},
	[DVBT_SM_PASS]		= {0x1, 0x93, 11, 0},
	[DVBT_AD7_SETTING]	= {0x0, 0x11, 15, 0},
	[DVBT_RSSI_R]		= {0x3, 0x1,   6, 0},
	[DVBT_ACI_DET_IND]	= {0x3, 0x12,  0, 0},
	[DVBT_REG_MON]		= {0x0, 0xd,   1, 0},
	[DVBT_REG_MONSEL]	= {0x0, 0xd,   2, 2},
	[DVBT_REG_GPE]		= {0x0, 0xd,   7, 7},
	[DVBT_REG_GPO]		= {0x0, 0x10,  0, 0},
	[DVBT_REG_4MSEL]	= {0x0, 0x13,  0, 0},
};

/* write multiple hardware registers */
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static int rtl2832_wr(struct rtl2832_dev *dev, u8 reg, u8 *val, int len)
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{
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	struct i2c_client *client = dev->client;
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	int ret;
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	u8 buf[MAX_XFER_SIZE];
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	struct i2c_msg msg[1] = {
		{
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			.addr = client->addr,
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			.flags = 0,
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			.len = 1 + len,
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			.buf = buf,
		}
	};

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	if (1 + len > sizeof(buf)) {
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		dev_warn(&client->dev, "i2c wr reg=%04x: len=%d is too big!\n",
			 reg, len);
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		return -EINVAL;
	}

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	buf[0] = reg;
	memcpy(&buf[1], val, len);

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	ret = i2c_transfer(dev->i2c_adapter, msg, 1);
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	if (ret == 1) {
		ret = 0;
	} else {
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		dev_warn(&client->dev, "i2c wr failed=%d reg=%02x len=%d\n",
			 ret, reg, len);
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		ret = -EREMOTEIO;
	}
	return ret;
}

/* read multiple hardware registers */
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static int rtl2832_rd(struct rtl2832_dev *dev, u8 reg, u8 *val, int len)
196
{
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	struct i2c_client *client = dev->client;
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	int ret;
	struct i2c_msg msg[2] = {
		{
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			.addr = client->addr,
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			.flags = 0,
			.len = 1,
			.buf = &reg,
		}, {
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			.addr = client->addr,
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			.flags = I2C_M_RD,
			.len = len,
			.buf = val,
		}
	};

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	ret = i2c_transfer(dev->i2c_adapter, msg, 2);
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	if (ret == 2) {
		ret = 0;
	} else {
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		dev_warn(&client->dev, "i2c rd failed=%d reg=%02x len=%d\n",
			 ret, reg, len);
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		ret = -EREMOTEIO;
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	}
	return ret;
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}

/* write multiple registers */
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static int rtl2832_wr_regs(struct rtl2832_dev *dev, u8 reg, u8 page, u8 *val,
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	int len)
{
	int ret;

	/* switch bank if needed */
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	if (page != dev->page) {
		ret = rtl2832_wr(dev, 0x00, &page, 1);
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		if (ret)
			return ret;

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		dev->page = page;
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	}
	return rtl2832_wr(dev, reg, val, len);
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}

/* read multiple registers */
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static int rtl2832_rd_regs(struct rtl2832_dev *dev, u8 reg, u8 page, u8 *val,
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	int len)
{
	int ret;

	/* switch bank if needed */
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	if (page != dev->page) {
		ret = rtl2832_wr(dev, 0x00, &page, 1);
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		if (ret)
			return ret;

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		dev->page = page;
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	}
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	return rtl2832_rd(dev, reg, val, len);
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}

/* write single register */
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static int rtl2832_wr_reg(struct rtl2832_dev *dev, u8 reg, u8 page, u8 val)
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{
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	return rtl2832_wr_regs(dev, reg, page, &val, 1);
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}

/* read single register */
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static int rtl2832_rd_reg(struct rtl2832_dev *dev, u8 reg, u8 page, u8 *val)
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{
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	return rtl2832_rd_regs(dev, reg, page, val, 1);
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}

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static int rtl2832_rd_demod_reg(struct rtl2832_dev *dev, int reg, u32 *val)
271
{
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	struct i2c_client *client = dev->client;
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	int ret;

	u8 reg_start_addr;
	u8 msb, lsb;
	u8 page;
	u8 reading[4];
	u32 reading_tmp;
	int i;

	u8 len;
	u32 mask;

	reg_start_addr = registers[reg].start_address;
	msb = registers[reg].msb;
	lsb = registers[reg].lsb;
	page = registers[reg].page;

	len = (msb >> 3) + 1;
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	mask = REG_MASK(msb - lsb);
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	ret = rtl2832_rd_regs(dev, reg_start_addr, page, &reading[0], len);
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	if (ret)
		goto err;

	reading_tmp = 0;
	for (i = 0; i < len; i++)
		reading_tmp |= reading[i] << ((len - 1 - i) * 8);

	*val = (reading_tmp >> lsb) & mask;

	return ret;

err:
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	dev_dbg(&client->dev, "failed=%d\n", ret);
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	return ret;

}

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static int rtl2832_wr_demod_reg(struct rtl2832_dev *dev, int reg, u32 val)
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{
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	struct i2c_client *client = dev->client;
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	int ret, i;
	u8 len;
	u8 reg_start_addr;
	u8 msb, lsb;
	u8 page;
	u32 mask;


	u8 reading[4];
	u8 writing[4];
	u32 reading_tmp;
	u32 writing_tmp;


	reg_start_addr = registers[reg].start_address;
	msb = registers[reg].msb;
	lsb = registers[reg].lsb;
	page = registers[reg].page;

	len = (msb >> 3) + 1;
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	mask = REG_MASK(msb - lsb);
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	ret = rtl2832_rd_regs(dev, reg_start_addr, page, &reading[0], len);
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	if (ret)
		goto err;

	reading_tmp = 0;
	for (i = 0; i < len; i++)
		reading_tmp |= reading[i] << ((len - 1 - i) * 8);

	writing_tmp = reading_tmp & ~(mask << lsb);
	writing_tmp |= ((val & mask) << lsb);


	for (i = 0; i < len; i++)
		writing[i] = (writing_tmp >> ((len - 1 - i) * 8)) & 0xff;

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	ret = rtl2832_wr_regs(dev, reg_start_addr, page, &writing[0], len);
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	if (ret)
		goto err;

	return ret;

err:
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	dev_dbg(&client->dev, "failed=%d\n", ret);
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	return ret;

}

static int rtl2832_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
{
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	struct rtl2832_dev *dev = fe->demodulator_priv;
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	struct i2c_client *client = dev->client;
	int ret;
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	dev_dbg(&client->dev, "enable=%d\n", enable);
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	/* gate already open or close */
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	if (dev->i2c_gate_state == enable)
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		return 0;

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	ret = rtl2832_wr_demod_reg(dev, DVBT_IIC_REPEAT, (enable ? 0x1 : 0x0));
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	if (ret)
		goto err;

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	dev->i2c_gate_state = enable;
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	return ret;
err:
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	dev_dbg(&client->dev, "failed=%d\n", ret);
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	return ret;
}

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static int rtl2832_set_if(struct dvb_frontend *fe, u32 if_freq)
390
{
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	struct rtl2832_dev *dev = fe->demodulator_priv;
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	struct i2c_client *client = dev->client;
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	int ret;
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	u64 pset_iffreq;
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	u8 en_bbin = (if_freq == 0 ? 0x1 : 0x0);

	/*
	* PSET_IFFREQ = - floor((IfFreqHz % CrystalFreqHz) * pow(2, 22)
	*		/ CrystalFreqHz)
	*/

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	pset_iffreq = if_freq % dev->pdata->clk;
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	pset_iffreq *= 0x400000;
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	pset_iffreq = div_u64(pset_iffreq, dev->pdata->clk);
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	pset_iffreq = -pset_iffreq;
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	pset_iffreq = pset_iffreq & 0x3fffff;
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	dev_dbg(&client->dev, "if_frequency=%d pset_iffreq=%08x\n",
		if_freq, (unsigned)pset_iffreq);
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	ret = rtl2832_wr_demod_reg(dev, DVBT_EN_BBIN, en_bbin);
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	if (ret)
		return ret;

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	ret = rtl2832_wr_demod_reg(dev, DVBT_PSET_IFFREQ, pset_iffreq);
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	return ret;
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}

static int rtl2832_init(struct dvb_frontend *fe)
{
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	struct rtl2832_dev *dev = fe->demodulator_priv;
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	struct i2c_client *client = dev->client;
423
	const struct rtl2832_reg_value *init;
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	int i, ret, len;
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	/* initialization values for the demodulator registers */
	struct rtl2832_reg_value rtl2832_initial_regs[] = {
		{DVBT_AD_EN_REG,		0x1},
		{DVBT_AD_EN_REG1,		0x1},
		{DVBT_RSD_BER_FAIL_VAL,		0x2800},
		{DVBT_MGD_THD0,			0x10},
		{DVBT_MGD_THD1,			0x20},
		{DVBT_MGD_THD2,			0x20},
		{DVBT_MGD_THD3,			0x40},
		{DVBT_MGD_THD4,			0x22},
		{DVBT_MGD_THD5,			0x32},
		{DVBT_MGD_THD6,			0x37},
		{DVBT_MGD_THD7,			0x39},
		{DVBT_EN_BK_TRK,		0x0},
		{DVBT_EN_CACQ_NOTCH,		0x0},
		{DVBT_AD_AV_REF,		0x2a},
		{DVBT_REG_PI,			0x6},
		{DVBT_PIP_ON,			0x0},
		{DVBT_CDIV_PH0,			0x8},
		{DVBT_CDIV_PH1,			0x8},
		{DVBT_SCALE1_B92,		0x4},
		{DVBT_SCALE1_B93,		0xb0},
		{DVBT_SCALE1_BA7,		0x78},
		{DVBT_SCALE1_BA9,		0x28},
		{DVBT_SCALE1_BAA,		0x59},
		{DVBT_SCALE1_BAB,		0x83},
		{DVBT_SCALE1_BAC,		0xd4},
		{DVBT_SCALE1_BB0,		0x65},
		{DVBT_SCALE1_BB1,		0x43},
		{DVBT_KB_P1,			0x1},
		{DVBT_KB_P2,			0x4},
		{DVBT_KB_P3,			0x7},
		{DVBT_K1_CR_STEP12,		0xa},
		{DVBT_REG_GPE,			0x1},
		{DVBT_SERIAL,			0x0},
		{DVBT_CDIV_PH0,			0x9},
		{DVBT_CDIV_PH1,			0x9},
		{DVBT_MPEG_IO_OPT_2_2,		0x0},
		{DVBT_MPEG_IO_OPT_1_0,		0x0},
		{DVBT_TRK_KS_P2,		0x4},
		{DVBT_TRK_KS_I2,		0x7},
		{DVBT_TR_THD_SET2,		0x6},
		{DVBT_TRK_KC_I2,		0x5},
		{DVBT_CR_THD_SET2,		0x1},
	};

471
	dev_dbg(&client->dev, "\n");
472 473

	for (i = 0; i < ARRAY_SIZE(rtl2832_initial_regs); i++) {
474
		ret = rtl2832_wr_demod_reg(dev, rtl2832_initial_regs[i].reg,
475 476 477 478 479
			rtl2832_initial_regs[i].value);
		if (ret)
			goto err;
	}

480
	/* load tuner specific settings */
481 482 483
	dev_dbg(&client->dev, "load settings for tuner=%02x\n",
		dev->pdata->tuner);
	switch (dev->pdata->tuner) {
484 485 486 487 488
	case RTL2832_TUNER_FC0012:
	case RTL2832_TUNER_FC0013:
		len = ARRAY_SIZE(rtl2832_tuner_init_fc0012);
		init = rtl2832_tuner_init_fc0012;
		break;
489 490 491 492
	case RTL2832_TUNER_TUA9001:
		len = ARRAY_SIZE(rtl2832_tuner_init_tua9001);
		init = rtl2832_tuner_init_tua9001;
		break;
493 494 495 496
	case RTL2832_TUNER_E4000:
		len = ARRAY_SIZE(rtl2832_tuner_init_e4000);
		init = rtl2832_tuner_init_e4000;
		break;
497
	case RTL2832_TUNER_R820T:
498
	case RTL2832_TUNER_R828D:
499 500 501
		len = ARRAY_SIZE(rtl2832_tuner_init_r820t);
		init = rtl2832_tuner_init_r820t;
		break;
502 503 504 505 506 507
	default:
		ret = -EINVAL;
		goto err;
	}

	for (i = 0; i < len; i++) {
508
		ret = rtl2832_wr_demod_reg(dev, init[i].reg, init[i].value);
509 510 511 512
		if (ret)
			goto err;
	}

513 514
	/*
	 * r820t NIM code does a software reset here at the demod -
515 516
	 * may not be needed, as there's already a software reset at
	 * set_params()
517 518 519
	 */
#if 1
	/* soft reset */
520
	ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
521 522 523
	if (ret)
		goto err;

524
	ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
525 526 527
	if (ret)
		goto err;
#endif
528

529
	dev->sleeping = false;
530 531 532 533

	return ret;

err:
534
	dev_dbg(&client->dev, "failed=%d\n", ret);
535 536 537 538 539
	return ret;
}

static int rtl2832_sleep(struct dvb_frontend *fe)
{
540
	struct rtl2832_dev *dev = fe->demodulator_priv;
541
	struct i2c_client *client = dev->client;
542

543
	dev_dbg(&client->dev, "\n");
544
	dev->sleeping = true;
545 546 547
	return 0;
}

548
static int rtl2832_get_tune_settings(struct dvb_frontend *fe,
549 550
	struct dvb_frontend_tune_settings *s)
{
551
	struct rtl2832_dev *dev = fe->demodulator_priv;
552
	struct i2c_client *client = dev->client;
553

554
	dev_dbg(&client->dev, "\n");
555 556 557 558 559 560 561 562
	s->min_delay_ms = 1000;
	s->step_size = fe->ops.info.frequency_stepsize * 2;
	s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
	return 0;
}

static int rtl2832_set_frontend(struct dvb_frontend *fe)
{
563
	struct rtl2832_dev *dev = fe->demodulator_priv;
564
	struct i2c_client *client = dev->client;
565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	int ret, i, j;
	u64 bw_mode, num, num2;
	u32 resamp_ratio, cfreq_off_ratio;
	static u8 bw_params[3][32] = {
	/* 6 MHz bandwidth */
		{
		0xf5, 0xff, 0x15, 0x38, 0x5d, 0x6d, 0x52, 0x07, 0xfa, 0x2f,
		0x53, 0xf5, 0x3f, 0xca, 0x0b, 0x91, 0xea, 0x30, 0x63, 0xb2,
		0x13, 0xda, 0x0b, 0xc4, 0x18, 0x7e, 0x16, 0x66, 0x08, 0x67,
		0x19, 0xe0,
		},

	/*  7 MHz bandwidth */
		{
		0xe7, 0xcc, 0xb5, 0xba, 0xe8, 0x2f, 0x67, 0x61, 0x00, 0xaf,
		0x86, 0xf2, 0xbf, 0x59, 0x04, 0x11, 0xb6, 0x33, 0xa4, 0x30,
		0x15, 0x10, 0x0a, 0x42, 0x18, 0xf8, 0x17, 0xd9, 0x07, 0x22,
		0x19, 0x10,
		},

	/*  8 MHz bandwidth */
		{
		0x09, 0xf6, 0xd2, 0xa7, 0x9a, 0xc9, 0x27, 0x77, 0x06, 0xbf,
		0xec, 0xf4, 0x4f, 0x0b, 0xfc, 0x01, 0x63, 0x35, 0x54, 0xa7,
		0x16, 0x66, 0x08, 0xb4, 0x19, 0x6e, 0x19, 0x65, 0x05, 0xc8,
		0x19, 0xe0,
		},
	};


596 597
	dev_dbg(&client->dev, "frequency=%u bandwidth_hz=%u inversion=%u\n",
		c->frequency, c->bandwidth_hz, c->inversion);
598 599 600 601 602

	/* program tuner */
	if (fe->ops.tuner_ops.set_params)
		fe->ops.tuner_ops.set_params(fe);

603
	/* PIP mode related */
604
	ret = rtl2832_wr_regs(dev, 0x92, 1, "\x00\x0f\xff", 3);
605 606 607
	if (ret)
		goto err;

608 609 610 611 612 613 614 615
	/* If the frontend has get_if_frequency(), use it */
	if (fe->ops.tuner_ops.get_if_frequency) {
		u32 if_freq;

		ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
		if (ret)
			goto err;

616
		ret = rtl2832_set_if(fe, if_freq);
617 618 619 620
		if (ret)
			goto err;
	}

621 622 623 624 625 626 627 628 629 630 631 632 633 634
	switch (c->bandwidth_hz) {
	case 6000000:
		i = 0;
		bw_mode = 48000000;
		break;
	case 7000000:
		i = 1;
		bw_mode = 56000000;
		break;
	case 8000000:
		i = 2;
		bw_mode = 64000000;
		break;
	default:
635 636 637 638
		dev_err(&client->dev, "invalid bandwidth_hz %u\n",
			c->bandwidth_hz);
		ret = -EINVAL;
		goto err;
639 640
	}

641
	for (j = 0; j < sizeof(bw_params[0]); j++) {
642
		ret = rtl2832_wr_regs(dev, 0x1c+j, 1, &bw_params[i][j], 1);
643 644 645 646 647 648 649 650
		if (ret)
			goto err;
	}

	/* calculate and set resample ratio
	* RSAMP_RATIO = floor(CrystalFreqHz * 7 * pow(2, 22)
	*	/ ConstWithBandwidthMode)
	*/
651
	num = dev->pdata->clk * 7;
652 653 654
	num *= 0x400000;
	num = div_u64(num, bw_mode);
	resamp_ratio =  num & 0x3ffffff;
655
	ret = rtl2832_wr_demod_reg(dev, DVBT_RSAMP_RATIO, resamp_ratio);
656 657 658 659 660 661 662 663
	if (ret)
		goto err;

	/* calculate and set cfreq off ratio
	* CFREQ_OFF_RATIO = - floor(ConstWithBandwidthMode * pow(2, 20)
	*	/ (CrystalFreqHz * 7))
	*/
	num = bw_mode << 20;
664
	num2 = dev->pdata->clk * 7;
665 666 667
	num = div_u64(num, num2);
	num = -num;
	cfreq_off_ratio = num & 0xfffff;
668
	ret = rtl2832_wr_demod_reg(dev, DVBT_CFREQ_OFF_RATIO, cfreq_off_ratio);
669 670 671 672
	if (ret)
		goto err;

	/* soft reset */
673
	ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
674 675 676
	if (ret)
		goto err;

677
	ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
678 679 680 681 682
	if (ret)
		goto err;

	return ret;
err:
683
	dev_dbg(&client->dev, "failed=%d\n", ret);
684 685 686
	return ret;
}

687 688
static int rtl2832_get_frontend(struct dvb_frontend *fe)
{
689
	struct rtl2832_dev *dev = fe->demodulator_priv;
690
	struct i2c_client *client = dev->client;
691 692 693 694
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	int ret;
	u8 buf[3];

695
	if (dev->sleeping)
696 697
		return 0;

698
	ret = rtl2832_rd_regs(dev, 0x3c, 3, buf, 2);
699 700 701
	if (ret)
		goto err;

702
	ret = rtl2832_rd_reg(dev, 0x51, 3, &buf[2]);
703 704 705
	if (ret)
		goto err;

706
	dev_dbg(&client->dev, "TPS=%*ph\n", 3, buf);
707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795

	switch ((buf[0] >> 2) & 3) {
	case 0:
		c->modulation = QPSK;
		break;
	case 1:
		c->modulation = QAM_16;
		break;
	case 2:
		c->modulation = QAM_64;
		break;
	}

	switch ((buf[2] >> 2) & 1) {
	case 0:
		c->transmission_mode = TRANSMISSION_MODE_2K;
		break;
	case 1:
		c->transmission_mode = TRANSMISSION_MODE_8K;
	}

	switch ((buf[2] >> 0) & 3) {
	case 0:
		c->guard_interval = GUARD_INTERVAL_1_32;
		break;
	case 1:
		c->guard_interval = GUARD_INTERVAL_1_16;
		break;
	case 2:
		c->guard_interval = GUARD_INTERVAL_1_8;
		break;
	case 3:
		c->guard_interval = GUARD_INTERVAL_1_4;
		break;
	}

	switch ((buf[0] >> 4) & 7) {
	case 0:
		c->hierarchy = HIERARCHY_NONE;
		break;
	case 1:
		c->hierarchy = HIERARCHY_1;
		break;
	case 2:
		c->hierarchy = HIERARCHY_2;
		break;
	case 3:
		c->hierarchy = HIERARCHY_4;
		break;
	}

	switch ((buf[1] >> 3) & 7) {
	case 0:
		c->code_rate_HP = FEC_1_2;
		break;
	case 1:
		c->code_rate_HP = FEC_2_3;
		break;
	case 2:
		c->code_rate_HP = FEC_3_4;
		break;
	case 3:
		c->code_rate_HP = FEC_5_6;
		break;
	case 4:
		c->code_rate_HP = FEC_7_8;
		break;
	}

	switch ((buf[1] >> 0) & 7) {
	case 0:
		c->code_rate_LP = FEC_1_2;
		break;
	case 1:
		c->code_rate_LP = FEC_2_3;
		break;
	case 2:
		c->code_rate_LP = FEC_3_4;
		break;
	case 3:
		c->code_rate_LP = FEC_5_6;
		break;
	case 4:
		c->code_rate_LP = FEC_7_8;
		break;
	}

	return 0;
err:
796
	dev_dbg(&client->dev, "failed=%d\n", ret);
797 798 799
	return ret;
}

800 801
static int rtl2832_read_status(struct dvb_frontend *fe, fe_status_t *status)
{
802
	struct rtl2832_dev *dev = fe->demodulator_priv;
803
	struct i2c_client *client = dev->client;
804 805 806
	int ret;
	u32 tmp;

807 808 809
	dev_dbg(&client->dev, "\n");

	*status = 0;
810
	if (dev->sleeping)
811 812
		return 0;

813
	ret = rtl2832_rd_demod_reg(dev, DVBT_FSM_STAGE, &tmp);
814 815 816 817 818 819 820 821 822 823 824 825 826 827 828
	if (ret)
		goto err;

	if (tmp == 11) {
		*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
				FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
	}
	/* TODO find out if this is also true for rtl2832? */
	/*else if (tmp == 10) {
		*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
				FE_HAS_VITERBI;
	}*/

	return ret;
err:
829
	dev_dbg(&client->dev, "failed=%d\n", ret);
830 831 832
	return ret;
}

833 834
static int rtl2832_read_snr(struct dvb_frontend *fe, u16 *snr)
{
835
	struct rtl2832_dev *dev = fe->demodulator_priv;
836
	struct i2c_client *client = dev->client;
837 838 839 840 841 842 843 844 845 846 847 848 849
	int ret, hierarchy, constellation;
	u8 buf[2], tmp;
	u16 tmp16;
#define CONSTELLATION_NUM 3
#define HIERARCHY_NUM 4
	static const u32 snr_constant[CONSTELLATION_NUM][HIERARCHY_NUM] = {
		{ 85387325, 85387325, 85387325, 85387325 },
		{ 86676178, 86676178, 87167949, 87795660 },
		{ 87659938, 87659938, 87885178, 88241743 },
	};

	/* reports SNR in resolution of 0.1 dB */

850
	ret = rtl2832_rd_reg(dev, 0x3c, 3, &tmp);
851 852 853 854 855 856 857 858 859 860 861
	if (ret)
		goto err;

	constellation = (tmp >> 2) & 0x03; /* [3:2] */
	if (constellation > CONSTELLATION_NUM - 1)
		goto err;

	hierarchy = (tmp >> 4) & 0x07; /* [6:4] */
	if (hierarchy > HIERARCHY_NUM - 1)
		goto err;

862
	ret = rtl2832_rd_regs(dev, 0x0c, 4, buf, 2);
863 864 865 866 867 868 869 870 871 872 873 874 875
	if (ret)
		goto err;

	tmp16 = buf[0] << 8 | buf[1];

	if (tmp16)
		*snr = (snr_constant[constellation][hierarchy] -
				intlog10(tmp16)) / ((1 << 24) / 100);
	else
		*snr = 0;

	return 0;
err:
876
	dev_dbg(&client->dev, "failed=%d\n", ret);
877 878 879
	return ret;
}

880 881
static int rtl2832_read_ber(struct dvb_frontend *fe, u32 *ber)
{
882
	struct rtl2832_dev *dev = fe->demodulator_priv;
883
	struct i2c_client *client = dev->client;
884 885 886
	int ret;
	u8 buf[2];

887
	ret = rtl2832_rd_regs(dev, 0x4e, 3, buf, 2);
888 889 890 891 892 893 894
	if (ret)
		goto err;

	*ber = buf[0] << 8 | buf[1];

	return 0;
err:
895
	dev_dbg(&client->dev, "failed=%d\n", ret);
896 897 898
	return ret;
}

899 900 901 902 903 904 905 906 907
/*
 * Delay mechanism to avoid unneeded I2C gate open / close. Gate close is
 * delayed here a little bit in order to see if there is sequence of I2C
 * messages sent to same I2C bus.
 * We must use unlocked version of __i2c_transfer() in order to avoid deadlock
 * as lock is already taken by calling muxed i2c_transfer().
 */
static void rtl2832_i2c_gate_work(struct work_struct *work)
{
908 909
	struct rtl2832_dev *dev = container_of(work,
			struct rtl2832_dev, i2c_gate_work.work);
910
	struct i2c_client *client = dev->client;
911 912 913 914
	int ret;
	u8 buf[2];
	struct i2c_msg msg[1] = {
		{
915
			.addr = client->addr,
916 917 918 919 920 921
			.flags = 0,
			.len = sizeof(buf),
			.buf = buf,
		}
	};

922 923
	dev_dbg(&client->dev, "\n");

924 925 926
	/* select reg bank 1 */
	buf[0] = 0x00;
	buf[1] = 0x01;
927
	ret = __i2c_transfer(client->adapter, msg, 1);
928 929 930
	if (ret != 1)
		goto err;

931
	dev->page = 1;
932 933 934 935

	/* close I2C repeater gate */
	buf[0] = 0x01;
	buf[1] = 0x10;
936
	ret = __i2c_transfer(client->adapter, msg, 1);
937 938 939
	if (ret != 1)
		goto err;

940
	dev->i2c_gate_state = false;
941 942 943

	return;
err:
944
	dev_dbg(&client->dev, "failed=%d\n", ret);
945 946 947
	return;
}

948
static int rtl2832_select(struct i2c_adapter *adap, void *mux_priv, u32 chan_id)
949
{
950
	struct rtl2832_dev *dev = mux_priv;
951
	struct i2c_client *client = dev->client;
952
	int ret;
953
	u8 buf[2], val;
954 955
	struct i2c_msg msg[1] = {
		{
956
			.addr = client->addr,
957 958 959 960 961
			.flags = 0,
			.len = sizeof(buf),
			.buf = buf,
		}
	};
962 963
	struct i2c_msg msg_rd[2] = {
		{
964
			.addr = client->addr,
965 966 967 968
			.flags = 0,
			.len = 1,
			.buf = "\x01",
		}, {
969
			.addr = client->addr,
970 971 972 973 974 975 976
			.flags = I2C_M_RD,
			.len = 1,
			.buf = &val,
		}
	};

	/* terminate possible gate closing */
977
	cancel_delayed_work_sync(&dev->i2c_gate_work);
978

979
	if (dev->i2c_gate_state == chan_id)
980 981 982 983 984
		return 0;

	/* select reg bank 1 */
	buf[0] = 0x00;
	buf[1] = 0x01;
985
	ret = __i2c_transfer(client->adapter, msg, 1);
986 987 988
	if (ret != 1)
		goto err;

989
	dev->page = 1;
990

991
	/* we must read that register, otherwise there will be errors */
992
	ret = __i2c_transfer(client->adapter, msg_rd, 2);
993 994 995
	if (ret != 2)
		goto err;

996 997 998 999 1000 1001 1002
	/* open or close I2C repeater gate */
	buf[0] = 0x01;
	if (chan_id == 1)
		buf[1] = 0x18; /* open */
	else
		buf[1] = 0x10; /* close */

1003
	ret = __i2c_transfer(client->adapter, msg, 1);
1004 1005 1006
	if (ret != 1)
		goto err;

1007
	dev->i2c_gate_state = chan_id;
1008 1009 1010

	return 0;
err:
1011
	dev_dbg(&client->dev, "failed=%d\n", ret);
1012
	return -EREMOTEIO;
1013 1014
}

1015 1016 1017
static int rtl2832_deselect(struct i2c_adapter *adap, void *mux_priv,
		u32 chan_id)
{
1018
	struct rtl2832_dev *dev = mux_priv;
1019

1020
	schedule_delayed_work(&dev->i2c_gate_work, usecs_to_jiffies(100));
1021 1022 1023
	return 0;
}

1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053
static struct dvb_frontend_ops rtl2832_ops = {
	.delsys = { SYS_DVBT },
	.info = {
		.name = "Realtek RTL2832 (DVB-T)",
		.frequency_min	  = 174000000,
		.frequency_max	  = 862000000,
		.frequency_stepsize = 166667,
		.caps = FE_CAN_FEC_1_2 |
			FE_CAN_FEC_2_3 |
			FE_CAN_FEC_3_4 |
			FE_CAN_FEC_5_6 |
			FE_CAN_FEC_7_8 |
			FE_CAN_FEC_AUTO |
			FE_CAN_QPSK |
			FE_CAN_QAM_16 |
			FE_CAN_QAM_64 |
			FE_CAN_QAM_AUTO |
			FE_CAN_TRANSMISSION_MODE_AUTO |
			FE_CAN_GUARD_INTERVAL_AUTO |
			FE_CAN_HIERARCHY_AUTO |
			FE_CAN_RECOVER |
			FE_CAN_MUTE_TS
	 },

	.init = rtl2832_init,
	.sleep = rtl2832_sleep,

	.get_tune_settings = rtl2832_get_tune_settings,

	.set_frontend = rtl2832_set_frontend,
1054
	.get_frontend = rtl2832_get_frontend,
1055 1056

	.read_status = rtl2832_read_status,
1057
	.read_snr = rtl2832_read_snr,
1058
	.read_ber = rtl2832_read_ber,
1059

1060 1061 1062
	.i2c_gate_ctrl = rtl2832_i2c_gate_ctrl,
};

1063 1064
static struct dvb_frontend *rtl2832_get_dvb_frontend(struct i2c_client *client)
{
1065
	struct rtl2832_dev *dev = i2c_get_clientdata(client);
1066 1067 1068 1069 1070 1071 1072

	dev_dbg(&client->dev, "\n");
	return &dev->fe;
}

static struct i2c_adapter *rtl2832_get_i2c_adapter_(struct i2c_client *client)
{
1073
	struct rtl2832_dev *dev = i2c_get_clientdata(client);
1074 1075 1076 1077 1078 1079 1080

	dev_dbg(&client->dev, "\n");
	return dev->i2c_adapter_tuner;
}

static struct i2c_adapter *rtl2832_get_private_i2c_adapter_(struct i2c_client *client)
{
1081
	struct rtl2832_dev *dev = i2c_get_clientdata(client);
1082 1083 1084 1085 1086 1087 1088

	dev_dbg(&client->dev, "\n");
	return dev->i2c_adapter;
}

static int rtl2832_enable_slave_ts(struct i2c_client *client)
{
1089
	struct rtl2832_dev *dev = i2c_get_clientdata(client);
1090 1091
	int ret;

1092
	dev_dbg(&client->dev, "\n");
1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136

	ret = rtl2832_wr_regs(dev, 0x0c, 1, "\x5f\xff", 2);
	if (ret)
		goto err;

	ret = rtl2832_wr_demod_reg(dev, DVBT_PIP_ON, 0x1);
	if (ret)
		goto err;

	ret = rtl2832_wr_reg(dev, 0xbc, 0, 0x18);
	if (ret)
		goto err;

	ret = rtl2832_wr_reg(dev, 0x22, 0, 0x01);
	if (ret)
		goto err;

	ret = rtl2832_wr_reg(dev, 0x26, 0, 0x1f);
	if (ret)
		goto err;

	ret = rtl2832_wr_reg(dev, 0x27, 0, 0xff);
	if (ret)
		goto err;

	ret = rtl2832_wr_regs(dev, 0x92, 1, "\x7f\xf7\xff", 3);
	if (ret)
		goto err;

	/* soft reset */
	ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
	if (ret)
		goto err;

	ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
	if (ret)
		goto err;

	return 0;
err:
	dev_dbg(&client->dev, "failed=%d\n", ret);
	return ret;
}

1137 1138 1139 1140 1141
static int rtl2832_probe(struct i2c_client *client,
		const struct i2c_device_id *id)
{
	struct rtl2832_platform_data *pdata = client->dev.platform_data;
	struct i2c_adapter *i2c = client->adapter;
1142
	struct rtl2832_dev *dev;
1143 1144 1145 1146 1147 1148
	int ret;
	u8 tmp;

	dev_dbg(&client->dev, "\n");

	/* allocate memory for the internal state */
1149 1150
	dev = kzalloc(sizeof(struct rtl2832_dev), GFP_KERNEL);
	if (dev == NULL) {
1151 1152 1153 1154
		ret = -ENOMEM;
		goto err;
	}

1155 1156
	/* setup the state */
	dev->client = client;
1157 1158 1159 1160 1161
	dev->pdata = client->dev.platform_data;
	if (pdata->config) {
		dev->pdata->clk = pdata->config->xtal;
		dev->pdata->tuner = pdata->config->tuner;
	}
1162 1163
	dev->sleeping = true;
	INIT_DELAYED_WORK(&dev->i2c_gate_work, rtl2832_i2c_gate_work);
1164
	/* create muxed i2c adapter for demod itself */
1165
	dev->i2c_adapter = i2c_add_mux_adapter(i2c, &i2c->dev, dev, 0, 0, 0,
1166
			rtl2832_select, NULL);
1167
	if (dev->i2c_adapter == NULL) {
1168 1169 1170 1171 1172
		ret = -ENODEV;
		goto err_kfree;
	}

	/* check if the demod is there */
1173
	ret = rtl2832_rd_reg(dev, 0x00, 0x0, &tmp);
1174 1175 1176 1177
	if (ret)
		goto err_i2c_del_mux_adapter;

	/* create muxed i2c adapter for demod tuner bus */
1178
	dev->i2c_adapter_tuner = i2c_add_mux_adapter(i2c, &i2c->dev, dev,
1179
			0, 1, 0, rtl2832_select, rtl2832_deselect);
1180
	if (dev->i2c_adapter_tuner == NULL) {
1181 1182 1183 1184 1185
		ret = -ENODEV;
		goto err_i2c_del_mux_adapter;
	}

	/* create dvb_frontend */
1186 1187 1188
	memcpy(&dev->fe.ops, &rtl2832_ops, sizeof(struct dvb_frontend_ops));
	dev->fe.demodulator_priv = dev;
	i2c_set_clientdata(client, dev);
1189 1190 1191 1192 1193 1194

	/* setup callbacks */
	pdata->get_dvb_frontend = rtl2832_get_dvb_frontend;
	pdata->get_i2c_adapter = rtl2832_get_i2c_adapter_;
	pdata->get_private_i2c_adapter = rtl2832_get_private_i2c_adapter_;
	pdata->enable_slave_ts = rtl2832_enable_slave_ts;
1195 1196 1197 1198

	dev_info(&client->dev, "Realtek RTL2832 successfully attached\n");
	return 0;
err_i2c_del_mux_adapter:
1199
	i2c_del_mux_adapter(dev->i2c_adapter);
1200
err_kfree:
1201
	kfree(dev);
1202 1203 1204 1205 1206 1207 1208
err:
	dev_dbg(&client->dev, "failed=%d\n", ret);
	return ret;
}

static int rtl2832_remove(struct i2c_client *client)
{
1209
	struct rtl2832_dev *dev = i2c_get_clientdata(client);
1210 1211 1212

	dev_dbg(&client->dev, "\n");

1213
	cancel_delayed_work_sync(&dev->i2c_gate_work);
1214

1215
	i2c_del_mux_adapter(dev->i2c_adapter_tuner);
1216

1217
	i2c_del_mux_adapter(dev->i2c_adapter);
1218

1219
	kfree(dev);
1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241

	return 0;
}

static const struct i2c_device_id rtl2832_id_table[] = {
	{"rtl2832", 0},
	{}
};
MODULE_DEVICE_TABLE(i2c, rtl2832_id_table);

static struct i2c_driver rtl2832_driver = {
	.driver = {
		.owner	= THIS_MODULE,
		.name	= "rtl2832",
	},
	.probe		= rtl2832_probe,
	.remove		= rtl2832_remove,
	.id_table	= rtl2832_id_table,
};

module_i2c_driver(rtl2832_driver);

1242 1243 1244 1245
MODULE_AUTHOR("Thomas Mair <mair.thomas86@gmail.com>");
MODULE_DESCRIPTION("Realtek RTL2832 DVB-T demodulator driver");
MODULE_LICENSE("GPL");
MODULE_VERSION("0.5");