armada-37xx.dtsi 9.5 KB
Newer Older
1
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
/*
 * Device Tree Include file for Marvell Armada 37xx family of SoCs.
 *
 * Copyright (C) 2016 Marvell
 *
 * Gregory CLEMENT <gregory.clement@free-electrons.com>
 *
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	model = "Marvell Armada 37xx SoC";
	compatible = "marvell,armada3700";
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	aliases {
		serial0 = &uart0;
22
		serial1 = &uart1;
23 24
	};

25 26 27 28 29 30 31 32 33 34 35 36 37 38 39
	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		/*
		 * The PSCI firmware region depicted below is the default one
		 * and should be updated by the bootloader.
		 */
		psci-area@4000000 {
			reg = <0 0x4000000 0 0x200000>;
			no-map;
		};
	};

40 41 42 43 44 45 46
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0>;
47
			clocks = <&nb_periph_clk 16>;
48 49 50 51 52 53 54 55 56 57 58
			enable-method = "psci";
		};
	};

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	timer {
		compatible = "arm,armv8-timer";
59 60 61 62
		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
63 64
	};

65 66 67 68 69
	pmu {
		compatible = "arm,armv8-pmuv3";
		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
	};

70 71 72 73 74 75
	soc {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

76
		internal-regs@d0000000 {
77 78 79 80 81 82
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "simple-bus";
			/* 32M internal register @ 0xd000_0000 */
			ranges = <0x0 0x0 0xd0000000 0x2000000>;

83 84 85 86 87 88 89 90 91 92 93
			spi0: spi@10600 {
				compatible = "marvell,armada-3700-spi";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x10600 0xA00>;
				clocks = <&nb_periph_clk 7>;
				interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
				num-cs = <4>;
				status = "disabled";
			};

94 95 96
			i2c0: i2c@11000 {
				compatible = "marvell,armada-3700-i2c";
				reg = <0x11000 0x24>;
97 98
				#address-cells = <1>;
				#size-cells = <0>;
99 100 101 102 103 104 105 106 107
				clocks = <&nb_periph_clk 10>;
				interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
				mrvl,i2c-fast-mode;
				status = "disabled";
			};

			i2c1: i2c@11080 {
				compatible = "marvell,armada-3700-i2c";
				reg = <0x11080 0x24>;
108 109
				#address-cells = <1>;
				#size-cells = <0>;
110 111 112 113 114 115
				clocks = <&nb_periph_clk 9>;
				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
				mrvl,i2c-fast-mode;
				status = "disabled";
			};

116 117 118 119 120 121
			avs: avs@11500 {
				compatible = "marvell,armada-3700-avs",
					     "syscon";
				reg = <0x11500 0x40>;
			};

122 123
			uart0: serial@12000 {
				compatible = "marvell,armada-3700-uart";
124
				reg = <0x12000 0x200>;
125
				clocks = <&xtalclk>;
126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141
				interrupts =
				<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "uart-sum", "uart-tx", "uart-rx";
				status = "disabled";
			};

			uart1: serial@12200 {
				compatible = "marvell,armada-3700-uart-ext";
				reg = <0x12200 0x30>;
				clocks = <&xtalclk>;
				interrupts =
				<GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
				<GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
				interrupt-names = "uart-tx", "uart-rx";
142 143 144
				status = "disabled";
			};

145
			nb_periph_clk: nb-periph-clk@13000 {
146 147 148 149 150 151 152
				compatible = "marvell,armada-3700-periph-clock-nb";
				reg = <0x13000 0x100>;
				clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
				<&tbg 3>, <&xtalclk>;
				#clock-cells = <1>;
			};

153
			sb_periph_clk: sb-periph-clk@18000 {
154 155 156 157 158 159 160
				compatible = "marvell,armada-3700-periph-clock-sb";
				reg = <0x18000 0x100>;
				clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
				<&tbg 3>, <&xtalclk>;
				#clock-cells = <1>;
			};

161 162 163 164 165 166 167
			tbg: tbg@13200 {
				compatible = "marvell,armada-3700-tbg-clock";
				reg = <0x13200 0x100>;
				clocks = <&xtalclk>;
				#clock-cells = <1>;
			};

168 169
			pinctrl_nb: pinctrl@13800 {
				compatible = "marvell,armada3710-nb-pinctrl",
170
					     "syscon", "simple-mfd";
171
				reg = <0x13800 0x100>, <0x13C00 0x20>;
172
				/* MPP1[19:0] */
173 174 175 176
				gpionb: gpio {
					#gpio-cells = <2>;
					gpio-ranges = <&pinctrl_nb 0 0 36>;
					gpio-controller;
177 178
					interrupt-controller;
					#interrupt-cells = <2>;
179 180 181 182 183 184 185 186 187 188 189 190 191 192
					interrupts =
					<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
				};
193 194 195 196 197 198

				xtalclk: xtal-clk {
					compatible = "marvell,armada-3700-xtal-clock";
					clock-output-names = "xtal";
					#clock-cells = <0>;
				};
199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223

				spi_quad_pins: spi-quad-pins {
					groups = "spi_quad";
					function = "spi";
				};

				i2c1_pins: i2c1-pins {
					groups = "i2c1";
					function = "i2c";
				};

				i2c2_pins: i2c2-pins {
					groups = "i2c2";
					function = "i2c";
				};

				uart1_pins: uart1-pins {
					groups = "uart1";
					function = "uart";
				};

				uart2_pins: uart2-pins {
					groups = "uart2";
					function = "uart";
				};
224 225
			};

226 227 228 229 230 231
			nb_pm: syscon@14000 {
				compatible = "marvell,armada-3700-nb-pm",
					     "syscon";
				reg = <0x14000 0x60>;
			};

232 233
			pinctrl_sb: pinctrl@18800 {
				compatible = "marvell,armada3710-sb-pinctrl",
234
					     "syscon", "simple-mfd";
235
				reg = <0x18800 0x100>, <0x18C00 0x20>;
236
				/* MPP2[23:0] */
237 238
				gpiosb: gpio {
					#gpio-cells = <2>;
239
					gpio-ranges = <&pinctrl_sb 0 0 30>;
240
					gpio-controller;
241 242
					interrupt-controller;
					#interrupt-cells = <2>;
243 244 245 246 247 248 249
					interrupts =
					<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
				};
250 251 252 253 254 255

				rgmii_pins: mii-pins {
					groups = "rgmii";
					function = "mii";
				};

256 257
			};

258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280
			eth0: ethernet@30000 {
				   compatible = "marvell,armada-3700-neta";
				   reg = <0x30000 0x4000>;
				   interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
				   clocks = <&sb_periph_clk 8>;
				   status = "disabled";
			};

			mdio: mdio@32004 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "marvell,orion-mdio";
				reg = <0x32004 0x4>;
			};

			eth1: ethernet@40000 {
				compatible = "marvell,armada-3700-neta";
				reg = <0x40000 0x4000>;
				interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&sb_periph_clk 7>;
				status = "disabled";
			};

281
			usb3: usb@58000 {
282 283
				compatible = "marvell,armada3700-xhci",
				"generic-xhci";
284
				reg = <0x58000 0x4000>;
285
				interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
286
				clocks = <&sb_periph_clk 12>;
287 288 289
				status = "disabled";
			};

290 291 292 293 294 295 296
			usb2: usb@5e000 {
				compatible = "marvell,armada-3700-ehci";
				reg = <0x5e000 0x2000>;
				interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};

297 298
			xor@60900 {
				compatible = "marvell,armada-3700-xor";
299 300
				reg = <0x60900 0x100>,
				      <0x60b00 0x100>;
301 302 303 304 305 306 307 308 309

				xor10 {
					interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
				};
				xor11 {
					interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
				};
			};

310
			crypto: crypto@90000 {
311
				compatible = "inside-secure,safexcel-eip97ies";
312 313 314 315 316 317 318 319 320 321 322 323
				reg = <0x90000 0x20000>;
				interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "mem", "ring0", "ring1",
						  "ring2", "ring3", "eip";
				clocks = <&nb_periph_clk 15>;
			};

324 325 326 327 328 329 330 331 332 333 334
			sdhci1: sdhci@d0000 {
				compatible = "marvell,armada-3700-sdhci",
					     "marvell,sdhci-xenon";
				reg = <0xd0000 0x300>,
				      <0x1e808 0x4>;
				interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&nb_periph_clk 0>;
				clock-names = "core";
				status = "disabled";
			};

335 336
			sdhci0: sdhci@d8000 {
				compatible = "marvell,armada-3700-sdhci",
337
					     "marvell,sdhci-xenon";
338 339
				reg = <0xd8000 0x300>,
				      <0x17808 0x4>;
340 341 342 343 344 345
				interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&nb_periph_clk 0>;
				clock-names = "core";
				status = "disabled";
			};

346
			sata: sata@e0000 {
347 348 349 350 351 352 353 354 355 356 357
				compatible = "marvell,armada-3700-ahci";
				reg = <0xe0000 0x2000>;
				interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};

			gic: interrupt-controller@1d00000 {
				compatible = "arm,gic-v3";
				#interrupt-cells = <3>;
				interrupt-controller;
				reg = <0x1d00000 0x10000>, /* GICD */
358 359 360 361
				      <0x1d40000 0x40000>, /* GICR */
				      <0x1d80000 0x2000>,  /* GICC */
				      <0x1d90000 0x2000>,  /* GICH */
				      <0x1da0000 0x20000>; /* GICV */
362
				interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
363 364
			};
		};
365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389

		pcie0: pcie@d0070000 {
			compatible = "marvell,armada-3700-pcie";
			device_type = "pci";
			status = "disabled";
			reg = <0 0xd0070000 0 0x20000>;
			#address-cells = <3>;
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
			#interrupt-cells = <1>;
			msi-parent = <&pcie0>;
			msi-controller;
			ranges = <0x82000000 0 0xe8000000   0 0xe8000000 0 0x1000000 /* Port 0 MEM */
				  0x81000000 0 0xe9000000   0 0xe9000000 0 0x10000>; /* Port 0 IO*/
			interrupt-map-mask = <0 0 0 7>;
			interrupt-map = <0 0 0 1 &pcie_intc 0>,
					<0 0 0 2 &pcie_intc 1>,
					<0 0 0 3 &pcie_intc 2>,
					<0 0 0 4 &pcie_intc 3>;
			pcie_intc: interrupt-controller {
				interrupt-controller;
				#interrupt-cells = <1>;
			};
		};
390 391
	};
};