em28xx-core.c 30.2 KB
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/*
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   em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
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   Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
		      Markus Rechberger <mrechberger@gmail.com>
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		      Mauro Carvalho Chehab <mchehab@infradead.org>
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		      Sascha Sommer <saschasommer@freenet.de>
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   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/init.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/usb.h>
#include <linux/vmalloc.h>
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#include <media/v4l2-common.h>
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#include "em28xx.h"
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/* #define ENABLE_DEBUG_ISOC_FRAMES */

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static unsigned int core_debug;
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module_param(core_debug, int, 0644);
MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
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#define em28xx_coredbg(fmt, arg...) do {\
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	if (core_debug) \
		printk(KERN_INFO "%s %s :"fmt, \
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			 dev->name, __func__ , ##arg); } while (0)
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static unsigned int reg_debug;
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module_param(reg_debug, int, 0644);
MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
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#define em28xx_regdbg(fmt, arg...) do {\
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	if (reg_debug) \
		printk(KERN_INFO "%s %s :"fmt, \
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			 dev->name, __func__ , ##arg); } while (0)
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static int alt = EM28XX_PINOUT;
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module_param(alt, int, 0644);
MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");

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static unsigned int disable_vbi;
module_param(disable_vbi, int, 0644);
MODULE_PARM_DESC(disable_vbi, "disable vbi support");

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/* FIXME */
#define em28xx_isocdbg(fmt, arg...) do {\
	if (core_debug) \
		printk(KERN_INFO "%s %s :"fmt, \
			 dev->name, __func__ , ##arg); } while (0)

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/*
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 * em28xx_read_reg_req()
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 * reads data from the usb device specifying bRequest
 */
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int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
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				   char *buf, int len)
{
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	int ret;
	int pipe = usb_rcvctrlpipe(dev->udev, 0);
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	if (dev->state & DEV_DISCONNECTED)
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		return -ENODEV;

	if (len > URB_MAX_CTRL_SIZE)
		return -EINVAL;
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	if (reg_debug) {
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		printk(KERN_DEBUG "(pipe 0x%08x): "
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			"IN:  %02x %02x %02x %02x %02x %02x %02x %02x ",
			pipe,
			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
			req, 0, 0,
			reg & 0xff, reg >> 8,
			len & 0xff, len >> 8);
	}
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	mutex_lock(&dev->ctrl_urb_lock);
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	ret = usb_control_msg(dev->udev, pipe, req,
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			      USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
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			      0x0000, reg, dev->urb_buf, len, HZ);
	if (ret < 0) {
		if (reg_debug)
			printk(" failed!\n");
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		mutex_unlock(&dev->ctrl_urb_lock);
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		return ret;
	}

	if (len)
		memcpy(buf, dev->urb_buf, len);
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	mutex_unlock(&dev->ctrl_urb_lock);

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	if (reg_debug) {
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		int byte;

		printk("<<<");
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		for (byte = 0; byte < len; byte++)
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			printk(" %02x", (unsigned char)buf[byte]);
		printk("\n");
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	}

	return ret;
}

/*
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 * em28xx_read_reg_req()
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 * reads data from the usb device specifying bRequest
 */
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int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
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{
	int ret;
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	u8 val;
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	ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
	if (ret < 0)
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		return ret;
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	return val;
}

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int em28xx_read_reg(struct em28xx *dev, u16 reg)
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{
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	return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
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}

/*
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 * em28xx_write_regs_req()
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 * sends data to the usb device, specifying bRequest
 */
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int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
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				 int len)
{
	int ret;
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	int pipe = usb_sndctrlpipe(dev->udev, 0);
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	if (dev->state & DEV_DISCONNECTED)
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		return -ENODEV;

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	if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
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		return -EINVAL;
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	if (reg_debug) {
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		int byte;

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		printk(KERN_DEBUG "(pipe 0x%08x): "
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			"OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
			pipe,
			USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
			req, 0, 0,
			reg & 0xff, reg >> 8,
			len & 0xff, len >> 8);

		for (byte = 0; byte < len; byte++)
			printk(" %02x", (unsigned char)buf[byte]);
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		printk("\n");
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	}

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	mutex_lock(&dev->ctrl_urb_lock);
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	memcpy(dev->urb_buf, buf, len);
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	ret = usb_control_msg(dev->udev, pipe, req,
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			      USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
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			      0x0000, reg, dev->urb_buf, len, HZ);
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	mutex_unlock(&dev->ctrl_urb_lock);
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	if (dev->wait_after_write)
		msleep(dev->wait_after_write);

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	return ret;
}

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int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
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{
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	int rc;

	rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);

	/* Stores GPO/GPIO values at the cache, if changed
	   Only write values should be stored, since input on a GPIO
	   register will return the input bits.
	   Not sure what happens on reading GPO register.
	 */
	if (rc >= 0) {
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		if (reg == dev->reg_gpo_num)
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			dev->reg_gpo = buf[0];
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		else if (reg == dev->reg_gpio_num)
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			dev->reg_gpio = buf[0];
	}

	return rc;
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}

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/* Write a single register */
int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
{
	return em28xx_write_regs(dev, reg, &val, 1);
}

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/*
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 * em28xx_write_reg_bits()
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 * sets only some bits (specified by bitmask) of a register, by first reading
 * the actual value
 */
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static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
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				 u8 bitmask)
{
	int oldval;
	u8 newval;
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	/* Uses cache for gpo/gpio registers */
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	if (reg == dev->reg_gpo_num)
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		oldval = dev->reg_gpo;
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	else if (reg == dev->reg_gpio_num)
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		oldval = dev->reg_gpio;
	else
		oldval = em28xx_read_reg(dev, reg);
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	if (oldval < 0)
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		return oldval;
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	newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
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	return em28xx_write_regs(dev, reg, &newval, 1);
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}

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/*
 * em28xx_is_ac97_ready()
 * Checks if ac97 is ready
 */
static int em28xx_is_ac97_ready(struct em28xx *dev)
{
	int ret, i;

	/* Wait up to 50 ms for AC97 command to complete */
	for (i = 0; i < 10; i++, msleep(5)) {
		ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
		if (ret < 0)
			return ret;

		if (!(ret & 0x01))
			return 0;
	}

	em28xx_warn("AC97 command still being executed: not handled properly!\n");
	return -EBUSY;
}

/*
 * em28xx_read_ac97()
 * write a 16 bit value to the specified AC97 address (LSB first!)
 */
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int em28xx_read_ac97(struct em28xx *dev, u8 reg)
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{
	int ret;
	u8 addr = (reg & 0x7f) | 0x80;
	u16 val;

	ret = em28xx_is_ac97_ready(dev);
	if (ret < 0)
		return ret;

	ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
	if (ret < 0)
		return ret;

	ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
					   (u8 *)&val, sizeof(val));

	if (ret < 0)
		return ret;
	return le16_to_cpu(val);
}

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/*
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 * em28xx_write_ac97()
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 * write a 16 bit value to the specified AC97 address (LSB first!)
 */
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int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
294
{
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	int ret;
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	u8 addr = reg & 0x7f;
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	__le16 value;

	value = cpu_to_le16(val);

	ret = em28xx_is_ac97_ready(dev);
	if (ret < 0)
		return ret;
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	ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
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	if (ret < 0)
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		return ret;
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	ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
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	if (ret < 0)
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		return ret;
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	return 0;
}
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struct em28xx_vol_table {
	enum em28xx_amux mux;
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	u8		 reg;
};

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static struct em28xx_vol_table inputs[] = {
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	{ EM28XX_AMUX_VIDEO, 	AC97_VIDEO_VOL   },
	{ EM28XX_AMUX_LINE_IN,	AC97_LINEIN_VOL  },
	{ EM28XX_AMUX_PHONE,	AC97_PHONE_VOL   },
	{ EM28XX_AMUX_MIC,	AC97_MIC_VOL     },
	{ EM28XX_AMUX_CD,	AC97_CD_VOL      },
	{ EM28XX_AMUX_AUX,	AC97_AUX_VOL     },
	{ EM28XX_AMUX_PCM_OUT,	AC97_PCM_OUT_VOL },
};

static int set_ac97_input(struct em28xx *dev)
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{
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	int ret, i;
	enum em28xx_amux amux = dev->ctl_ainput;
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	/* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
	   em28xx should point to LINE IN, while AC97 should use VIDEO
	 */
	if (amux == EM28XX_AMUX_VIDEO2)
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		amux = EM28XX_AMUX_VIDEO;
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	/* Mute all entres but the one that were selected */
	for (i = 0; i < ARRAY_SIZE(inputs); i++) {
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		if (amux == inputs[i].mux)
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			ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
		else
			ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
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		if (ret < 0)
			em28xx_warn("couldn't setup AC97 register %d\n",
				     inputs[i].reg);
	}
	return 0;
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}

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static int em28xx_set_audio_source(struct em28xx *dev)
357
{
358
	int ret;
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	u8 input;

361
	if (dev->board.is_em2800) {
362
		if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
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			input = EM2800_AUDIO_SRC_TUNER;
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		else
			input = EM2800_AUDIO_SRC_LINE;
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367
		ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
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		if (ret < 0)
			return ret;
	}

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	if (dev->board.has_msp34xx)
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		input = EM28XX_AUDIO_SRC_TUNER;
	else {
		switch (dev->ctl_ainput) {
		case EM28XX_AMUX_VIDEO:
			input = EM28XX_AUDIO_SRC_TUNER;
			break;
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		default:
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			input = EM28XX_AUDIO_SRC_LINE;
			break;
		}
	}

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	if (dev->board.mute_gpio && dev->mute)
		em28xx_gpio_set(dev, dev->board.mute_gpio);
	else
		em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);

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	ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
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	if (ret < 0)
		return ret;
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	msleep(5);
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	switch (dev->audio_mode.ac97) {
	case EM28XX_NO_AC97:
		break;
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	default:
		ret = set_ac97_input(dev);
400
	}
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402
	return ret;
403 404
}

405
static const struct em28xx_vol_table outputs[] = {
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	{ EM28XX_AOUT_MASTER, AC97_MASTER_VOL      },
	{ EM28XX_AOUT_LINE,   AC97_LINE_LEVEL_VOL  },
	{ EM28XX_AOUT_MONO,   AC97_MASTER_MONO_VOL },
	{ EM28XX_AOUT_LFE,    AC97_LFE_MASTER_VOL  },
	{ EM28XX_AOUT_SURR,   AC97_SURR_MASTER_VOL },
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};

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int em28xx_audio_analog_set(struct em28xx *dev)
414
{
415
	int ret, i;
416
	u8 xclk;
417

418 419
	if (!dev->audio_mode.has_audio)
		return 0;
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421 422 423
	/* It is assumed that all devices use master volume for output.
	   It would be possible to use also line output.
	 */
424
	if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
425 426
		/* Mute all outputs */
		for (i = 0; i < ARRAY_SIZE(outputs); i++) {
427
			ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
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			if (ret < 0)
				em28xx_warn("couldn't setup AC97 register %d\n",
430
				     outputs[i].reg);
431
		}
432
	}
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434
	xclk = dev->board.xclk & 0x7f;
435
	if (!dev->mute)
436
		xclk |= EM28XX_XCLK_AUDIO_UNMUTE;
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438
	ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
439 440
	if (ret < 0)
		return ret;
441
	msleep(10);
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	/* Selects the proper audio input */
	ret = em28xx_set_audio_source(dev);
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	/* Sets volume */
	if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
		int vol;

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		em28xx_write_ac97(dev, AC97_POWER_DOWN_CTRL, 0x4200);
		em28xx_write_ac97(dev, AC97_EXT_AUD_CTRL, 0x0031);
		em28xx_write_ac97(dev, AC97_PCM_IN_SRATE, 0xbb80);

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		/* LSB: left channel - both channels with the same level */
		vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);

		/* Mute device, if needed */
		if (dev->mute)
			vol |= 0x8000;

		/* Sets volume */
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		for (i = 0; i < ARRAY_SIZE(outputs); i++) {
			if (dev->ctl_aoutput & outputs[i].mux)
				ret = em28xx_write_ac97(dev, outputs[i].reg,
							vol);
			if (ret < 0)
				em28xx_warn("couldn't setup AC97 register %d\n",
				     outputs[i].reg);
		}
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		if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
			int sel = ac97_return_record_select(dev->ctl_aoutput);

474 475
			/* Use the same input for both left and right
			   channels */
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			sel |= (sel << 8);

			em28xx_write_ac97(dev, AC97_RECORD_SELECT, sel);
		}
480
	}
481

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	return ret;
}
EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
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486 487 488
int em28xx_audio_setup(struct em28xx *dev)
{
	int vid1, vid2, feat, cfg;
489
	u32 vid;
490

491
	if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874) {
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		/* Digital only device - don't load any alsa module */
		dev->audio_mode.has_audio = 0;
		dev->has_audio_class = 0;
		dev->has_alsa_audio = 0;
		return 0;
	}

	/* If device doesn't support Usb Audio Class, use vendor class */
	if (!dev->has_audio_class)
		dev->has_alsa_audio = 1;

	dev->audio_mode.has_audio = 1;

	/* See how this device is configured */
	cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
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	em28xx_info("Config register raw data: 0x%02x\n", cfg);
	if (cfg < 0) {
		/* Register read error?  */
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		cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
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	} else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
		/* The device doesn't have vendor audio at all */
		dev->has_alsa_audio = 0;
		dev->audio_mode.has_audio = 0;
		return 0;
	} else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
		   EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
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		em28xx_info("I2S Audio (3 sample rates)\n");
		dev->audio_mode.i2s_3rates = 1;
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	} else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
		   EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
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		em28xx_info("I2S Audio (5 sample rates)\n");
		dev->audio_mode.i2s_5rates = 1;
	}

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	if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
		/* Skip the code that does AC97 vendor detection */
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		dev->audio_mode.ac97 = EM28XX_NO_AC97;
		goto init_audio;
	}

	dev->audio_mode.ac97 = EM28XX_AC97_OTHER;

	vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
	if (vid1 < 0) {
		/* Device likely doesn't support AC97 */
		em28xx_warn("AC97 chip type couldn't be determined\n");
		goto init_audio;
	}

	vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
	if (vid2 < 0)
		goto init_audio;

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	vid = vid1 << 16 | vid2;

	dev->audio_mode.ac97_vendor_id = vid;
	em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
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	feat = em28xx_read_ac97(dev, AC97_RESET);
	if (feat < 0)
		goto init_audio;

	dev->audio_mode.ac97_feat = feat;
	em28xx_warn("AC97 features = 0x%04x\n", feat);

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	/* Try to identify what audio processor we have */
	if ((vid == 0xffffffff) && (feat == 0x6a90))
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		dev->audio_mode.ac97 = EM28XX_AC97_EM202;
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	else if ((vid >> 8) == 0x838476)
		dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
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init_audio:
	/* Reports detected AC97 processor */
	switch (dev->audio_mode.ac97) {
	case EM28XX_NO_AC97:
		em28xx_info("No AC97 audio processor\n");
		break;
	case EM28XX_AC97_EM202:
		em28xx_info("Empia 202 AC97 audio processor detected\n");
		break;
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	case EM28XX_AC97_SIGMATEL:
		em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
			    dev->audio_mode.ac97_vendor_id & 0xff);
		break;
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	case EM28XX_AC97_OTHER:
		em28xx_warn("Unknown AC97 audio processor detected!\n");
		break;
	default:
		break;
	}

	return em28xx_audio_analog_set(dev);
}
EXPORT_SYMBOL_GPL(em28xx_audio_setup);

587
int em28xx_colorlevels_set_default(struct em28xx *dev)
588
{
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	em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);	/* contrast */
	em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x00);	/* brightness */
	em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10);	/* saturation */
	em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
	em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
	em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x00);

	em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
	em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
	em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
	em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
	em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
	em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
	return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
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}

605
int em28xx_capture_start(struct em28xx *dev, int start)
606
{
607
	int rc;
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	if (dev->chip_id == CHIP_ID_EM2874) {
		/* The Transport Stream Enable Register moved in em2874 */
		if (!start) {
			rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
						   0x00,
						   EM2874_TS1_CAPTURE_ENABLE);
			return rc;
		}

		/* Enable Transport Stream */
		rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
					   EM2874_TS1_CAPTURE_ENABLE,
					   EM2874_TS1_CAPTURE_ENABLE);
		return rc;
	}


626 627
	/* FIXME: which is the best order? */
	/* video registers are sampled by VREF */
628
	rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
629 630 631 632 633 634
				   start ? 0x10 : 0x00, 0x10);
	if (rc < 0)
		return rc;

	if (!start) {
		/* disable video capture */
635
		rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
636
		return rc;
637 638
	}

639 640 641
	if (dev->board.is_webcam)
		rc = em28xx_write_reg(dev, 0x13, 0x0c);

642
	/* enable video capture */
643
	rc = em28xx_write_reg(dev, 0x48, 0x00);
644

645
	if (dev->mode == EM28XX_ANALOG_MODE)
646
		rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
647
	else
648
		rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
649

650
	msleep(6);
651 652

	return rc;
653 654
}

655 656 657 658 659 660 661 662 663 664 665 666 667 668
int em28xx_vbi_supported(struct em28xx *dev)
{
	/* Modprobe option to manually disable */
	if (disable_vbi == 1)
		return 0;

	if (dev->chip_id == CHIP_ID_EM2860 ||
	    dev->chip_id == CHIP_ID_EM2883)
		return 1;

	/* Version of em28xx that does not support VBI */
	return 0;
}

669
int em28xx_set_outfmt(struct em28xx *dev)
670
{
671
	int ret;
672
	u8 vinctrl;
673 674

	ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT,
675
				dev->format->reg | 0x20, 0xff);
676
	if (ret < 0)
677
			return ret;
678

679
	ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, dev->vinmode);
680 681 682
	if (ret < 0)
		return ret;

683 684 685 686 687 688 689 690 691 692
	vinctrl = dev->vinctl;
	if (em28xx_vbi_supported(dev) == 1) {
		vinctrl |= EM28XX_VINCTRL_VBI_RAW;
		em28xx_write_reg(dev, EM28XX_R34_VBI_START_H, 0x00);
		em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x09);
		em28xx_write_reg(dev, EM28XX_R36_VBI_WIDTH, 0xb4);
		em28xx_write_reg(dev, EM28XX_R37_VBI_HEIGHT, 0x0c);
	}

	return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctrl);
693 694
}

695 696
static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
				  u8 ymin, u8 ymax)
697
{
698 699
	em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
			xmin, ymin, xmax, ymax);
700

701 702 703 704
	em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
	em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
	em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
	return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
705 706
}

707
static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
708 709 710 711 712 713
				   u16 width, u16 height)
{
	u8 cwidth = width;
	u8 cheight = height;
	u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);

714 715
	em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
			(width | (overflow & 2) << 7),
716 717
			(height | (overflow & 1) << 8));

718 719 720 721 722
	em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
	em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
	em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
	em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
	return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
723 724
}

725
static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
726
{
727 728
	u8 mode;
	/* the em2800 scaler only supports scaling down to 50% */
729

730
	if (dev->board.is_em2800) {
731
		mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
732
	} else {
733
		u8 buf[2];
734

735 736
		buf[0] = h;
		buf[1] = h >> 8;
737
		em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
738

739 740
		buf[0] = v;
		buf[1] = v >> 8;
741
		em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
742 743
		/* it seems that both H and V scalers must be active
		   to work correctly */
744
		mode = (h || v) ? 0x30 : 0x00;
745
	}
746
	return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
747 748 749
}

/* FIXME: this only function read values from dev */
750
int em28xx_resolution_set(struct em28xx *dev)
751 752 753
{
	int width, height;
	width = norm_maxw(dev);
754 755 756 757
	height = norm_maxh(dev);

	if (!dev->progressive)
		height >>= norm_maxh(dev);
758

759
	em28xx_set_outfmt(dev);
760 761


762
	em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
763 764 765 766 767 768 769 770

	/* If we don't set the start position to 4 in VBI mode, we end up
	   with line 21 being YUYV encoded instead of being in 8-bit
	   greyscale */
	if (em28xx_vbi_supported(dev) == 1)
		em28xx_capture_area_set(dev, 0, 4, width >> 2, height >> 2);
	else
		em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
771

772
	return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
773 774
}

775
int em28xx_set_alternate(struct em28xx *dev)
776 777
{
	int errCode, prev_alt = dev->alt;
778
	int i;
779
	unsigned int min_pkt_size = dev->width * 2 + 4;
780

781
	/* When image size is bigger than a certain value,
782 783 784
	   the frame size should be increased, otherwise, only
	   green screen will be received.
	 */
785
	if (dev->width * 2 * dev->height > 720 * 240 * 2)
786 787
		min_pkt_size *= 2;

788 789 790 791
	for (i = 0; i < dev->num_alt; i++) {
		/* stop when the selected alt setting offers enough bandwidth */
		if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
			dev->alt = i;
792
			break;
793 794 795 796 797 798 799
		/* otherwise make sure that we end up with the maximum bandwidth
		   because the min_pkt_size equation might be wrong...
		*/
		} else if (dev->alt_max_pkt_size[i] >
			   dev->alt_max_pkt_size[dev->alt])
			dev->alt = i;
	}
800 801

	if (dev->alt != prev_alt) {
802 803
		em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
				min_pkt_size, dev->alt);
804
		dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
805 806
		em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
			       dev->alt, dev->max_pkt_size);
807 808
		errCode = usb_set_interface(dev->udev, 0, dev->alt);
		if (errCode < 0) {
809
			em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
810
					dev->alt, errCode);
811 812 813 814 815
			return errCode;
		}
	}
	return 0;
}
816

817 818 819 820 821 822 823
int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
{
	int rc = 0;

	if (!gpio)
		return rc;

824 825 826 827 828 829 830 831
	if (dev->mode != EM28XX_SUSPEND) {
		em28xx_write_reg(dev, 0x48, 0x00);
		if (dev->mode == EM28XX_ANALOG_MODE)
			em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
		else
			em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
		msleep(6);
	}
832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855

	/* Send GPIO reset sequences specified at board entry */
	while (gpio->sleep >= 0) {
		if (gpio->reg >= 0) {
			rc = em28xx_write_reg_bits(dev,
						   gpio->reg,
						   gpio->val,
						   gpio->mask);
			if (rc < 0)
				return rc;
		}
		if (gpio->sleep > 0)
			msleep(gpio->sleep);

		gpio++;
	}
	return rc;
}

int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
{
	if (dev->mode == set_mode)
		return 0;

856
	if (set_mode == EM28XX_SUSPEND) {
857
		dev->mode = set_mode;
858 859 860 861

		/* FIXME: add suspend support for ac97 */

		return em28xx_gpio_set(dev, dev->board.suspend_gpio);
862 863 864 865 866
	}

	dev->mode = set_mode;

	if (dev->mode == EM28XX_DIGITAL_MODE)
867
		return em28xx_gpio_set(dev, dev->board.dvb_gpio);
868
	else
869
		return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
870 871 872
}
EXPORT_SYMBOL_GPL(em28xx_set_mode);

873 874 875 876 877 878 879 880 881
/* ------------------------------------------------------------------
	URB control
   ------------------------------------------------------------------*/

/*
 * IRQ callback, called by URB callback
 */
static void em28xx_irq_callback(struct urb *urb)
{
882
	struct em28xx *dev = urb->context;
883 884
	int rc, i;

885 886 887 888 889 890 891 892 893 894 895 896 897
	switch (urb->status) {
	case 0:             /* success */
	case -ETIMEDOUT:    /* NAK */
		break;
	case -ECONNRESET:   /* kill */
	case -ENOENT:
	case -ESHUTDOWN:
		return;
	default:            /* error */
		em28xx_isocdbg("urb completition error %d.\n", urb->status);
		break;
	}

898 899 900 901 902 903 904 905 906 907 908 909 910 911
	/* Copy data from URB */
	spin_lock(&dev->slock);
	rc = dev->isoc_ctl.isoc_copy(dev, urb);
	spin_unlock(&dev->slock);

	/* Reset urb buffers */
	for (i = 0; i < urb->number_of_packets; i++) {
		urb->iso_frame_desc[i].status = 0;
		urb->iso_frame_desc[i].actual_length = 0;
	}
	urb->status = 0;

	urb->status = usb_submit_urb(urb, GFP_ATOMIC);
	if (urb->status) {
912 913
		em28xx_isocdbg("urb resubmit failed (error=%i)\n",
			       urb->status);
914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930
	}
}

/*
 * Stop and Deallocate URBs
 */
void em28xx_uninit_isoc(struct em28xx *dev)
{
	struct urb *urb;
	int i;

	em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");

	dev->isoc_ctl.nfields = -1;
	for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
		urb = dev->isoc_ctl.urb[i];
		if (urb) {
931 932 933 934 935
			if (!irqs_disabled())
				usb_kill_urb(urb);
			else
				usb_unlink_urb(urb);

936 937
			if (dev->isoc_ctl.transfer_buffer[i]) {
				usb_buffer_free(dev->udev,
938 939 940
					urb->transfer_buffer_length,
					dev->isoc_ctl.transfer_buffer[i],
					urb->transfer_dma);
941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963
			}
			usb_free_urb(urb);
			dev->isoc_ctl.urb[i] = NULL;
		}
		dev->isoc_ctl.transfer_buffer[i] = NULL;
	}

	kfree(dev->isoc_ctl.urb);
	kfree(dev->isoc_ctl.transfer_buffer);

	dev->isoc_ctl.urb = NULL;
	dev->isoc_ctl.transfer_buffer = NULL;
	dev->isoc_ctl.num_bufs = 0;

	em28xx_capture_start(dev, 0);
}
EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);

/*
 * Allocate URBs and start IRQ
 */
int em28xx_init_isoc(struct em28xx *dev, int max_packets,
		     int num_bufs, int max_pkt_size,
964
		     int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988
{
	struct em28xx_dmaqueue *dma_q = &dev->vidq;
	int i;
	int sb_size, pipe;
	struct urb *urb;
	int j, k;
	int rc;

	em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");

	/* De-allocates all pending stuff */
	em28xx_uninit_isoc(dev);

	dev->isoc_ctl.isoc_copy = isoc_copy;
	dev->isoc_ctl.num_bufs = num_bufs;

	dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs,  GFP_KERNEL);
	if (!dev->isoc_ctl.urb) {
		em28xx_errdev("cannot alloc memory for usb buffers\n");
		return -ENOMEM;
	}

	dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
					      GFP_KERNEL);
989
	if (!dev->isoc_ctl.transfer_buffer) {
990
		em28xx_errdev("cannot allocate memory for usb transfer\n");
991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015
		kfree(dev->isoc_ctl.urb);
		return -ENOMEM;
	}

	dev->isoc_ctl.max_pkt_size = max_pkt_size;
	dev->isoc_ctl.buf = NULL;

	sb_size = max_packets * dev->isoc_ctl.max_pkt_size;

	/* allocate urbs and transfer buffers */
	for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
		urb = usb_alloc_urb(max_packets, GFP_KERNEL);
		if (!urb) {
			em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
			em28xx_uninit_isoc(dev);
			return -ENOMEM;
		}
		dev->isoc_ctl.urb[i] = urb;

		dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
			sb_size, GFP_KERNEL, &urb->transfer_dma);
		if (!dev->isoc_ctl.transfer_buffer[i]) {
			em28xx_err("unable to allocate %i bytes for transfer"
					" buffer %i%s\n",
					sb_size, i,
1016
					in_interrupt() ? " while in int" : "");
1017 1018 1019 1020 1021 1022 1023 1024 1025
			em28xx_uninit_isoc(dev);
			return -ENOMEM;
		}
		memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);

		/* FIXME: this is a hack - should be
			'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
			should also be using 'desc.bInterval'
		 */
1026
		pipe = usb_rcvisocpipe(dev->udev,
1027
			dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
1028

1029 1030
		usb_fill_int_urb(urb, dev->udev, pipe,
				 dev->isoc_ctl.transfer_buffer[i], sb_size,
1031
				 em28xx_irq_callback, dev, 1);
1032 1033

		urb->number_of_packets = max_packets;
1034
		urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046

		k = 0;
		for (j = 0; j < max_packets; j++) {
			urb->iso_frame_desc[j].offset = k;
			urb->iso_frame_desc[j].length =
						dev->isoc_ctl.max_pkt_size;
			k += dev->isoc_ctl.max_pkt_size;
		}
	}

	init_waitqueue_head(&dma_q->wq);

1047
	em28xx_capture_start(dev, 1);
1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062

	/* submit urbs and enables IRQ */
	for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
		rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
		if (rc) {
			em28xx_err("submit of urb %i failed (error=%i)\n", i,
				   rc);
			em28xx_uninit_isoc(dev);
			return rc;
		}
	}

	return 0;
}
EXPORT_SYMBOL_GPL(em28xx_init_isoc);
1063

1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098
/* Determine the packet size for the DVB stream for the given device
   (underlying value programmed into the eeprom) */
int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev)
{
	unsigned int chip_cfg2;
	unsigned int packet_size = 564;

	if (dev->chip_id == CHIP_ID_EM2874) {
		/* FIXME - for now assume 564 like it was before, but the
		   em2874 code should be added to return the proper value... */
		packet_size = 564;
	} else {
		/* TS max packet size stored in bits 1-0 of R01 */
		chip_cfg2 = em28xx_read_reg(dev, EM28XX_R01_CHIPCFG2);
		switch (chip_cfg2 & EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK) {
		case EM28XX_CHIPCFG2_TS_PACKETSIZE_188:
			packet_size = 188;
			break;
		case EM28XX_CHIPCFG2_TS_PACKETSIZE_376:
			packet_size = 376;
			break;
		case EM28XX_CHIPCFG2_TS_PACKETSIZE_564:
			packet_size = 564;
			break;
		case EM28XX_CHIPCFG2_TS_PACKETSIZE_752:
			packet_size = 752;
			break;
		}
	}

	em28xx_coredbg("dvb max packet size=%d\n", packet_size);
	return packet_size;
}
EXPORT_SYMBOL_GPL(em28xx_isoc_dvb_max_packetsize);

1099 1100 1101 1102 1103 1104
/*
 * em28xx_wake_i2c()
 * configure i2c attached devices
 */
void em28xx_wake_i2c(struct em28xx *dev)
{
1105 1106 1107
	v4l2_device_call_all(&dev->v4l2_dev, 0, core,  reset, 0);
	v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_routing,
			INPUT(dev->ctl_input)->vmux, 0, 0);
1108
	v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0);
1109 1110 1111 1112 1113 1114 1115 1116 1117
}

/*
 * Device control list
 */

static LIST_HEAD(em28xx_devlist);
static DEFINE_MUTEX(em28xx_devlist_mutex);

1118
struct em28xx *em28xx_get_device(int minor,
1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234
				 enum v4l2_buf_type *fh_type,
				 int *has_radio)
{
	struct em28xx *h, *dev = NULL;

	*fh_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
	*has_radio = 0;

	mutex_lock(&em28xx_devlist_mutex);
	list_for_each_entry(h, &em28xx_devlist, devlist) {
		if (h->vdev->minor == minor)
			dev = h;
		if (h->vbi_dev->minor == minor) {
			dev = h;
			*fh_type = V4L2_BUF_TYPE_VBI_CAPTURE;
		}
		if (h->radio_dev &&
		    h->radio_dev->minor == minor) {
			dev = h;
			*has_radio = 1;
		}
	}
	mutex_unlock(&em28xx_devlist_mutex);

	return dev;
}

/*
 * em28xx_realease_resources()
 * unregisters the v4l2,i2c and usb devices
 * called when the device gets disconected or at module unload
*/
void em28xx_remove_from_devlist(struct em28xx *dev)
{
	mutex_lock(&em28xx_devlist_mutex);
	list_del(&dev->devlist);
	mutex_unlock(&em28xx_devlist_mutex);
};

void em28xx_add_into_devlist(struct em28xx *dev)
{
	mutex_lock(&em28xx_devlist_mutex);
	list_add_tail(&dev->devlist, &em28xx_devlist);
	mutex_unlock(&em28xx_devlist_mutex);
};

/*
 * Extension interface
 */

static LIST_HEAD(em28xx_extension_devlist);
static DEFINE_MUTEX(em28xx_extension_devlist_lock);

int em28xx_register_extension(struct em28xx_ops *ops)
{
	struct em28xx *dev = NULL;

	mutex_lock(&em28xx_devlist_mutex);
	mutex_lock(&em28xx_extension_devlist_lock);
	list_add_tail(&ops->next, &em28xx_extension_devlist);
	list_for_each_entry(dev, &em28xx_devlist, devlist) {
		if (dev)
			ops->init(dev);
	}
	printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name);
	mutex_unlock(&em28xx_extension_devlist_lock);
	mutex_unlock(&em28xx_devlist_mutex);
	return 0;
}
EXPORT_SYMBOL(em28xx_register_extension);

void em28xx_unregister_extension(struct em28xx_ops *ops)
{
	struct em28xx *dev = NULL;

	mutex_lock(&em28xx_devlist_mutex);
	list_for_each_entry(dev, &em28xx_devlist, devlist) {
		if (dev)
			ops->fini(dev);
	}

	mutex_lock(&em28xx_extension_devlist_lock);
	printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name);
	list_del(&ops->next);
	mutex_unlock(&em28xx_extension_devlist_lock);
	mutex_unlock(&em28xx_devlist_mutex);
}
EXPORT_SYMBOL(em28xx_unregister_extension);

void em28xx_init_extension(struct em28xx *dev)
{
	struct em28xx_ops *ops = NULL;

	mutex_lock(&em28xx_extension_devlist_lock);
	if (!list_empty(&em28xx_extension_devlist)) {
		list_for_each_entry(ops, &em28xx_extension_devlist, next) {
			if (ops->init)
				ops->init(dev);
		}
	}
	mutex_unlock(&em28xx_extension_devlist_lock);
}

void em28xx_close_extension(struct em28xx *dev)
{
	struct em28xx_ops *ops = NULL;

	mutex_lock(&em28xx_extension_devlist_lock);
	if (!list_empty(&em28xx_extension_devlist)) {
		list_for_each_entry(ops, &em28xx_extension_devlist, next) {
			if (ops->fini)
				ops->fini(dev);
		}
	}
	mutex_unlock(&em28xx_extension_devlist_lock);
}