rtc-s3c.c 16.9 KB
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/* drivers/rtc/rtc-s3c.c
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 *
 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com/
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 *
 * Copyright (c) 2004,2006 Simtec Electronics
 *	Ben Dooks, <ben@simtec.co.uk>
 *	http://armlinux.simtec.co.uk/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
*/

#include <linux/module.h>
#include <linux/fs.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/rtc.h>
#include <linux/bcd.h>
#include <linux/clk.h>
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#include <linux/log2.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/uaccess.h>
#include <linux/io.h>
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#include <asm/irq.h>
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#include "rtc-s3c.h"
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enum s3c_cpu_type {
	TYPE_S3C2410,
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	TYPE_S3C2416,
	TYPE_S3C2443,
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	TYPE_S3C64XX,
};

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struct s3c_rtc_drv_data {
	int cpu_type;
};

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struct s3c_rtc {
	struct device *dev;
	struct rtc_device *rtc;

	void __iomem *base;
	struct clk *rtc_clk;
	bool enabled;

	enum s3c_cpu_type cpu_type;
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56 57
	int irq_alarm;
	int irq_tick;
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	spinlock_t pie_lock;
	spinlock_t alarm_clk_lock;
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	int ticnt_save, ticnt_en_save;
	bool wake_en;
};

static void s3c_rtc_alarm_clk_enable(struct s3c_rtc *info, bool enable)
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{
	unsigned long irq_flags;

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	spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
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	if (enable) {
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		if (!info->enabled) {
			clk_enable(info->rtc_clk);
			info->enabled = true;
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		}
	} else {
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		if (info->enabled) {
			clk_disable(info->rtc_clk);
			info->enabled = false;
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		}
	}
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	spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
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}

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/* IRQ Handlers */
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static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
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{
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	struct s3c_rtc *info = (struct s3c_rtc *)id;
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90 91
	clk_enable(info->rtc_clk);
	rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
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	if (info->cpu_type == TYPE_S3C64XX)
		writeb(S3C2410_INTP_ALM, info->base + S3C2410_INTP);
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	clk_disable(info->rtc_clk);
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	s3c_rtc_alarm_clk_enable(info, false);
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	return IRQ_HANDLED;
}

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static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
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{
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	struct s3c_rtc *info = (struct s3c_rtc *)id;
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	clk_enable(info->rtc_clk);
	rtc_update_irq(info->rtc, 1, RTC_PF | RTC_IRQF);
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	if (info->cpu_type == TYPE_S3C64XX)
		writeb(S3C2410_INTP_TIC, info->base + S3C2410_INTP);

	clk_disable(info->rtc_clk);
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	return IRQ_HANDLED;
}

/* Update control registers */
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static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
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{
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	struct s3c_rtc *info = dev_get_drvdata(dev);
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	unsigned int tmp;

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	dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
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	clk_enable(info->rtc_clk);
	tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
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	if (enabled)
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		tmp |= S3C2410_RTCALM_ALMEN;

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	writeb(tmp, info->base + S3C2410_RTCALM);
	clk_disable(info->rtc_clk);
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	s3c_rtc_alarm_clk_enable(info, enabled);
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	return 0;
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}

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static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
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{
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	unsigned int tmp = 0;
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	int val;
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	if (!is_power_of_2(freq))
		return -EINVAL;

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	clk_enable(info->rtc_clk);
	spin_lock_irq(&info->pie_lock);
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	if (info->cpu_type != TYPE_S3C64XX) {
		tmp = readb(info->base + S3C2410_TICNT);
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		tmp &= S3C2410_TICNT_ENABLE;
	}

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	val = (info->rtc->max_user_freq / freq) - 1;
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	if (info->cpu_type == TYPE_S3C2416 || info->cpu_type == TYPE_S3C2443) {
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		tmp |= S3C2443_TICNT_PART(val);
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		writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
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		if (info->cpu_type == TYPE_S3C2416)
			writel(S3C2416_TICNT2_PART(val),
				info->base + S3C2416_TICNT2);
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	} else {
		tmp |= val;
	}
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	writel(tmp, info->base + S3C2410_TICNT);
	spin_unlock_irq(&info->pie_lock);
	clk_disable(info->rtc_clk);
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	return 0;
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}

/* Time read/write */

static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
{
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	struct s3c_rtc *info = dev_get_drvdata(dev);
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	unsigned int have_retried = 0;

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	clk_enable(info->rtc_clk);
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 retry_get_time:
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	rtc_tm->tm_min  = readb(info->base + S3C2410_RTCMIN);
	rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
	rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
	rtc_tm->tm_mon  = readb(info->base + S3C2410_RTCMON);
	rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
	rtc_tm->tm_sec  = readb(info->base + S3C2410_RTCSEC);
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	/* the only way to work out whether the system was mid-update
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	 * when we read it is to check the second counter, and if it
	 * is zero, then we re-try the entire read
	 */

	if (rtc_tm->tm_sec == 0 && !have_retried) {
		have_retried = 1;
		goto retry_get_time;
	}

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	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
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	rtc_tm->tm_year += 100;
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	dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
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		 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
		 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);

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	rtc_tm->tm_mon -= 1;

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	clk_disable(info->rtc_clk);

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	return rtc_valid_tm(rtc_tm);
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}

static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
{
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	struct s3c_rtc *info = dev_get_drvdata(dev);
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	int year = tm->tm_year - 100;
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	dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
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		 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
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		 tm->tm_hour, tm->tm_min, tm->tm_sec);

	/* we get around y2k by simply not supporting it */
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	if (year < 0 || year >= 100) {
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		dev_err(dev, "rtc only supports 100 years\n");
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		return -EINVAL;
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	}

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	clk_enable(info->rtc_clk);

	writeb(bin2bcd(tm->tm_sec),  info->base + S3C2410_RTCSEC);
	writeb(bin2bcd(tm->tm_min),  info->base + S3C2410_RTCMIN);
	writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
	writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
	writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
	writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);

	clk_disable(info->rtc_clk);
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	return 0;
}

static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
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	struct s3c_rtc *info = dev_get_drvdata(dev);
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	struct rtc_time *alm_tm = &alrm->time;
	unsigned int alm_en;

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	clk_enable(info->rtc_clk);
	alm_tm->tm_sec  = readb(info->base + S3C2410_ALMSEC);
	alm_tm->tm_min  = readb(info->base + S3C2410_ALMMIN);
	alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
	alm_tm->tm_mon  = readb(info->base + S3C2410_ALMMON);
	alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
	alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
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266
	alm_en = readb(info->base + S3C2410_RTCALM);
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	alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;

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	dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
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		 alm_en,
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		 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
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		 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);


	/* decode the alarm enable field */

	if (alm_en & S3C2410_RTCALM_SECEN)
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		alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
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	else
281
		alm_tm->tm_sec = -1;
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	if (alm_en & S3C2410_RTCALM_MINEN)
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		alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
285
	else
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		alm_tm->tm_min = -1;
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	if (alm_en & S3C2410_RTCALM_HOUREN)
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		alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
290
	else
291
		alm_tm->tm_hour = -1;
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	if (alm_en & S3C2410_RTCALM_DAYEN)
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		alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
295
	else
296
		alm_tm->tm_mday = -1;
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	if (alm_en & S3C2410_RTCALM_MONEN) {
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		alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
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		alm_tm->tm_mon -= 1;
	} else {
302
		alm_tm->tm_mon = -1;
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	}

	if (alm_en & S3C2410_RTCALM_YEAREN)
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		alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
307
	else
308
		alm_tm->tm_year = -1;
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310
	clk_disable(info->rtc_clk);
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	return 0;
}

static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
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	struct s3c_rtc *info = dev_get_drvdata(dev);
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	struct rtc_time *tm = &alrm->time;
	unsigned int alrm_en;

320
	clk_enable(info->rtc_clk);
321
	dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
322
		 alrm->enabled,
323
		 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
324
		 tm->tm_hour, tm->tm_min, tm->tm_sec);
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326 327
	alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
	writeb(0x00, info->base + S3C2410_RTCALM);
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	if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
		alrm_en |= S3C2410_RTCALM_SECEN;
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		writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
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	}

	if (tm->tm_min < 60 && tm->tm_min >= 0) {
		alrm_en |= S3C2410_RTCALM_MINEN;
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		writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
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	}

	if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
		alrm_en |= S3C2410_RTCALM_HOUREN;
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		writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
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	}

344
	dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
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346
	writeb(alrm_en, info->base + S3C2410_RTCALM);
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348
	s3c_rtc_setaie(dev, alrm->enabled);
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350 351
	clk_disable(info->rtc_clk);

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	return 0;
}

static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
{
357
	struct s3c_rtc *info = dev_get_drvdata(dev);
358
	unsigned int ticnt;
359

360 361 362
	clk_enable(info->rtc_clk);
	if (info->cpu_type == TYPE_S3C64XX) {
		ticnt = readw(info->base + S3C2410_RTCCON);
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		ticnt &= S3C64XX_RTCCON_TICEN;
	} else {
365
		ticnt = readb(info->base + S3C2410_TICNT);
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		ticnt &= S3C2410_TICNT_ENABLE;
	}

	seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt  ? "yes" : "no");
370
	clk_disable(info->rtc_clk);
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	return 0;
}

374
static const struct rtc_class_ops s3c_rtcops = {
375 376 377 378
	.read_time	= s3c_rtc_gettime,
	.set_time	= s3c_rtc_settime,
	.read_alarm	= s3c_rtc_getalarm,
	.set_alarm	= s3c_rtc_setalarm,
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	.proc		= s3c_rtc_proc,
	.alarm_irq_enable = s3c_rtc_setaie,
381 382
};

383
static void s3c_rtc_enable(struct s3c_rtc *info, int en)
384
{
385
	unsigned int con, tmp;
386

387
	clk_enable(info->rtc_clk);
388 389

	con = readw(info->base + S3C2410_RTCCON);
390
	if (!en) {
391
		if (info->cpu_type == TYPE_S3C64XX)
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			con &= ~S3C64XX_RTCCON_TICEN;
		con &= ~S3C2410_RTCCON_RTCEN;
		writew(con, info->base + S3C2410_RTCCON);
395

396
		if (info->cpu_type != TYPE_S3C64XX) {
397 398 399
			con = readb(info->base + S3C2410_TICNT);
			con &= ~S3C2410_TICNT_ENABLE;
			writeb(con, info->base + S3C2410_TICNT);
400
		}
401 402
	} else {
		/* re-enable the device, and check it is ok */
403
		if ((con & S3C2410_RTCCON_RTCEN) == 0) {
404
			dev_info(info->dev, "rtc disabled, re-enabling\n");
405

406
			tmp = readw(info->base + S3C2410_RTCCON);
407
			writew(tmp | S3C2410_RTCCON_RTCEN,
408
				info->base + S3C2410_RTCCON);
409 410
		}

411
		if (con & S3C2410_RTCCON_CNTSEL) {
412
			dev_info(info->dev, "removing RTCCON_CNTSEL\n");
413

414
			tmp = readw(info->base + S3C2410_RTCCON);
415
			writew(tmp & ~S3C2410_RTCCON_CNTSEL,
416
				info->base + S3C2410_RTCCON);
417 418
		}

419
		if (con & S3C2410_RTCCON_CLKRST) {
420
			dev_info(info->dev, "removing RTCCON_CLKRST\n");
421

422
			tmp = readw(info->base + S3C2410_RTCCON);
423
			writew(tmp & ~S3C2410_RTCCON_CLKRST,
424
				info->base + S3C2410_RTCCON);
425 426
		}
	}
427
	clk_disable(info->rtc_clk);
428 429
}

430
static int s3c_rtc_remove(struct platform_device *pdev)
431
{
432 433 434
	struct s3c_rtc *info = platform_get_drvdata(pdev);

	s3c_rtc_setaie(info->dev, 0);
435

436 437
	clk_unprepare(info->rtc_clk);
	info->rtc_clk = NULL;
438

439 440 441
	return 0;
}

442 443 444 445 446
static const struct of_device_id s3c_rtc_dt_match[];

static inline int s3c_rtc_get_driver_data(struct platform_device *pdev)
{
#ifdef CONFIG_OF
447
	struct s3c_rtc_drv_data *data;
448

449 450
	if (pdev->dev.of_node) {
		const struct of_device_id *match;
451

452
		match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
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		data = (struct s3c_rtc_drv_data *) match->data;
		return data->cpu_type;
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	}
#endif
	return platform_get_device_id(pdev)->driver_data;
}

460
static int s3c_rtc_probe(struct platform_device *pdev)
461
{
462
	struct s3c_rtc *info = NULL;
463
	struct rtc_time rtc_tm;
464 465
	struct resource *res;
	int ret;
466
	int tmp;
467

468 469 470
	info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
	if (!info)
		return -ENOMEM;
471 472

	/* find the IRQs */
473 474
	info->irq_tick = platform_get_irq(pdev, 1);
	if (info->irq_tick < 0) {
475
		dev_err(&pdev->dev, "no irq for rtc tick\n");
476
		return info->irq_tick;
477 478
	}

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	info->dev = &pdev->dev;
	info->cpu_type = s3c_rtc_get_driver_data(pdev);
	spin_lock_init(&info->pie_lock);
	spin_lock_init(&info->alarm_clk_lock);

	platform_set_drvdata(pdev, info);

	info->irq_alarm = platform_get_irq(pdev, 0);
	if (info->irq_alarm < 0) {
488
		dev_err(&pdev->dev, "no irq for alarm\n");
489
		return info->irq_alarm;
490 491
	}

492
	dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
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		 info->irq_tick, info->irq_alarm);
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	/* get the memory region */
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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	info->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(info->base))
		return PTR_ERR(info->base);
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501 502
	info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
	if (IS_ERR(info->rtc_clk)) {
503
		dev_err(&pdev->dev, "failed to find rtc clock source\n");
504
		return PTR_ERR(info->rtc_clk);
505
	}
506
	clk_prepare_enable(info->rtc_clk);
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508
	/* check to see if everything is setup correctly */
509
	s3c_rtc_enable(info, 1);
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511
	dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
512
		 readw(info->base + S3C2410_RTCCON));
513

514 515
	device_init_wakeup(&pdev->dev, 1);

516
	/* register RTC and exit */
517
	info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
518
				  THIS_MODULE);
519
	if (IS_ERR(info->rtc)) {
520
		dev_err(&pdev->dev, "cannot attach rtc\n");
521
		ret = PTR_ERR(info->rtc);
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		goto err_nortc;
	}

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	ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
			  0,  "s3c2410-rtc alarm", info);
	if (ret) {
		dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
		goto err_nortc;
	}
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	ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
			  0,  "s3c2410-rtc tick", info);
	if (ret) {
		dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
		goto err_nortc;
	}
538

539 540
	/* Check RTC Time */
	s3c_rtc_gettime(&pdev->dev, &rtc_tm);
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	if (rtc_valid_tm(&rtc_tm)) {
		rtc_tm.tm_year	= 100;
		rtc_tm.tm_mon	= 0;
		rtc_tm.tm_mday	= 1;
		rtc_tm.tm_hour	= 0;
		rtc_tm.tm_min	= 0;
		rtc_tm.tm_sec	= 0;

550
		s3c_rtc_settime(&pdev->dev, &rtc_tm);
551 552

		dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
553 554
	}

555 556
	if (info->cpu_type != TYPE_S3C2410)
		info->rtc->max_user_freq = 32768;
557
	else
558
		info->rtc->max_user_freq = 128;
559

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	if (info->cpu_type == TYPE_S3C2416 || info->cpu_type == TYPE_S3C2443) {
		tmp = readw(info->base + S3C2410_RTCCON);
562
		tmp |= S3C2443_RTCCON_TICSEL;
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		writew(tmp, info->base + S3C2410_RTCCON);
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	}

566
	s3c_rtc_setfreq(info, 1);
567

568
	clk_disable(info->rtc_clk);
569

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	return 0;

 err_nortc:
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	s3c_rtc_enable(info, 0);
	clk_disable_unprepare(info->rtc_clk);
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	return ret;
}

579
#ifdef CONFIG_PM_SLEEP
580

581
static int s3c_rtc_suspend(struct device *dev)
582
{
583
	struct s3c_rtc *info = dev_get_drvdata(dev);
584

585
	clk_enable(info->rtc_clk);
586
	/* save TICNT for anyone using periodic interrupts */
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	if (info->cpu_type == TYPE_S3C64XX) {
		info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
		info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
		info->ticnt_save = readl(info->base + S3C2410_TICNT);
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	} else {
592
		info->ticnt_save = readb(info->base + S3C2410_TICNT);
593
	}
594
	s3c_rtc_enable(info, 0);
595

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	if (device_may_wakeup(dev) && !info->wake_en) {
		if (enable_irq_wake(info->irq_alarm) == 0)
			info->wake_en = true;
599
		else
600
			dev_err(dev, "enable_irq_wake failed\n");
601
	}
602
	clk_disable(info->rtc_clk);
603

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	return 0;
}

607
static int s3c_rtc_resume(struct device *dev)
608
{
609
	struct s3c_rtc *info = dev_get_drvdata(dev);
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	unsigned int tmp;

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	clk_enable(info->rtc_clk);
	s3c_rtc_enable(info, 1);
	if (info->cpu_type == TYPE_S3C64XX) {
		writel(info->ticnt_save, info->base + S3C2410_TICNT);
		if (info->ticnt_en_save) {
			tmp = readw(info->base + S3C2410_RTCCON);
			writew(tmp | info->ticnt_en_save,
					info->base + S3C2410_RTCCON);
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		}
	} else {
622
		writeb(info->ticnt_save, info->base + S3C2410_TICNT);
623
	}
624

625 626 627
	if (device_may_wakeup(dev) && info->wake_en) {
		disable_irq_wake(info->irq_alarm);
		info->wake_en = false;
628
	}
629
	clk_disable(info->rtc_clk);
630

631 632 633
	return 0;
}
#endif
634 635
static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);

636
#ifdef CONFIG_OF
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static struct s3c_rtc_drv_data s3c_rtc_drv_data_array[] = {
	[TYPE_S3C2410] = { TYPE_S3C2410 },
	[TYPE_S3C2416] = { TYPE_S3C2416 },
	[TYPE_S3C2443] = { TYPE_S3C2443 },
	[TYPE_S3C64XX] = { TYPE_S3C64XX },
};

644
static const struct of_device_id s3c_rtc_dt_match[] = {
645
	{
646
		.compatible = "samsung,s3c2410-rtc",
647
		.data = &s3c_rtc_drv_data_array[TYPE_S3C2410],
648
	}, {
649
		.compatible = "samsung,s3c2416-rtc",
650
		.data = &s3c_rtc_drv_data_array[TYPE_S3C2416],
651
	}, {
652
		.compatible = "samsung,s3c2443-rtc",
653
		.data = &s3c_rtc_drv_data_array[TYPE_S3C2443],
654
	}, {
655
		.compatible = "samsung,s3c6410-rtc",
656
		.data = &s3c_rtc_drv_data_array[TYPE_S3C64XX],
657
	},
658 659 660 661 662
	{},
};
MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
#endif

663 664 665 666
static struct platform_device_id s3c_rtc_driver_ids[] = {
	{
		.name		= "s3c2410-rtc",
		.driver_data	= TYPE_S3C2410,
667 668 669 670 671 672
	}, {
		.name		= "s3c2416-rtc",
		.driver_data	= TYPE_S3C2416,
	}, {
		.name		= "s3c2443-rtc",
		.driver_data	= TYPE_S3C2443,
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	}, {
		.name		= "s3c64xx-rtc",
		.driver_data	= TYPE_S3C64XX,
	},
	{ }
};

MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);

static struct platform_driver s3c_rtc_driver = {
683
	.probe		= s3c_rtc_probe,
684
	.remove		= s3c_rtc_remove,
685
	.id_table	= s3c_rtc_driver_ids,
686
	.driver		= {
687
		.name	= "s3c-rtc",
688
		.owner	= THIS_MODULE,
689
		.pm	= &s3c_rtc_pm_ops,
690
		.of_match_table	= of_match_ptr(s3c_rtc_dt_match),
691 692 693
	},
};

694
module_platform_driver(s3c_rtc_driver);
695 696 697 698

MODULE_DESCRIPTION("Samsung S3C RTC Driver");
MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
MODULE_LICENSE("GPL");
699
MODULE_ALIAS("platform:s3c2410-rtc");