ast_mode.c 36.1 KB
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/*
 * Copyright 2012 Red Hat Inc.
 * Parts based on xf86-video-ast
 * Copyright (c) 2005 ASPEED Technology Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 */
/*
 * Authors: Dave Airlie <airlied@redhat.com>
 */
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#include <linux/export.h>
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#include <linux/pci.h>

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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
#include <drm/drm_atomic_state_helper.h>
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#include <drm/drm_crtc.h>
#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include <drm/drm_gem_vram_helper.h>
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#include <drm/drm_plane_helper.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_simple_kms_helper.h>
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#include "ast_drv.h"
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#include "ast_tables.h"

static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);
static void ast_i2c_destroy(struct ast_i2c_chan *i2c);
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static inline void ast_load_palette_index(struct ast_private *ast,
				     u8 index, u8 red, u8 green,
				     u8 blue)
{
	ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index);
	ast_io_read8(ast, AST_IO_SEQ_PORT);
	ast_io_write8(ast, AST_IO_DAC_DATA, red);
	ast_io_read8(ast, AST_IO_SEQ_PORT);
	ast_io_write8(ast, AST_IO_DAC_DATA, green);
	ast_io_read8(ast, AST_IO_SEQ_PORT);
	ast_io_write8(ast, AST_IO_DAC_DATA, blue);
	ast_io_read8(ast, AST_IO_SEQ_PORT);
}

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static void ast_crtc_load_lut(struct ast_private *ast, struct drm_crtc *crtc)
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{
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	u16 *r, *g, *b;
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	int i;

	if (!crtc->enabled)
		return;

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	r = crtc->gamma_store;
	g = r + crtc->gamma_size;
	b = g + crtc->gamma_size;

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	for (i = 0; i < 256; i++)
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		ast_load_palette_index(ast, i, *r++ >> 8, *g++ >> 8, *b++ >> 8);
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}

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static bool ast_get_vbios_mode_info(const struct drm_format_info *format,
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				    const struct drm_display_mode *mode,
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				    struct drm_display_mode *adjusted_mode,
				    struct ast_vbios_mode_info *vbios_mode)
{
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	u32 refresh_rate_index = 0, refresh_rate;
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	const struct ast_vbios_enhtable *best = NULL;
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	u32 hborder, vborder;
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	bool check_sync;
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	switch (format->cpp[0] * 8) {
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	case 8:
		vbios_mode->std_table = &vbios_stdtable[VGAModeIndex];
		break;
	case 16:
		vbios_mode->std_table = &vbios_stdtable[HiCModeIndex];
		break;
	case 24:
	case 32:
		vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex];
		break;
	default:
		return false;
	}

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	switch (mode->crtc_hdisplay) {
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	case 640:
		vbios_mode->enh_table = &res_640x480[refresh_rate_index];
		break;
	case 800:
		vbios_mode->enh_table = &res_800x600[refresh_rate_index];
		break;
	case 1024:
		vbios_mode->enh_table = &res_1024x768[refresh_rate_index];
		break;
	case 1280:
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		if (mode->crtc_vdisplay == 800)
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			vbios_mode->enh_table = &res_1280x800[refresh_rate_index];
		else
			vbios_mode->enh_table = &res_1280x1024[refresh_rate_index];
		break;
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	case 1360:
		vbios_mode->enh_table = &res_1360x768[refresh_rate_index];
		break;
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	case 1440:
		vbios_mode->enh_table = &res_1440x900[refresh_rate_index];
		break;
	case 1600:
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		if (mode->crtc_vdisplay == 900)
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			vbios_mode->enh_table = &res_1600x900[refresh_rate_index];
		else
			vbios_mode->enh_table = &res_1600x1200[refresh_rate_index];
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		break;
	case 1680:
		vbios_mode->enh_table = &res_1680x1050[refresh_rate_index];
		break;
	case 1920:
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		if (mode->crtc_vdisplay == 1080)
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			vbios_mode->enh_table = &res_1920x1080[refresh_rate_index];
		else
			vbios_mode->enh_table = &res_1920x1200[refresh_rate_index];
		break;
	default:
		return false;
	}

	refresh_rate = drm_mode_vrefresh(mode);
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	check_sync = vbios_mode->enh_table->flags & WideScreenMode;
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	while (1) {
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		const struct ast_vbios_enhtable *loop = vbios_mode->enh_table;
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		while (loop->refresh_rate != 0xff) {
			if ((check_sync) &&
			    (((mode->flags & DRM_MODE_FLAG_NVSYNC)  &&
			      (loop->flags & PVSync))  ||
			     ((mode->flags & DRM_MODE_FLAG_PVSYNC)  &&
			      (loop->flags & NVSync))  ||
			     ((mode->flags & DRM_MODE_FLAG_NHSYNC)  &&
			      (loop->flags & PHSync))  ||
			     ((mode->flags & DRM_MODE_FLAG_PHSYNC)  &&
			      (loop->flags & NHSync)))) {
				loop++;
				continue;
			}
			if (loop->refresh_rate <= refresh_rate
			    && (!best || loop->refresh_rate > best->refresh_rate))
				best = loop;
			loop++;
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		}
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		if (best || !check_sync)
			break;
		check_sync = 0;
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	}

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	if (best)
		vbios_mode->enh_table = best;
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	hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0;
	vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0;

	adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht;
	adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder;
	adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder;
	adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder +
		vbios_mode->enh_table->hfp;
	adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder +
					 vbios_mode->enh_table->hfp +
					 vbios_mode->enh_table->hsync);

	adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt;
	adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder;
	adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder;
	adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder +
		vbios_mode->enh_table->vfp;
	adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder +
					 vbios_mode->enh_table->vfp +
					 vbios_mode->enh_table->vsync);

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	return true;
}
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static void ast_set_vbios_color_reg(struct ast_private *ast,
				    const struct drm_format_info *format,
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				    const struct ast_vbios_mode_info *vbios_mode)
{
	u32 color_index;

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	switch (format->cpp[0]) {
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	case 1:
		color_index = VGAModeIndex - 1;
		break;
	case 2:
		color_index = HiCModeIndex;
		break;
	case 3:
	case 4:
		color_index = TrueCModeIndex;
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		break;
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	default:
		return;
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	}

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	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0x0f) << 4));
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	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);
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	if (vbios_mode->enh_table->flags & NewModeInfo) {
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
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		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, format->cpp[0] * 8);
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	}
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}
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static void ast_set_vbios_mode_reg(struct ast_private *ast,
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				   const struct drm_display_mode *adjusted_mode,
				   const struct ast_vbios_mode_info *vbios_mode)
{
	u32 refresh_rate_index, mode_id;

	refresh_rate_index = vbios_mode->enh_table->refresh_rate_index;
	mode_id = vbios_mode->enh_table->mode_id;

	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff);
	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);

	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);

	if (vbios_mode->enh_table->flags & NewModeInfo) {
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000);
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay);
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8);
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay);
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8);
	}
}

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static void ast_set_std_reg(struct ast_private *ast,
			    struct drm_display_mode *mode,
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			    struct ast_vbios_mode_info *vbios_mode)
{
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	const struct ast_vbios_stdtable *stdtable;
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	u32 i;
	u8 jreg;

	stdtable = vbios_mode->std_table;

	jreg = stdtable->misc;
	ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);

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	/* Set SEQ; except Screen Disable field */
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	ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);
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	ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x01, 0xdf, stdtable->seq[0]);
	for (i = 1; i < 4; i++) {
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		jreg = stdtable->seq[i];
		ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg);
	}

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	/* Set CRTC; except base address and offset */
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	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
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	for (i = 0; i < 12; i++)
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
	for (i = 14; i < 19; i++)
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
	for (i = 20; i < 25; i++)
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		ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);

	/* set AR */
	jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
	for (i = 0; i < 20; i++) {
		jreg = stdtable->ar[i];
		ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i);
		ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg);
	}
	ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14);
	ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00);

	jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
	ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20);

	/* Set GR */
	for (i = 0; i < 9; i++)
		ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]);
}

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static void ast_set_crtc_reg(struct ast_private *ast,
			     struct drm_display_mode *mode,
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			     struct ast_vbios_mode_info *vbios_mode)
{
	u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0;
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	u16 temp, precache = 0;

	if ((ast->chip == AST2500) &&
	    (vbios_mode->enh_table->flags & AST2500PreCatchCRT))
		precache = 40;
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	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);

	temp = (mode->crtc_htotal >> 3) - 5;
	if (temp & 0x100)
		jregAC |= 0x01; /* HT D[8] */
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp);

	temp = (mode->crtc_hdisplay >> 3) - 1;
	if (temp & 0x100)
		jregAC |= 0x04; /* HDE D[8] */
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp);

	temp = (mode->crtc_hblank_start >> 3) - 1;
	if (temp & 0x100)
		jregAC |= 0x10; /* HBS D[8] */
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp);

	temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f;
	if (temp & 0x20)
		jreg05 |= 0x80;  /* HBE D[5] */
	if (temp & 0x40)
		jregAD |= 0x01;  /* HBE D[5] */
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f));

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	temp = ((mode->crtc_hsync_start-precache) >> 3) - 1;
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	if (temp & 0x100)
		jregAC |= 0x40; /* HRS D[5] */
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp);

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	temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f;
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	if (temp & 0x20)
		jregAD |= 0x04; /* HRE D[5] */
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05));

	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC);
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD);

	/* vert timings */
	temp = (mode->crtc_vtotal) - 2;
	if (temp & 0x100)
		jreg07 |= 0x01;
	if (temp & 0x200)
		jreg07 |= 0x20;
	if (temp & 0x400)
		jregAE |= 0x01;
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp);

	temp = (mode->crtc_vsync_start) - 1;
	if (temp & 0x100)
		jreg07 |= 0x04;
	if (temp & 0x200)
		jreg07 |= 0x80;
	if (temp & 0x400)
		jregAE |= 0x08;
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp);

	temp = (mode->crtc_vsync_end - 1) & 0x3f;
	if (temp & 0x10)
		jregAE |= 0x20;
	if (temp & 0x20)
		jregAE |= 0x40;
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf);

	temp = mode->crtc_vdisplay - 1;
	if (temp & 0x100)
		jreg07 |= 0x02;
	if (temp & 0x200)
		jreg07 |= 0x40;
	if (temp & 0x400)
		jregAE |= 0x02;
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp);

	temp = mode->crtc_vblank_start - 1;
	if (temp & 0x100)
		jreg07 |= 0x08;
	if (temp & 0x200)
		jreg09 |= 0x20;
	if (temp & 0x400)
		jregAE |= 0x04;
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp);

	temp = mode->crtc_vblank_end - 1;
	if (temp & 0x100)
		jregAE |= 0x10;
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp);

	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07);
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09);
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80));

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	if (precache)
		ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x80);
	else
		ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x00);

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	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80);
}

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static void ast_set_offset_reg(struct ast_private *ast,
			       struct drm_framebuffer *fb)
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{
	u16 offset;

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	offset = fb->pitches[0] >> 3;
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	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));
	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);
}

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static void ast_set_dclk_reg(struct ast_private *ast,
			     struct drm_display_mode *mode,
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			     struct ast_vbios_mode_info *vbios_mode)
{
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	const struct ast_vbios_dclk_info *clk_info;
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	if (ast->chip == AST2500)
		clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index];
	else
		clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
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	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1);
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2);
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f,
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			       (clk_info->param3 & 0xc0) |
			       ((clk_info->param3 & 0x3) << 4));
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}

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static void ast_set_color_reg(struct ast_private *ast,
			      const struct drm_format_info *format)
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{
	u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;

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	switch (format->cpp[0] * 8) {
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	case 8:
		jregA0 = 0x70;
		jregA3 = 0x01;
		jregA8 = 0x00;
		break;
	case 15:
	case 16:
		jregA0 = 0x70;
		jregA3 = 0x04;
		jregA8 = 0x02;
		break;
	case 32:
		jregA0 = 0x70;
		jregA3 = 0x08;
		jregA8 = 0x02;
		break;
	}

	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0);
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3);
	ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8);
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}

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static void ast_set_crtthd_reg(struct ast_private *ast)
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{
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	/* Set Threshold */
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	if (ast->chip == AST2300 || ast->chip == AST2400 ||
	    ast->chip == AST2500) {
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		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);
	} else if (ast->chip == AST2100 ||
		   ast->chip == AST1100 ||
		   ast->chip == AST2200 ||
		   ast->chip == AST2150) {
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);
	} else {
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);
		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);
	}
}

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static void ast_set_sync_reg(struct ast_private *ast,
			     struct drm_display_mode *mode,
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			     struct ast_vbios_mode_info *vbios_mode)
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{
	u8 jreg;

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	jreg  = ast_io_read8(ast, AST_IO_MISC_PORT_READ);
	jreg &= ~0xC0;
	if (vbios_mode->enh_table->flags & NVSync) jreg |= 0x80;
	if (vbios_mode->enh_table->flags & NHSync) jreg |= 0x40;
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	ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
}

505 506
static void ast_set_start_address_crt1(struct ast_private *ast,
				       unsigned offset)
507 508 509 510 511 512 513 514 515 516
{
	u32 addr;

	addr = offset >> 2;
	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff));
	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff));
	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff));

}

517 518 519 520 521 522 523 524 525 526
static void ast_wait_for_vretrace(struct ast_private *ast)
{
	unsigned long timeout = jiffies + HZ;
	u8 vgair1;

	do {
		vgair1 = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
	} while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout));
}

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/*
 * Primary plane
 */

static const uint32_t ast_primary_plane_formats[] = {
	DRM_FORMAT_XRGB8888,
	DRM_FORMAT_RGB565,
	DRM_FORMAT_C8,
};

537 538
static int ast_primary_plane_helper_atomic_check(struct drm_plane *plane,
						 struct drm_plane_state *state)
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{
540
	struct drm_crtc_state *crtc_state;
541
	struct ast_crtc_state *ast_crtc_state;
542 543 544 545 546 547 548 549 550 551 552 553 554 555
	int ret;

	if (!state->crtc)
		return 0;

	crtc_state = drm_atomic_get_new_crtc_state(state->state, state->crtc);

	ret = drm_atomic_helper_check_plane_state(state, crtc_state,
						  DRM_PLANE_HELPER_NO_SCALING,
						  DRM_PLANE_HELPER_NO_SCALING,
						  false, true);
	if (ret)
		return ret;

556 557 558 559 560 561 562
	if (!state->visible)
		return 0;

	ast_crtc_state = to_ast_crtc_state(crtc_state);

	ast_crtc_state->format = state->fb->format;

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	return 0;
}

566 567 568
static void
ast_primary_plane_helper_atomic_update(struct drm_plane *plane,
				       struct drm_plane_state *old_state)
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{
570 571
	struct drm_device *dev = plane->dev;
	struct ast_private *ast = to_ast_private(dev);
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	struct drm_plane_state *state = plane->state;
	struct drm_gem_vram_object *gbo;
	s64 gpu_addr;
575 576 577 578 579 580 581 582 583 584 585
	struct drm_framebuffer *fb = state->fb;
	struct drm_framebuffer *old_fb = old_state->fb;

	if (!old_fb || (fb->format != old_fb->format)) {
		struct drm_crtc_state *crtc_state = state->crtc->state;
		struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
		struct ast_vbios_mode_info *vbios_mode_info = &ast_crtc_state->vbios_mode_info;

		ast_set_color_reg(ast, fb->format);
		ast_set_vbios_color_reg(ast, fb->format, vbios_mode_info);
	}
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587
	gbo = drm_gem_vram_of_gem(fb->obj[0]);
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	gpu_addr = drm_gem_vram_offset(gbo);
589
	if (drm_WARN_ON_ONCE(dev, gpu_addr < 0))
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		return; /* Bug: we didn't pin the BO to VRAM in prepare_fb. */

592
	ast_set_offset_reg(ast, fb);
593
	ast_set_start_address_crt1(ast, (u32)gpu_addr);
594 595 596 597 598 599 600 601

	ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x00);
}

static void
ast_primary_plane_helper_atomic_disable(struct drm_plane *plane,
					struct drm_plane_state *old_state)
{
602
	struct ast_private *ast = to_ast_private(plane->dev);
603 604

	ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20);
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}

static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = {
	.prepare_fb = drm_gem_vram_plane_helper_prepare_fb,
	.cleanup_fb = drm_gem_vram_plane_helper_cleanup_fb,
	.atomic_check = ast_primary_plane_helper_atomic_check,
	.atomic_update = ast_primary_plane_helper_atomic_update,
612
	.atomic_disable = ast_primary_plane_helper_atomic_disable,
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};

static const struct drm_plane_funcs ast_primary_plane_funcs = {
	.update_plane = drm_atomic_helper_update_plane,
	.disable_plane = drm_atomic_helper_disable_plane,
	.destroy = drm_plane_cleanup,
	.reset = drm_atomic_helper_plane_reset,
	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
	.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
};

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/*
 * Cursor plane
 */

static const uint32_t ast_cursor_plane_formats[] = {
	DRM_FORMAT_ARGB8888,
};

static int
ast_cursor_plane_helper_prepare_fb(struct drm_plane *plane,
				   struct drm_plane_state *new_state)
{
	struct drm_framebuffer *fb = new_state->fb;
	struct drm_crtc *crtc = new_state->crtc;
	struct ast_private *ast;
	int ret;

	if (!crtc || !fb)
		return 0;

644
	ast = to_ast_private(plane->dev);
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646
	ret = ast_cursor_blit(ast, fb);
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	if (ret)
648
		return ret;
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	return 0;
}

static int ast_cursor_plane_helper_atomic_check(struct drm_plane *plane,
						struct drm_plane_state *state)
{
656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677
	struct drm_framebuffer *fb = state->fb;
	struct drm_crtc_state *crtc_state;
	int ret;

	if (!state->crtc)
		return 0;

	crtc_state = drm_atomic_get_new_crtc_state(state->state, state->crtc);

	ret = drm_atomic_helper_check_plane_state(state, crtc_state,
						  DRM_PLANE_HELPER_NO_SCALING,
						  DRM_PLANE_HELPER_NO_SCALING,
						  true, true);
	if (ret)
		return ret;

	if (!state->visible)
		return 0;

	if (fb->width > AST_MAX_HWC_WIDTH || fb->height > AST_MAX_HWC_HEIGHT)
		return -EINVAL;

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	return 0;
}

static void
ast_cursor_plane_helper_atomic_update(struct drm_plane *plane,
				      struct drm_plane_state *old_state)
{
	struct drm_plane_state *state = plane->state;
	struct drm_framebuffer *fb = state->fb;
687
	struct ast_private *ast = to_ast_private(plane->dev);
688
	unsigned int offset_x, offset_y;
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690 691
	offset_x = AST_MAX_HWC_WIDTH - fb->width;
	offset_y = AST_MAX_HWC_WIDTH - fb->height;
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	if (state->fb != old_state->fb) {
		/* A new cursor image was installed. */
695
		ast_cursor_page_flip(ast);
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	}

698 699
	ast_cursor_show(ast, state->crtc_x, state->crtc_y,
			offset_x, offset_y);
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}

static void
ast_cursor_plane_helper_atomic_disable(struct drm_plane *plane,
				       struct drm_plane_state *old_state)
{
706
	struct ast_private *ast = to_ast_private(plane->dev);
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708
	ast_cursor_hide(ast);
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}

static const struct drm_plane_helper_funcs ast_cursor_plane_helper_funcs = {
	.prepare_fb = ast_cursor_plane_helper_prepare_fb,
	.cleanup_fb = NULL, /* not required for cursor plane */
	.atomic_check = ast_cursor_plane_helper_atomic_check,
	.atomic_update = ast_cursor_plane_helper_atomic_update,
	.atomic_disable = ast_cursor_plane_helper_atomic_disable,
};

static const struct drm_plane_funcs ast_cursor_plane_funcs = {
	.update_plane = drm_atomic_helper_update_plane,
	.disable_plane = drm_atomic_helper_disable_plane,
	.destroy = drm_plane_cleanup,
	.reset = drm_atomic_helper_plane_reset,
	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
	.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
};

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/*
 * CRTC
 */

732 733
static void ast_crtc_dpms(struct drm_crtc *crtc, int mode)
{
734
	struct ast_private *ast = to_ast_private(crtc->dev);
735

736 737 738
	/* TODO: Maybe control display signal generation with
	 *       Sync Enable (bit CR17.7).
	 */
739 740 741 742
	switch (mode) {
	case DRM_MODE_DPMS_ON:
	case DRM_MODE_DPMS_STANDBY:
	case DRM_MODE_DPMS_SUSPEND:
743 744
		if (ast->tx_chip_type == AST_TX_DP501)
			ast_set_dp501_video_output(crtc->dev, 1);
745 746
		break;
	case DRM_MODE_DPMS_OFF:
747 748
		if (ast->tx_chip_type == AST_TX_DP501)
			ast_set_dp501_video_output(crtc->dev, 0);
749 750 751 752
		break;
	}
}

753
static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc,
754
					struct drm_atomic_state *state)
755
{
756 757
	struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
									  crtc);
758
	struct drm_device *dev = crtc->dev;
759
	struct ast_crtc_state *ast_state;
760
	const struct drm_format_info *format;
761 762
	bool succ;

763
	if (!crtc_state->enable)
764 765
		return 0; /* no mode checks if CRTC is being disabled */

766
	ast_state = to_ast_crtc_state(crtc_state);
767

768
	format = ast_state->format;
769 770
	if (drm_WARN_ON_ONCE(dev, !format))
		return -EINVAL; /* BUG: We didn't set format in primary check(). */
771

772 773
	succ = ast_get_vbios_mode_info(format, &crtc_state->mode,
				       &crtc_state->adjusted_mode,
774 775 776
				       &ast_state->vbios_mode_info);
	if (!succ)
		return -EINVAL;
777 778 779 780

	return 0;
}

781
static void
782 783
ast_crtc_helper_atomic_flush(struct drm_crtc *crtc,
			     struct drm_atomic_state *state)
784
{
785 786
	struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
									  crtc);
787 788
	struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,
									      crtc);
789
	struct ast_private *ast = to_ast_private(crtc->dev);
790
	struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
791 792 793 794 795 796 797 798 799 800
	struct ast_crtc_state *old_ast_crtc_state = to_ast_crtc_state(old_crtc_state);

	/*
	 * The gamma LUT has to be reloaded after changing the primary
	 * plane's color format.
	 */
	if (old_ast_crtc_state->format != ast_crtc_state->format)
		ast_crtc_load_lut(ast, crtc);
}

801 802
static void
ast_crtc_helper_atomic_enable(struct drm_crtc *crtc,
803
			      struct drm_atomic_state *state)
804
{
805
	struct drm_device *dev = crtc->dev;
806
	struct ast_private *ast = to_ast_private(dev);
807 808 809 810 811
	struct drm_crtc_state *crtc_state = crtc->state;
	struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
	struct ast_vbios_mode_info *vbios_mode_info =
		&ast_crtc_state->vbios_mode_info;
	struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
812

813
	ast_set_vbios_mode_reg(ast, adjusted_mode, vbios_mode_info);
814
	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x06);
815 816 817
	ast_set_std_reg(ast, adjusted_mode, vbios_mode_info);
	ast_set_crtc_reg(ast, adjusted_mode, vbios_mode_info);
	ast_set_dclk_reg(ast, adjusted_mode, vbios_mode_info);
818
	ast_set_crtthd_reg(ast);
819
	ast_set_sync_reg(ast, adjusted_mode, vbios_mode_info);
820 821 822 823 824 825

	ast_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
}

static void
ast_crtc_helper_atomic_disable(struct drm_crtc *crtc,
826
			       struct drm_atomic_state *state)
827
{
828 829
	struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,
									      crtc);
830 831 832
	struct drm_device *dev = crtc->dev;
	struct ast_private *ast = to_ast_private(dev);

833
	ast_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851

	/*
	 * HW cursors require the underlying primary plane and CRTC to
	 * display a valid mode and image. This is not the case during
	 * full modeset operations. So we temporarily disable any active
	 * plane, including the HW cursor. Each plane's atomic_update()
	 * helper will re-enable it if necessary.
	 *
	 * We only do this during *full* modesets. It does not affect
	 * simple pageflips on the planes.
	 */
	drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);

	/*
	 * Ensure that no scanout takes place before reprogramming mode
	 * and format registers.
	 */
	ast_wait_for_vretrace(ast);
852
}
853 854

static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {
855
	.atomic_check = ast_crtc_helper_atomic_check,
856
	.atomic_flush = ast_crtc_helper_atomic_flush,
857 858
	.atomic_enable = ast_crtc_helper_atomic_enable,
	.atomic_disable = ast_crtc_helper_atomic_disable,
859 860
};

861 862 863 864 865 866 867 868 869 870 871
static void ast_crtc_reset(struct drm_crtc *crtc)
{
	struct ast_crtc_state *ast_state =
		kzalloc(sizeof(*ast_state), GFP_KERNEL);

	if (crtc->state)
		crtc->funcs->atomic_destroy_state(crtc, crtc->state);

	__drm_atomic_helper_crtc_reset(crtc, &ast_state->base);
}

872 873 874
static struct drm_crtc_state *
ast_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
{
875
	struct ast_crtc_state *new_ast_state, *ast_state;
876
	struct drm_device *dev = crtc->dev;
877

878
	if (drm_WARN_ON(dev, !crtc->state))
879 880 881 882 883 884 885
		return NULL;

	new_ast_state = kmalloc(sizeof(*new_ast_state), GFP_KERNEL);
	if (!new_ast_state)
		return NULL;
	__drm_atomic_helper_crtc_duplicate_state(crtc, &new_ast_state->base);

886 887
	ast_state = to_ast_crtc_state(crtc->state);

888
	new_ast_state->format = ast_state->format;
889 890 891
	memcpy(&new_ast_state->vbios_mode_info, &ast_state->vbios_mode_info,
	       sizeof(new_ast_state->vbios_mode_info));

892 893 894 895 896 897 898 899 900 901 902 903
	return &new_ast_state->base;
}

static void ast_crtc_atomic_destroy_state(struct drm_crtc *crtc,
					  struct drm_crtc_state *state)
{
	struct ast_crtc_state *ast_state = to_ast_crtc_state(state);

	__drm_atomic_helper_crtc_destroy_state(&ast_state->base);
	kfree(ast_state);
}

904
static const struct drm_crtc_funcs ast_crtc_funcs = {
905
	.reset = ast_crtc_reset,
906
	.destroy = drm_crtc_cleanup,
907 908
	.set_config = drm_atomic_helper_set_config,
	.page_flip = drm_atomic_helper_page_flip,
909 910
	.atomic_duplicate_state = ast_crtc_atomic_duplicate_state,
	.atomic_destroy_state = ast_crtc_atomic_destroy_state,
911 912
};

913
static int ast_crtc_init(struct drm_device *dev)
914
{
915
	struct ast_private *ast = to_ast_private(dev);
916
	struct drm_crtc *crtc = &ast->crtc;
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	int ret;
918

919
	ret = drm_crtc_init_with_planes(dev, crtc, &ast->primary_plane,
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					&ast->cursor_plane, &ast_crtc_funcs,
					NULL);
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	if (ret)
923
		return ret;
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925 926 927
	drm_mode_crtc_set_gamma_size(crtc, 256);
	drm_crtc_helper_add(crtc, &ast_crtc_helper_funcs);

928 929 930
	return 0;
}

931 932 933 934
/*
 * Encoder
 */

935
static int ast_encoder_init(struct drm_device *dev)
936
{
937
	struct ast_private *ast = to_ast_private(dev);
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938 939
	struct drm_encoder *encoder = &ast->encoder;
	int ret;
940

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941 942 943
	ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC);
	if (ret)
		return ret;
944

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	encoder->possible_crtcs = 1;
946 947 948 949

	return 0;
}

950 951 952 953
/*
 * Connector
 */

954 955 956
static int ast_get_modes(struct drm_connector *connector)
{
	struct ast_connector *ast_connector = to_ast_connector(connector);
957
	struct ast_private *ast = to_ast_private(connector->dev);
958 959
	struct edid *edid;
	int ret;
960 961 962 963 964 965 966 967 968 969 970 971 972 973 974
	bool flags = false;
	if (ast->tx_chip_type == AST_TX_DP501) {
		ast->dp501_maxclk = 0xff;
		edid = kmalloc(128, GFP_KERNEL);
		if (!edid)
			return -ENOMEM;

		flags = ast_dp501_read_edid(connector->dev, (u8 *)edid);
		if (flags)
			ast->dp501_maxclk = ast_get_dp501_max_clk(connector->dev);
		else
			kfree(edid);
	}
	if (!flags)
		edid = drm_get_edid(connector, &ast_connector->i2c->adapter);
975
	if (edid) {
976
		drm_connector_update_edid_property(&ast_connector->base, edid);
977
		ret = drm_add_edid_modes(connector, edid);
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		kfree(edid);
979 980
		return ret;
	} else
981
		drm_connector_update_edid_property(&ast_connector->base, NULL);
982 983 984
	return 0;
}

985
static enum drm_mode_status ast_mode_valid(struct drm_connector *connector,
986 987
			  struct drm_display_mode *mode)
{
988
	struct ast_private *ast = to_ast_private(connector->dev);
989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003
	int flags = MODE_NOMODE;
	uint32_t jtemp;

	if (ast->support_wide_screen) {
		if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050))
			return MODE_OK;
		if ((mode->hdisplay == 1280) && (mode->vdisplay == 800))
			return MODE_OK;
		if ((mode->hdisplay == 1440) && (mode->vdisplay == 900))
			return MODE_OK;
		if ((mode->hdisplay == 1360) && (mode->vdisplay == 768))
			return MODE_OK;
		if ((mode->hdisplay == 1600) && (mode->vdisplay == 900))
			return MODE_OK;

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		if ((ast->chip == AST2100) || (ast->chip == AST2200) ||
		    (ast->chip == AST2300) || (ast->chip == AST2400) ||
1006
		    (ast->chip == AST2500)) {
1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039
			if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080))
				return MODE_OK;

			if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) {
				jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
				if (jtemp & 0x01)
					return MODE_NOMODE;
				else
					return MODE_OK;
			}
		}
	}
	switch (mode->hdisplay) {
	case 640:
		if (mode->vdisplay == 480) flags = MODE_OK;
		break;
	case 800:
		if (mode->vdisplay == 600) flags = MODE_OK;
		break;
	case 1024:
		if (mode->vdisplay == 768) flags = MODE_OK;
		break;
	case 1280:
		if (mode->vdisplay == 1024) flags = MODE_OK;
		break;
	case 1600:
		if (mode->vdisplay == 1200) flags = MODE_OK;
		break;
	default:
		return flags;
	}

	return flags;
1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050
}

static void ast_connector_destroy(struct drm_connector *connector)
{
	struct ast_connector *ast_connector = to_ast_connector(connector);
	ast_i2c_destroy(ast_connector->i2c);
	drm_connector_cleanup(connector);
}

static const struct drm_connector_helper_funcs ast_connector_helper_funcs = {
	.get_modes = ast_get_modes,
1051
	.mode_valid = ast_mode_valid,
1052 1053 1054
};

static const struct drm_connector_funcs ast_connector_funcs = {
1055
	.reset = drm_atomic_helper_connector_reset,
1056 1057
	.fill_modes = drm_helper_probe_single_connector_modes,
	.destroy = ast_connector_destroy,
1058 1059
	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
1060 1061
};

1062
static int ast_connector_init(struct drm_device *dev)
1063
{
1064 1065 1066 1067
	struct ast_private *ast = to_ast_private(dev);
	struct ast_connector *ast_connector = &ast->connector;
	struct drm_connector *connector = &ast_connector->base;
	struct drm_encoder *encoder = &ast->encoder;
1068

1069 1070
	ast_connector->i2c = ast_i2c_create(dev);
	if (!ast_connector->i2c)
1071
		drm_err(dev, "failed to add ddc bus for connector\n");
1072 1073 1074 1075 1076

	drm_connector_init_with_ddc(dev, connector,
				    &ast_connector_funcs,
				    DRM_MODE_CONNECTOR_VGA,
				    &ast_connector->i2c->adapter);
1077 1078 1079 1080 1081 1082 1083 1084

	drm_connector_helper_add(connector, &ast_connector_helper_funcs);

	connector->interlace_allowed = 0;
	connector->doublescan_allowed = 0;

	connector->polled = DRM_CONNECTOR_POLL_CONNECT;

1085
	drm_connector_attach_encoder(connector, encoder);
1086 1087 1088 1089

	return 0;
}

1090 1091 1092 1093
/*
 * Mode config
 */

1094 1095 1096 1097 1098
static const struct drm_mode_config_helper_funcs
ast_mode_config_helper_funcs = {
	.atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
};

1099 1100 1101 1102 1103 1104 1105 1106
static const struct drm_mode_config_funcs ast_mode_config_funcs = {
	.fb_create = drm_gem_fb_create,
	.mode_valid = drm_vram_helper_mode_valid,
	.atomic_check = drm_atomic_helper_check,
	.atomic_commit = drm_atomic_helper_commit,
};

int ast_mode_config_init(struct ast_private *ast)
1107
{
1108
	struct drm_device *dev = &ast->base;
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	int ret;

1111 1112 1113 1114
	ret = ast_cursor_init(ast);
	if (ret)
		return ret;

1115 1116 1117 1118 1119 1120 1121 1122 1123
	ret = drmm_mode_config_init(dev);
	if (ret)
		return ret;

	dev->mode_config.funcs = &ast_mode_config_funcs;
	dev->mode_config.min_width = 0;
	dev->mode_config.min_height = 0;
	dev->mode_config.preferred_depth = 24;
	dev->mode_config.prefer_shadow = 1;
1124
	dev->mode_config.fb_base = pci_resource_start(dev->pdev, 0);
1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137

	if (ast->chip == AST2100 ||
	    ast->chip == AST2200 ||
	    ast->chip == AST2300 ||
	    ast->chip == AST2400 ||
	    ast->chip == AST2500) {
		dev->mode_config.max_width = 1920;
		dev->mode_config.max_height = 2048;
	} else {
		dev->mode_config.max_width = 1600;
		dev->mode_config.max_height = 1200;
	}

1138 1139
	dev->mode_config.helper_private = &ast_mode_config_helper_funcs;

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	memset(&ast->primary_plane, 0, sizeof(ast->primary_plane));
	ret = drm_universal_plane_init(dev, &ast->primary_plane, 0x01,
				       &ast_primary_plane_funcs,
				       ast_primary_plane_formats,
				       ARRAY_SIZE(ast_primary_plane_formats),
				       NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
	if (ret) {
1147
		drm_err(dev, "ast: drm_universal_plane_init() failed: %d\n", ret);
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		return ret;
	}
	drm_plane_helper_add(&ast->primary_plane,
			     &ast_primary_plane_helper_funcs);

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1153 1154 1155 1156 1157 1158
	ret = drm_universal_plane_init(dev, &ast->cursor_plane, 0x01,
				       &ast_cursor_plane_funcs,
				       ast_cursor_plane_formats,
				       ARRAY_SIZE(ast_cursor_plane_formats),
				       NULL, DRM_PLANE_TYPE_CURSOR, NULL);
	if (ret) {
1159
		drm_err(dev, "drm_universal_plane_failed(): %d\n", ret);
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1160 1161 1162 1163 1164
		return ret;
	}
	drm_plane_helper_add(&ast->cursor_plane,
			     &ast_cursor_plane_helper_funcs);

1165 1166 1167
	ast_crtc_init(dev);
	ast_encoder_init(dev);
	ast_connector_init(dev);
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1168

1169 1170
	drm_mode_config_reset(dev);

1171 1172 1173 1174 1175 1176
	return 0;
}

static int get_clock(void *i2c_priv)
{
	struct ast_i2c_chan *i2c = i2c_priv;
1177
	struct ast_private *ast = to_ast_private(i2c->dev);
1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191
	uint32_t val, val2, count, pass;

	count = 0;
	pass = 0;
	val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
	do {
		val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
		if (val == val2) {
			pass++;
		} else {
			pass = 0;
			val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
		}
	} while ((pass < 5) && (count++ < 0x10000));
1192 1193 1194 1195 1196 1197 1198

	return val & 1 ? 1 : 0;
}

static int get_data(void *i2c_priv)
{
	struct ast_i2c_chan *i2c = i2c_priv;
1199
	struct ast_private *ast = to_ast_private(i2c->dev);
1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213
	uint32_t val, val2, count, pass;

	count = 0;
	pass = 0;
	val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
	do {
		val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
		if (val == val2) {
			pass++;
		} else {
			pass = 0;
			val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
		}
	} while ((pass < 5) && (count++ < 0x10000));
1214 1215 1216 1217 1218 1219 1220

	return val & 1 ? 1 : 0;
}

static void set_clock(void *i2c_priv, int clock)
{
	struct ast_i2c_chan *i2c = i2c_priv;
1221
	struct ast_private *ast = to_ast_private(i2c->dev);
1222 1223 1224 1225 1226
	int i;
	u8 ujcrb7, jtemp;

	for (i = 0; i < 0x10000; i++) {
		ujcrb7 = ((clock & 0x01) ? 0 : 1);
1227
		ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf4, ujcrb7);
1228 1229 1230 1231 1232 1233 1234 1235 1236
		jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01);
		if (ujcrb7 == jtemp)
			break;
	}
}

static void set_data(void *i2c_priv, int data)
{
	struct ast_i2c_chan *i2c = i2c_priv;
1237
	struct ast_private *ast = to_ast_private(i2c->dev);
1238 1239 1240 1241 1242
	int i;
	u8 ujcrb7, jtemp;

	for (i = 0; i < 0x10000; i++) {
		ujcrb7 = ((data & 0x01) ? 0 : 1) << 2;
1243
		ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf1, ujcrb7);
1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276
		jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04);
		if (ujcrb7 == jtemp)
			break;
	}
}

static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev)
{
	struct ast_i2c_chan *i2c;
	int ret;

	i2c = kzalloc(sizeof(struct ast_i2c_chan), GFP_KERNEL);
	if (!i2c)
		return NULL;

	i2c->adapter.owner = THIS_MODULE;
	i2c->adapter.class = I2C_CLASS_DDC;
	i2c->adapter.dev.parent = &dev->pdev->dev;
	i2c->dev = dev;
	i2c_set_adapdata(&i2c->adapter, i2c);
	snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
		 "AST i2c bit bus");
	i2c->adapter.algo_data = &i2c->bit;

	i2c->bit.udelay = 20;
	i2c->bit.timeout = 2;
	i2c->bit.data = i2c;
	i2c->bit.setsda = set_data;
	i2c->bit.setscl = set_clock;
	i2c->bit.getsda = get_data;
	i2c->bit.getscl = get_clock;
	ret = i2c_bit_add_bus(&i2c->adapter);
	if (ret) {
1277
		drm_err(dev, "Failed to register bit i2c\n");
1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293
		goto out_free;
	}

	return i2c;
out_free:
	kfree(i2c);
	return NULL;
}

static void ast_i2c_destroy(struct ast_i2c_chan *i2c)
{
	if (!i2c)
		return;
	i2c_del_adapter(&i2c->adapter);
	kfree(i2c);
}