k3-j721e-main.dtsi

// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for J721E SoC Family Main Domain peripherals
 *
 * Copyright (C) 2016-2019 Texas Instruments Incorporated - http://www.ti.com/
 */

&cbass_main {
	msmc_ram: sram@70000000 {
		compatible = "mmio-sram";
		reg = <0x0 0x70000000 0x0 0x800000>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x70000000 0x800000>;

		atf-sram@0 {
			reg = <0x0 0x20000>;
		};
	};

	gic500: interrupt-controller@1800000 {
		compatible = "arm,gic-v3";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x00 0x01800000 0x00 0x10000>,	/* GICD */
		      <0x00 0x01900000 0x00 0x100000>;	/* GICR */

		/* vcpumntirq: virtual CPU interface maintenance interrupt */
		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;

		gic_its: gic-its@18200000 {
			compatible = "arm,gic-v3-its";
			reg = <0x00 0x01820000 0x00 0x10000>;
			socionext,synquacer-pre-its = <0x1000000 0x400000>;
			msi-controller;
			#msi-cells = <1>;
		};
	};

	smmu0: smmu@36600000 {
		compatible = "arm,smmu-v3";
		reg = <0x0 0x36600000 0x0 0x100000>;
		interrupt-parent = <&gic500>;
		interrupts = <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
			     <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>;
		interrupt-names = "eventq", "gerror";
		#iommu-cells = <1>;
	};

	main_gpio_intr: interrupt-controller0 {
		compatible = "ti,sci-intr";
		ti,intr-trigger-type = <1>;
		interrupt-controller;
		interrupt-parent = <&gic500>;
		#interrupt-cells = <2>;
		ti,sci = <&dmsc>;
		ti,sci-dst-id = <14>;
		ti,sci-rm-range-girq = <0x1>;
	};

	cbass_main_navss: interconnect0 {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		main_navss_intr: interrupt-controller1 {
			compatible = "ti,sci-intr";
			ti,intr-trigger-type = <4>;
			interrupt-controller;
			interrupt-parent = <&gic500>;
			#interrupt-cells = <2>;
			ti,sci = <&dmsc>;
			ti,sci-dst-id = <14>;
			ti,sci-rm-range-girq = <0>, <2>;
		};

		main_udmass_inta: interrupt-controller@33d00000 {
			compatible = "ti,sci-inta";
			reg = <0x0 0x33d00000 0x0 0x100000>;
			interrupt-controller;
			interrupt-parent = <&main_navss_intr>;
			msi-controller;
			ti,sci = <&dmsc>;
			ti,sci-dev-id = <209>;
			ti,sci-rm-range-vint = <0xa>;
			ti,sci-rm-range-global-event = <0xd>;
		};
	};

	secure_proxy_main: mailbox@32c00000 {
		compatible = "ti,am654-secure-proxy";
		#mbox-cells = <1>;
		reg-names = "target_data", "rt", "scfg";
		reg = <0x00 0x32c00000 0x00 0x100000>,
		      <0x00 0x32400000 0x00 0x100000>,
		      <0x00 0x32800000 0x00 0x100000>;
		interrupt-names = "rx_011";
		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
	};

	main_pmx0: pinmux@11c000 {
		compatible = "pinctrl-single";
		/* Proxy 0 addressing */
		reg = <0x0 0x11c000 0x0 0x2b4>;
		#pinctrl-cells = <1>;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0xffffffff>;
	};

	main_uart0: serial@2800000 {
		compatible = "ti,j721e-uart", "ti,am654-uart";
		reg = <0x00 0x02800000 0x00 0x100>;
		reg-shift = <2>;
		reg-io-width = <4>;
		interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <48000000>;
		current-speed = <115200>;
		power-domains = <&k3_pds 146>;
		clocks = <&k3_clks 146 0>;
		clock-names = "fclk";
	};

	main_uart1: serial@2810000 {
		compatible = "ti,j721e-uart", "ti,am654-uart";
		reg = <0x00 0x02810000 0x00 0x100>;
		reg-shift = <2>;
		reg-io-width = <4>;
		interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <48000000>;
		current-speed = <115200>;
		power-domains = <&k3_pds 278>;
		clocks = <&k3_clks 278 0>;
		clock-names = "fclk";
	};

	main_uart2: serial@2820000 {
		compatible = "ti,j721e-uart", "ti,am654-uart";
		reg = <0x00 0x02820000 0x00 0x100>;
		reg-shift = <2>;
		reg-io-width = <4>;
		interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <48000000>;
		current-speed = <115200>;
		power-domains = <&k3_pds 279>;
		clocks = <&k3_clks 279 0>;
		clock-names = "fclk";
	};

	main_uart3: serial@2830000 {
		compatible = "ti,j721e-uart", "ti,am654-uart";
		reg = <0x00 0x02830000 0x00 0x100>;
		reg-shift = <2>;
		reg-io-width = <4>;
		interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <48000000>;
		current-speed = <115200>;
		power-domains = <&k3_pds 280>;
		clocks = <&k3_clks 280 0>;
		clock-names = "fclk";
	};

	main_uart4: serial@2840000 {
		compatible = "ti,j721e-uart", "ti,am654-uart";
		reg = <0x00 0x02840000 0x00 0x100>;
		reg-shift = <2>;
		reg-io-width = <4>;
		interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <48000000>;
		current-speed = <115200>;
		power-domains = <&k3_pds 281>;
		clocks = <&k3_clks 281 0>;
		clock-names = "fclk";
	};

	main_uart5: serial@2850000 {
		compatible = "ti,j721e-uart", "ti,am654-uart";
		reg = <0x00 0x02850000 0x00 0x100>;
		reg-shift = <2>;
		reg-io-width = <4>;
		interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <48000000>;
		current-speed = <115200>;
		power-domains = <&k3_pds 282>;
		clocks = <&k3_clks 282 0>;
		clock-names = "fclk";
	};

	main_uart6: serial@2860000 {
		compatible = "ti,j721e-uart", "ti,am654-uart";
		reg = <0x00 0x02860000 0x00 0x100>;
		reg-shift = <2>;
		reg-io-width = <4>;
		interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <48000000>;
		current-speed = <115200>;
		power-domains = <&k3_pds 283>;
		clocks = <&k3_clks 283 0>;
		clock-names = "fclk";
	};

	main_uart7: serial@2870000 {
		compatible = "ti,j721e-uart", "ti,am654-uart";
		reg = <0x00 0x02870000 0x00 0x100>;
		reg-shift = <2>;
		reg-io-width = <4>;
		interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <48000000>;
		current-speed = <115200>;
		power-domains = <&k3_pds 284>;
		clocks = <&k3_clks 284 0>;
		clock-names = "fclk";
	};

	main_uart8: serial@2880000 {
		compatible = "ti,j721e-uart", "ti,am654-uart";
		reg = <0x00 0x02880000 0x00 0x100>;
		reg-shift = <2>;
		reg-io-width = <4>;
		interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <48000000>;
		current-speed = <115200>;
		power-domains = <&k3_pds 285>;
		clocks = <&k3_clks 285 0>;
		clock-names = "fclk";
	};

	main_uart9: serial@2890000 {
		compatible = "ti,j721e-uart", "ti,am654-uart";
		reg = <0x00 0x02890000 0x00 0x100>;
		reg-shift = <2>;
		reg-io-width = <4>;
		interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
		clock-frequency = <48000000>;
		current-speed = <115200>;
		power-domains = <&k3_pds 286>;
		clocks = <&k3_clks 286 0>;
		clock-names = "fclk";
	};
};