ohci-hcd.c 39.3 KB
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/*
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 * Open Host Controller Interface (OHCI) driver for USB.
 *
 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
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 *
 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
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 *
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 * [ Initialisation is based on Linus'  ]
 * [ uhci code and gregs ohci fragments ]
 * [ (C) Copyright 1999 Linus Torvalds  ]
 * [ (C) Copyright 1999 Gregory P. Smith]
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 *
 *
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 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
 * interfaces (though some non-x86 Intel chips use it).  It supports
 * smarter hardware than UHCI.  A download link for the spec available
 * through the http://www.usb.org website.
 *
 * This file is licenced under the GPL.
 */
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#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/ioport.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/timer.h>
#include <linux/list.h>
#include <linux/usb.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/hcd.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmapool.h>
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#include <linux/workqueue.h>
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#include <linux/debugfs.h>
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#include <asm/io.h>
#include <asm/irq.h>
#include <asm/unaligned.h>
#include <asm/byteorder.h>


#define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
#define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"

/*-------------------------------------------------------------------------*/

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#undef OHCI_VERBOSE_DEBUG	/* not always helpful */
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/* For initializing controller (mask in an HCFS mode too) */
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#define	OHCI_CONTROL_INIT	OHCI_CTRL_CBSR
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#define	OHCI_INTR_INIT \
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		(OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
		| OHCI_INTR_RD | OHCI_INTR_WDH)
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#ifdef __hppa__
/* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
#define	IR_DISABLE
#endif

#ifdef CONFIG_ARCH_OMAP
/* OMAP doesn't support IR (no SMM; not needed) */
#define	IR_DISABLE
#endif

/*-------------------------------------------------------------------------*/

static const char	hcd_name [] = "ohci_hcd";

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#define	STATECHANGE_DELAY	msecs_to_jiffies(300)

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#include "ohci.h"
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#include "pci-quirks.h"
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static void ohci_dump (struct ohci_hcd *ohci, int verbose);
static void ohci_stop (struct usb_hcd *hcd);
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#include "ohci-hub.c"
#include "ohci-dbg.c"
#include "ohci-mem.c"
#include "ohci-q.c"


/*
 * On architectures with edge-triggered interrupts we must never return
 * IRQ_NONE.
 */
#if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
#define IRQ_NOTMINE	IRQ_HANDLED
#else
#define IRQ_NOTMINE	IRQ_NONE
#endif


/* Some boards misreport power switching/overcurrent */
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static bool distrust_firmware = 1;
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module_param (distrust_firmware, bool, 0);
MODULE_PARM_DESC (distrust_firmware,
	"true to distrust firmware power/overcurrent setup");

/* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
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static bool no_handshake = 0;
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module_param (no_handshake, bool, 0);
MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");

/*-------------------------------------------------------------------------*/

/*
 * queue up an urb for anything except the root hub
 */
static int ohci_urb_enqueue (
	struct usb_hcd	*hcd,
	struct urb	*urb,
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	gfp_t		mem_flags
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) {
	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
	struct ed	*ed;
	urb_priv_t	*urb_priv;
	unsigned int	pipe = urb->pipe;
	int		i, size = 0;
	unsigned long	flags;
	int		retval = 0;
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#ifdef OHCI_VERBOSE_DEBUG
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	urb_print(urb, "SUB", usb_pipein(pipe), -EINPROGRESS);
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#endif
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	/* every endpoint has a ed, locate and maybe (re)initialize it */
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	if (! (ed = ed_get (ohci, urb->ep, urb->dev, pipe, urb->interval)))
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		return -ENOMEM;

	/* for the private part of the URB we need the number of TDs (size) */
	switch (ed->type) {
		case PIPE_CONTROL:
			/* td_submit_urb() doesn't yet handle these */
			if (urb->transfer_buffer_length > 4096)
				return -EMSGSIZE;

			/* 1 TD for setup, 1 for ACK, plus ... */
			size = 2;
			/* FALLTHROUGH */
		// case PIPE_INTERRUPT:
		// case PIPE_BULK:
		default:
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			/* one TD for every 4096 Bytes (can be up to 8K) */
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			size += urb->transfer_buffer_length / 4096;
			/* ... and for any remaining bytes ... */
			if ((urb->transfer_buffer_length % 4096) != 0)
				size++;
			/* ... and maybe a zero length packet to wrap it up */
			if (size == 0)
				size++;
			else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
				&& (urb->transfer_buffer_length
					% usb_maxpacket (urb->dev, pipe,
						usb_pipeout (pipe))) == 0)
				size++;
			break;
		case PIPE_ISOCHRONOUS: /* number of packets from URB */
			size = urb->number_of_packets;
			break;
	}

	/* allocate the private part of the URB */
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	urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
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			mem_flags);
	if (!urb_priv)
		return -ENOMEM;
	INIT_LIST_HEAD (&urb_priv->pending);
	urb_priv->length = size;
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	urb_priv->ed = ed;
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	/* allocate the TDs (deferring hash chain updates) */
	for (i = 0; i < size; i++) {
		urb_priv->td [i] = td_alloc (ohci, mem_flags);
		if (!urb_priv->td [i]) {
			urb_priv->length = i;
			urb_free_priv (ohci, urb_priv);
			return -ENOMEM;
		}
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	}
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	spin_lock_irqsave (&ohci->lock, flags);

	/* don't submit to a dead HC */
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	if (!HCD_HW_ACCESSIBLE(hcd)) {
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		retval = -ENODEV;
		goto fail;
	}
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	if (ohci->rh_state != OHCI_RH_RUNNING) {
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		retval = -ENODEV;
		goto fail;
	}
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	retval = usb_hcd_link_urb_to_ep(hcd, urb);
	if (retval)
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		goto fail;

	/* schedule the ed if needed */
	if (ed->state == ED_IDLE) {
		retval = ed_schedule (ohci, ed);
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		if (retval < 0) {
			usb_hcd_unlink_urb_from_ep(hcd, urb);
			goto fail;
		}
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		if (ed->type == PIPE_ISOCHRONOUS) {
			u16	frame = ohci_frame_no(ohci);

			/* delay a few frames before the first TD */
			frame += max_t (u16, 8, ed->interval);
			frame &= ~(ed->interval - 1);
			frame |= ed->branch;
			urb->start_frame = frame;
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		}
	} else if (ed->type == PIPE_ISOCHRONOUS) {
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		u16	next = ohci_frame_no(ohci) + 1;
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		u16	frame = ed->last_iso + ed->interval;

		/* Behind the scheduling threshold? */
		if (unlikely(tick_before(frame, next))) {

			/* USB_ISO_ASAP: Round up to the first available slot */
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			if (urb->transfer_flags & URB_ISO_ASAP) {
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				frame += (next - frame + ed->interval - 1) &
						-ed->interval;
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			/*
			 * Not ASAP: Use the next slot in the stream.  If
			 * the entire URB falls before the threshold, fail.
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			 */
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			} else {
				if (tick_before(frame + ed->interval *
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					(urb->number_of_packets - 1), next)) {
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					retval = -EXDEV;
					usb_hcd_unlink_urb_from_ep(hcd, urb);
					goto fail;
				}

				/*
				 * Some OHCI hardware doesn't handle late TDs
				 * correctly.  After retiring them it proceeds
				 * to the next ED instead of the next TD.
				 * Therefore we have to omit the late TDs
				 * entirely.
				 */
				urb_priv->td_cnt = DIV_ROUND_UP(
						(u16) (next - frame),
						ed->interval);
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			}
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		}
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		urb->start_frame = frame;
	}
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	/* fill the TDs and link them to the ed; and
	 * enable that part of the schedule, if needed
	 * and update count of queued periodic urbs
	 */
	urb->hcpriv = urb_priv;
	td_submit_urb (ohci, urb);

fail:
	if (retval)
		urb_free_priv (ohci, urb_priv);
	spin_unlock_irqrestore (&ohci->lock, flags);
	return retval;
}

/*
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 * decouple the URB from the HC queues (TDs, urb_priv).
 * reporting is always done
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 * asynchronously, and we might be dealing with an urb that's
 * partially transferred, or an ED with other urbs being unlinked.
 */
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static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
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{
	struct ohci_hcd		*ohci = hcd_to_ohci (hcd);
	unsigned long		flags;
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	int			rc;
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#ifdef OHCI_VERBOSE_DEBUG
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	urb_print(urb, "UNLINK", 1, status);
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#endif
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	spin_lock_irqsave (&ohci->lock, flags);
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	rc = usb_hcd_check_unlink_urb(hcd, urb, status);
	if (rc) {
		;	/* Do nothing */
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	} else if (ohci->rh_state == OHCI_RH_RUNNING) {
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		urb_priv_t  *urb_priv;

		/* Unless an IRQ completed the unlink while it was being
		 * handed to us, flag it for unlink and giveback, and force
		 * some upcoming INTR_SF to call finish_unlinks()
		 */
		urb_priv = urb->hcpriv;
		if (urb_priv) {
			if (urb_priv->ed->state == ED_OPER)
				start_ed_unlink (ohci, urb_priv->ed);
		}
	} else {
		/*
		 * with HC dead, we won't respect hc queue pointers
		 * any more ... just clean up every urb's memory.
		 */
		if (urb->hcpriv)
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			finish_urb(ohci, urb, status);
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	}
	spin_unlock_irqrestore (&ohci->lock, flags);
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	return rc;
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}

/*-------------------------------------------------------------------------*/

/* frees config/altsetting state for endpoints,
 * including ED memory, dummy TD, and bulk/intr data toggle
 */

static void
ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
{
	struct ohci_hcd		*ohci = hcd_to_ohci (hcd);
	unsigned long		flags;
	struct ed		*ed = ep->hcpriv;
	unsigned		limit = 1000;

	/* ASSERT:  any requests/urbs are being unlinked */
	/* ASSERT:  nobody can be submitting urbs for this any more */

	if (!ed)
		return;

rescan:
	spin_lock_irqsave (&ohci->lock, flags);

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	if (ohci->rh_state != OHCI_RH_RUNNING) {
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sanitize:
		ed->state = ED_IDLE;
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		if (quirk_zfmicro(ohci) && ed->type == PIPE_INTERRUPT)
			ohci->eds_scheduled--;
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		finish_unlinks (ohci, 0);
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	}

	switch (ed->state) {
	case ED_UNLINK:		/* wait for hw to finish? */
		/* major IRQ delivery trouble loses INTR_SF too... */
		if (limit-- == 0) {
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			ohci_warn(ohci, "ED unlink timeout\n");
			if (quirk_zfmicro(ohci)) {
				ohci_warn(ohci, "Attempting ZF TD recovery\n");
				ohci->ed_to_check = ed;
				ohci->zf_delay = 2;
			}
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			goto sanitize;
		}
		spin_unlock_irqrestore (&ohci->lock, flags);
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		schedule_timeout_uninterruptible(1);
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		goto rescan;
	case ED_IDLE:		/* fully unlinked */
		if (list_empty (&ed->td_list)) {
			td_free (ohci, ed->dummy);
			ed_free (ohci, ed);
			break;
		}
		/* else FALL THROUGH */
	default:
		/* caller was supposed to have unlinked any requests;
		 * that's not our job.  can't recover; must leak ed.
		 */
		ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
			ed, ep->desc.bEndpointAddress, ed->state,
			list_empty (&ed->td_list) ? "" : " (has tds)");
		td_free (ohci, ed->dummy);
		break;
	}
	ep->hcpriv = NULL;
	spin_unlock_irqrestore (&ohci->lock, flags);
}

static int ohci_get_frame (struct usb_hcd *hcd)
{
	struct ohci_hcd		*ohci = hcd_to_ohci (hcd);

	return ohci_frame_no(ohci);
}

static void ohci_usb_reset (struct ohci_hcd *ohci)
{
	ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
	ohci->hc_control &= OHCI_CTRL_RWC;
	ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
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	ohci->rh_state = OHCI_RH_HALTED;
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}

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/* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
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 * other cases where the next software may expect clean state from the
 * "firmware".  this is bus-neutral, unlike shutdown() methods.
 */
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static void
ohci_shutdown (struct usb_hcd *hcd)
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{
	struct ohci_hcd *ohci;

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	ohci = hcd_to_ohci (hcd);
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	ohci_writel(ohci, (u32) ~0, &ohci->regs->intrdisable);
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	/* Software reset, after which the controller goes into SUSPEND */
	ohci_writel(ohci, OHCI_HCR, &ohci->regs->cmdstatus);
	ohci_readl(ohci, &ohci->regs->cmdstatus);	/* flush the writes */
	udelay(10);
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	ohci_writel(ohci, ohci->fminterval, &ohci->regs->fminterval);
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}

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static int check_ed(struct ohci_hcd *ohci, struct ed *ed)
{
	return (hc32_to_cpu(ohci, ed->hwINFO) & ED_IN) != 0
		&& (hc32_to_cpu(ohci, ed->hwHeadP) & TD_MASK)
			== (hc32_to_cpu(ohci, ed->hwTailP) & TD_MASK)
		&& !list_empty(&ed->td_list);
}

/* ZF Micro watchdog timer callback. The ZF Micro chipset sometimes completes
 * an interrupt TD but neglects to add it to the donelist.  On systems with
 * this chipset, we need to periodically check the state of the queues to look
 * for such "lost" TDs.
 */
static void unlink_watchdog_func(unsigned long _ohci)
{
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	unsigned long	flags;
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	unsigned	max;
	unsigned	seen_count = 0;
	unsigned	i;
	struct ed	**seen = NULL;
	struct ohci_hcd	*ohci = (struct ohci_hcd *) _ohci;

	spin_lock_irqsave(&ohci->lock, flags);
	max = ohci->eds_scheduled;
	if (!max)
		goto done;

	if (ohci->ed_to_check)
		goto out;

	seen = kcalloc(max, sizeof *seen, GFP_ATOMIC);
	if (!seen)
		goto out;

	for (i = 0; i < NUM_INTS; i++) {
		struct ed	*ed = ohci->periodic[i];

		while (ed) {
			unsigned	temp;

			/* scan this branch of the periodic schedule tree */
			for (temp = 0; temp < seen_count; temp++) {
				if (seen[temp] == ed) {
					/* we've checked it and what's after */
					ed = NULL;
					break;
				}
			}
			if (!ed)
				break;
			seen[seen_count++] = ed;
			if (!check_ed(ohci, ed)) {
				ed = ed->ed_next;
				continue;
			}

			/* HC's TD list is empty, but HCD sees at least one
			 * TD that's not been sent through the donelist.
			 */
			ohci->ed_to_check = ed;
			ohci->zf_delay = 2;

			/* The HC may wait until the next frame to report the
			 * TD as done through the donelist and INTR_WDH.  (We
			 * just *assume* it's not a multi-TD interrupt URB;
			 * those could defer the IRQ more than one frame, using
			 * DI...)  Check again after the next INTR_SF.
			 */
			ohci_writel(ohci, OHCI_INTR_SF,
					&ohci->regs->intrstatus);
			ohci_writel(ohci, OHCI_INTR_SF,
					&ohci->regs->intrenable);

			/* flush those writes */
			(void) ohci_readl(ohci, &ohci->regs->control);

			goto out;
		}
	}
out:
	kfree(seen);
	if (ohci->eds_scheduled)
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		mod_timer(&ohci->unlink_watchdog, round_jiffies(jiffies + HZ));
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done:
	spin_unlock_irqrestore(&ohci->lock, flags);
}

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/*-------------------------------------------------------------------------*
 * HC functions
 *-------------------------------------------------------------------------*/

/* init memory, and kick BIOS/SMM off */

static int ohci_init (struct ohci_hcd *ohci)
{
	int ret;
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	struct usb_hcd *hcd = ohci_to_hcd(ohci);
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	if (distrust_firmware)
		ohci->flags |= OHCI_QUIRK_HUB_POWER;

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	ohci->rh_state = OHCI_RH_HALTED;
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	ohci->regs = hcd->regs;
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	/* REVISIT this BIOS handshake is now moved into PCI "quirks", and
	 * was never needed for most non-PCI systems ... remove the code?
	 */

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#ifndef IR_DISABLE
	/* SMM owns the HC?  not for long! */
	if (!no_handshake && ohci_readl (ohci,
					&ohci->regs->control) & OHCI_CTRL_IR) {
		u32 temp;

		ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");

		/* this timeout is arbitrary.  we make it long, so systems
		 * depending on usb keyboards may be usable even if the
		 * BIOS/SMM code seems pretty broken.
		 */
		temp = 500;	/* arbitrary: five seconds */

		ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
		ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
		while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
			msleep (10);
			if (--temp == 0) {
				ohci_err (ohci, "USB HC takeover failed!"
					"  (BIOS/SMM bug)\n");
				return -EBUSY;
			}
		}
		ohci_usb_reset (ohci);
	}
#endif

	/* Disable HC interrupts */
	ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
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	/* flush the writes, and save key bits like RWC */
	if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
		ohci->hc_control |= OHCI_CTRL_RWC;
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	/* Read the number of ports unless overridden */
	if (ohci->num_ports == 0)
		ohci->num_ports = roothub_a(ohci) & RH_A_NDP;

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	if (ohci->hcca)
		return 0;

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	ohci->hcca = dma_alloc_coherent (hcd->self.controller,
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			sizeof *ohci->hcca, &ohci->hcca_dma, 0);
	if (!ohci->hcca)
		return -ENOMEM;

	if ((ret = ohci_mem_init (ohci)) < 0)
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		ohci_stop (hcd);
	else {
		create_debug_files (ohci);
	}
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	return ret;
}

/*-------------------------------------------------------------------------*/

/* Start an OHCI controller, set the BUS operational
 * resets USB and controller
587
 * enable interrupts
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 */
static int ohci_run (struct ohci_hcd *ohci)
{
591
	u32			mask, val;
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592
	int			first = ohci->fminterval == 0;
593
	struct usb_hcd		*hcd = ohci_to_hcd(ohci);
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594

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595
	ohci->rh_state = OHCI_RH_HALTED;
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	/* boot firmware should have set this up (5.1.1.3.1) */
	if (first) {

600 601
		val = ohci_readl (ohci, &ohci->regs->fminterval);
		ohci->fminterval = val & 0x3fff;
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		if (ohci->fminterval != FI)
			ohci_dbg (ohci, "fminterval delta %d\n",
				ohci->fminterval - FI);
		ohci->fminterval |= FSMP (ohci->fminterval) << 16;
		/* also: power/overcurrent flags in roothub.a */
	}

609 610 611 612
	/* Reset USB nearly "by the book".  RemoteWakeupConnected has
	 * to be checked in case boot firmware (BIOS/SMM/...) has set up
	 * wakeup in a way the bus isn't aware of (e.g., legacy PCI PM).
	 * If the bus glue detected wakeup capability then it should
613
	 * already be enabled; if so we'll just enable it again.
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	 */
615 616
	if ((ohci->hc_control & OHCI_CTRL_RWC) != 0)
		device_set_wakeup_capable(hcd->self.controller, 1);
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	switch (ohci->hc_control & OHCI_CTRL_HCFS) {
	case OHCI_USB_OPER:
620
		val = 0;
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		break;
	case OHCI_USB_SUSPEND:
	case OHCI_USB_RESUME:
		ohci->hc_control &= OHCI_CTRL_RWC;
		ohci->hc_control |= OHCI_USB_RESUME;
626
		val = 10 /* msec wait */;
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		break;
	// case OHCI_USB_RESET:
	default:
		ohci->hc_control &= OHCI_CTRL_RWC;
		ohci->hc_control |= OHCI_USB_RESET;
632
		val = 50 /* msec wait */;
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		break;
	}
	ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
	// flush the writes
	(void) ohci_readl (ohci, &ohci->regs->control);
638
	msleep(val);
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	memset (ohci->hcca, 0, sizeof (struct ohci_hcca));

	/* 2msec timelimit here means no irqs/preempt */
	spin_lock_irq (&ohci->lock);

retry:
	/* HC Reset requires max 10 us delay */
	ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
648
	val = 30;	/* ... allow extra time */
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	while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
650
		if (--val == 0) {
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			spin_unlock_irq (&ohci->lock);
			ohci_err (ohci, "USB HC reset timed out!\n");
			return -1;
		}
		udelay (1);
	}

	/* now we're in the SUSPEND state ... must go OPERATIONAL
	 * within 2msec else HC enters RESUME
	 *
	 * ... but some hardware won't init fmInterval "by the book"
	 * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
	 * this if we write fmInterval after we're OPERATIONAL.
	 * Unclear about ALi, ServerWorks, and others ... this could
	 * easily be a longstanding bug in chip init on Linux.
	 */
	if (ohci->flags & OHCI_QUIRK_INITRESET) {
		ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
		// flush those writes
		(void) ohci_readl (ohci, &ohci->regs->control);
	}

	/* Tell the controller where the control and bulk lists are
	 * The lists are empty now. */
	ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
	ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);

	/* a reset clears this */
	ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);

	periodic_reinit (ohci);

	/* some OHCI implementations are finicky about how they init.
	 * bogus values here mean not even enumeration could work.
	 */
	if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
			|| !ohci_readl (ohci, &ohci->regs->periodicstart)) {
		if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
			ohci->flags |= OHCI_QUIRK_INITRESET;
			ohci_dbg (ohci, "enabling initreset quirk\n");
			goto retry;
		}
		spin_unlock_irq (&ohci->lock);
		ohci_err (ohci, "init err (%08x %04x)\n",
			ohci_readl (ohci, &ohci->regs->fminterval),
			ohci_readl (ohci, &ohci->regs->periodicstart));
		return -EOVERFLOW;
	}

700
	/* use rhsc irqs after khubd is fully initialized */
701
	set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
702 703 704
	hcd->uses_new_polling = 1;

	/* start controller operations */
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	ohci->hc_control &= OHCI_CTRL_RWC;
706 707
	ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
	ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
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	ohci->rh_state = OHCI_RH_RUNNING;
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	/* wake on ConnectStatusChange, matching external hubs */
	ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);

	/* Choose the interrupts we care about now, others later on demand */
	mask = OHCI_INTR_INIT;
715
	ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
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	ohci_writel (ohci, mask, &ohci->regs->intrenable);

	/* handle root hub init quirks ... */
719 720
	val = roothub_a (ohci);
	val &= ~(RH_A_PSM | RH_A_OCPM);
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	if (ohci->flags & OHCI_QUIRK_SUPERIO) {
		/* NSC 87560 and maybe others */
723 724 725
		val |= RH_A_NOCP;
		val &= ~(RH_A_POTPGT | RH_A_NPS);
		ohci_writel (ohci, val, &ohci->regs->roothub.a);
726 727
	} else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
			(ohci->flags & OHCI_QUIRK_HUB_POWER)) {
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		/* hub power always on; required for AMD-756 and some
		 * Mac platforms.  ganged overcurrent reporting, if any.
		 */
731 732
		val |= RH_A_NPS;
		ohci_writel (ohci, val, &ohci->regs->roothub.a);
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733 734
	}
	ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
735
	ohci_writel (ohci, (val & RH_A_NPS) ? 0 : RH_B_PPCM,
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						&ohci->regs->roothub.b);
	// flush those writes
	(void) ohci_readl (ohci, &ohci->regs->control);

740
	ohci->next_statechange = jiffies + STATECHANGE_DELAY;
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	spin_unlock_irq (&ohci->lock);

	// POTPGT delay is bits 24-31, in 2 ms units.
744
	mdelay ((val >> 23) & 0x1fe);
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	if (quirk_zfmicro(ohci)) {
		/* Create timer to watch for bad queue state on ZF Micro */
		setup_timer(&ohci->unlink_watchdog, unlink_watchdog_func,
				(unsigned long) ohci);

		ohci->eds_scheduled = 0;
		ohci->ed_to_check = NULL;
	}

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	ohci_dump (ohci, 1);

	return 0;
}

760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785
/* ohci_setup routine for generic controller initialization */

int ohci_setup(struct usb_hcd *hcd)
{
	struct ohci_hcd		*ohci = hcd_to_ohci(hcd);

	ohci_hcd_init(ohci);
	
	return ohci_init(ohci);
}
EXPORT_SYMBOL_GPL(ohci_setup);

/* ohci_start routine for generic controller start of all OHCI bus glue */
static int ohci_start(struct usb_hcd *hcd)
{
	struct ohci_hcd		*ohci = hcd_to_ohci(hcd);
	int	ret;

	ret = ohci_run(ohci);
	if (ret < 0) {
		ohci_err(ohci, "can't start\n");
		ohci_stop(hcd);
	}
	return ret;
}

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/*-------------------------------------------------------------------------*/

/* an interrupt happens */

790
static irqreturn_t ohci_irq (struct usb_hcd *hcd)
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{
	struct ohci_hcd		*ohci = hcd_to_ohci (hcd);
	struct ohci_regs __iomem *regs = ohci->regs;
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	int			ints;
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796 797 798
	/* Read interrupt status (and flush pending writes).  We ignore the
	 * optimization of checking the LSB of hcca->done_head; it doesn't
	 * work on all systems (edge triggering for OHCI can be a factor).
M
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	 */
800
	ints = ohci_readl(ohci, &regs->intrstatus);
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801

802 803 804 805
	/* Check for an all 1's result which is a typical consequence
	 * of dead, unclocked, or unplugged (CardBus...) devices
	 */
	if (ints == ~(u32)0) {
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		ohci->rh_state = OHCI_RH_HALTED;
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		ohci_dbg (ohci, "device removed!\n");
808
		usb_hc_died(hcd);
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		return IRQ_HANDLED;
810 811 812 813
	}

	/* We only care about interrupts that are enabled */
	ints &= ohci_readl(ohci, &regs->intrenable);
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Linus Torvalds 已提交
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	/* interrupt for some other device? */
A
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816
	if (ints == 0 || unlikely(ohci->rh_state == OHCI_RH_HALTED))
L
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817
		return IRQ_NOTMINE;
818

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	if (ints & OHCI_INTR_UE) {
		// e.g. due to PCI Master/Target Abort
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		if (quirk_nec(ohci)) {
822 823 824 825 826 827 828 829 830 831
			/* Workaround for a silicon bug in some NEC chips used
			 * in Apple's PowerBooks. Adapted from Darwin code.
			 */
			ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");

			ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);

			schedule_work (&ohci->nec_work);
		} else {
			ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
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Alan Stern 已提交
832
			ohci->rh_state = OHCI_RH_HALTED;
833
			usb_hc_died(hcd);
834
		}
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835 836 837 838 839

		ohci_dump (ohci, 1);
		ohci_usb_reset (ohci);
	}

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840 841 842 843 844
	if (ints & OHCI_INTR_RHSC) {
		ohci_vdbg(ohci, "rhsc\n");
		ohci->next_statechange = jiffies + STATECHANGE_DELAY;
		ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
				&regs->intrstatus);
845 846 847 848 849 850 851 852 853 854

		/* NOTE: Vendors didn't always make the same implementation
		 * choices for RHSC.  Many followed the spec; RHSC triggers
		 * on an edge, like setting and maybe clearing a port status
		 * change bit.  With others it's level-triggered, active
		 * until khubd clears all the port status change bits.  We'll
		 * always disable it here and rely on polling until khubd
		 * re-enables it.
		 */
		ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
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855 856 857 858 859 860 861 862 863 864
		usb_hcd_poll_rh_status(hcd);
	}

	/* For connect and disconnect events, we expect the controller
	 * to turn on RHSC along with RD.  But for remote wakeup events
	 * this might not happen.
	 */
	else if (ints & OHCI_INTR_RD) {
		ohci_vdbg(ohci, "resume detect\n");
		ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
865
		set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
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Alan Stern 已提交
866 867 868 869 870
		if (ohci->autostop) {
			spin_lock (&ohci->lock);
			ohci_rh_resume (ohci);
			spin_unlock (&ohci->lock);
		} else
D
David Brownell 已提交
871
			usb_hcd_resume_root_hub(hcd);
L
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872 873 874 875
	}

	if (ints & OHCI_INTR_WDH) {
		spin_lock (&ohci->lock);
876
		dl_done_list (ohci);
L
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877 878
		spin_unlock (&ohci->lock);
	}
879

M
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880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904
	if (quirk_zfmicro(ohci) && (ints & OHCI_INTR_SF)) {
		spin_lock(&ohci->lock);
		if (ohci->ed_to_check) {
			struct ed *ed = ohci->ed_to_check;

			if (check_ed(ohci, ed)) {
				/* HC thinks the TD list is empty; HCD knows
				 * at least one TD is outstanding
				 */
				if (--ohci->zf_delay == 0) {
					struct td *td = list_entry(
						ed->td_list.next,
						struct td, td_list);
					ohci_warn(ohci,
						  "Reclaiming orphan TD %p\n",
						  td);
					takeback_td(ohci, td);
					ohci->ed_to_check = NULL;
				}
			} else
				ohci->ed_to_check = NULL;
		}
		spin_unlock(&ohci->lock);
	}

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905 906 907 908 909 910 911
	/* could track INTR_SO to reduce available PCI/... bandwidth */

	/* handle any pending URB/ED unlinks, leaving INTR_SF enabled
	 * when there's still unlinking to be done (next frame).
	 */
	spin_lock (&ohci->lock);
	if (ohci->ed_rm_list)
912
		finish_unlinks (ohci, ohci_frame_no(ohci));
M
Mike Nuss 已提交
913 914 915
	if ((ints & OHCI_INTR_SF) != 0
			&& !ohci->ed_rm_list
			&& !ohci->ed_to_check
A
Alan Stern 已提交
916
			&& ohci->rh_state == OHCI_RH_RUNNING)
917
		ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
L
Linus Torvalds 已提交
918 919
	spin_unlock (&ohci->lock);

A
Alan Stern 已提交
920
	if (ohci->rh_state == OHCI_RH_RUNNING) {
L
Linus Torvalds 已提交
921
		ohci_writel (ohci, ints, &regs->intrstatus);
922
		ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
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923 924 925 926 927 928 929 930 931 932
		// flush those writes
		(void) ohci_readl (ohci, &ohci->regs->control);
	}

	return IRQ_HANDLED;
}

/*-------------------------------------------------------------------------*/

static void ohci_stop (struct usb_hcd *hcd)
933
{
L
Linus Torvalds 已提交
934 935 936 937
	struct ohci_hcd		*ohci = hcd_to_ohci (hcd);

	ohci_dump (ohci, 1);

T
Tejun Heo 已提交
938
	if (quirk_nec(ohci))
939
		flush_work(&ohci->nec_work);
L
Linus Torvalds 已提交
940 941 942

	ohci_usb_reset (ohci);
	ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
943
	free_irq(hcd->irq, hcd);
944
	hcd->irq = 0;
945

M
Mike Nuss 已提交
946 947
	if (quirk_zfmicro(ohci))
		del_timer(&ohci->unlink_watchdog);
L
Libin Yang 已提交
948
	if (quirk_amdiso(ohci))
949
		usb_amd_dev_put();
M
Mike Nuss 已提交
950

L
Linus Torvalds 已提交
951 952 953
	remove_debug_files (ohci);
	ohci_mem_cleanup (ohci);
	if (ohci->hcca) {
954 955
		dma_free_coherent (hcd->self.controller,
				sizeof *ohci->hcca,
L
Linus Torvalds 已提交
956 957 958 959 960 961 962 963
				ohci->hcca, ohci->hcca_dma);
		ohci->hcca = NULL;
		ohci->hcca_dma = 0;
	}
}

/*-------------------------------------------------------------------------*/

964 965
#if defined(CONFIG_PM) || defined(CONFIG_PCI)

L
Linus Torvalds 已提交
966
/* must not be called from interrupt context */
967
int ohci_restart(struct ohci_hcd *ohci)
L
Linus Torvalds 已提交
968 969 970 971 972
{
	int temp;
	int i;
	struct urb_priv *priv;

973
	ohci_init(ohci);
L
Linus Torvalds 已提交
974
	spin_lock_irq(&ohci->lock);
A
Alan Stern 已提交
975
	ohci->rh_state = OHCI_RH_HALTED;
976 977

	/* Recycle any "live" eds/tds (and urbs). */
L
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978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000
	if (!list_empty (&ohci->pending))
		ohci_dbg(ohci, "abort schedule...\n");
	list_for_each_entry (priv, &ohci->pending, pending) {
		struct urb	*urb = priv->td[0]->urb;
		struct ed	*ed = priv->ed;

		switch (ed->state) {
		case ED_OPER:
			ed->state = ED_UNLINK;
			ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
			ed_deschedule (ohci, ed);

			ed->ed_next = ohci->ed_rm_list;
			ed->ed_prev = NULL;
			ohci->ed_rm_list = ed;
			/* FALLTHROUGH */
		case ED_UNLINK:
			break;
		default:
			ohci_dbg(ohci, "bogus ed %p state %d\n",
					ed, ed->state);
		}

1001 1002
		if (!urb->unlinked)
			urb->unlinked = -ESHUTDOWN;
L
Linus Torvalds 已提交
1003
	}
1004
	finish_unlinks (ohci, 0);
L
Linus Torvalds 已提交
1005 1006 1007 1008 1009 1010 1011
	spin_unlock_irq(&ohci->lock);

	/* paranoia, in case that didn't work: */

	/* empty the interrupt branches */
	for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
	for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
1012

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Linus Torvalds 已提交
1013 1014 1015
	/* no EDs to remove */
	ohci->ed_rm_list = NULL;

1016
	/* empty control and bulk lists */
L
Linus Torvalds 已提交
1017 1018 1019 1020 1021 1022 1023
	ohci->ed_controltail = NULL;
	ohci->ed_bulktail    = NULL;

	if ((temp = ohci_run (ohci)) < 0) {
		ohci_err (ohci, "can't restart, %d\n", temp);
		return temp;
	}
A
Alan Stern 已提交
1024
	ohci_dbg(ohci, "restart complete\n");
L
Linus Torvalds 已提交
1025 1026
	return 0;
}
1027
EXPORT_SYMBOL_GPL(ohci_restart);
1028

1029 1030
#endif

1031 1032
#ifdef CONFIG_PM

1033
int ohci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1034 1035 1036 1037
{
	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
	unsigned long	flags;

1038
	/* Disable irq emission and mark HW unaccessible. Use
1039 1040 1041 1042 1043 1044 1045 1046 1047 1048
	 * the spinlock to properly synchronize with possible pending
	 * RH suspend or resume activity.
	 */
	spin_lock_irqsave (&ohci->lock, flags);
	ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
	(void)ohci_readl(ohci, &ohci->regs->intrdisable);

	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
	spin_unlock_irqrestore (&ohci->lock, flags);

1049
	return 0;
1050
}
1051
EXPORT_SYMBOL_GPL(ohci_suspend);
1052 1053


1054
int ohci_resume(struct usb_hcd *hcd, bool hibernated)
1055
{
1056 1057 1058 1059
	struct ohci_hcd		*ohci = hcd_to_ohci(hcd);
	int			port;
	bool			need_reinit = false;

1060 1061 1062 1063
	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);

	/* Make sure resume from hibernation re-enumerates everything */
	if (hibernated)
1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098
		ohci_usb_reset(ohci);

	/* See if the controller is already running or has been reset */
	ohci->hc_control = ohci_readl(ohci, &ohci->regs->control);
	if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
		need_reinit = true;
	} else {
		switch (ohci->hc_control & OHCI_CTRL_HCFS) {
		case OHCI_USB_OPER:
		case OHCI_USB_RESET:
			need_reinit = true;
		}
	}

	/* If needed, reinitialize and suspend the root hub */
	if (need_reinit) {
		spin_lock_irq(&ohci->lock);
		ohci_rh_resume(ohci);
		ohci_rh_suspend(ohci, 0);
		spin_unlock_irq(&ohci->lock);
	}

	/* Normally just turn on port power and enable interrupts */
	else {
		ohci_dbg(ohci, "powerup ports\n");
		for (port = 0; port < ohci->num_ports; port++)
			ohci_writel(ohci, RH_PS_PPS,
					&ohci->regs->roothub.portstatus[port]);

		ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrenable);
		ohci_readl(ohci, &ohci->regs->intrenable);
		msleep(20);
	}

	usb_hcd_resume_root_hub(hcd);
1099 1100 1101

	return 0;
}
1102 1103 1104 1105 1106 1107 1108 1109 1110 1111
EXPORT_SYMBOL_GPL(ohci_resume);

#endif

/*-------------------------------------------------------------------------*/

/*
 * Generic structure: This gets copied for platform drivers so that
 * individual entries can be overridden as needed.
 */
1112

1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151
static const struct hc_driver ohci_hc_driver = {
	.description =          hcd_name,
	.product_desc =         "OHCI Host Controller",
	.hcd_priv_size =        sizeof(struct ohci_hcd),

	/*
	 * generic hardware linkage
	*/
	.irq =                  ohci_irq,
	.flags =                HCD_MEMORY | HCD_USB11,

	/*
	* basic lifecycle operations
	*/
	.reset =                ohci_setup,
	.start =                ohci_start,
	.stop =                 ohci_stop,
	.shutdown =             ohci_shutdown,

	/*
	 * managing i/o requests and associated device resources
	*/
	.urb_enqueue =          ohci_urb_enqueue,
	.urb_dequeue =          ohci_urb_dequeue,
	.endpoint_disable =     ohci_endpoint_disable,

	/*
	* scheduling support
	*/
	.get_frame_number =     ohci_get_frame,

	/*
	* root hub support
	*/
	.hub_status_data =      ohci_hub_status_data,
	.hub_control =          ohci_hub_control,
#ifdef CONFIG_PM
	.bus_suspend =          ohci_bus_suspend,
	.bus_resume =           ohci_bus_resume,
1152
#endif
1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167
	.start_port_reset =	ohci_start_port_reset,
};

void ohci_init_driver(struct hc_driver *drv,
		const struct ohci_driver_overrides *over)
{
	/* Copy the generic table to drv and then apply the overrides */
	*drv = ohci_hc_driver;

	drv->product_desc = over->product_desc;
	drv->hcd_priv_size += over->extra_priv_size;
	if (over->reset)
		drv->reset = over->reset;
}
EXPORT_SYMBOL_GPL(ohci_init_driver);
1168

1169 1170
/*-------------------------------------------------------------------------*/

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Linus Torvalds 已提交
1171
MODULE_AUTHOR (DRIVER_AUTHOR);
1172
MODULE_DESCRIPTION(DRIVER_DESC);
L
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1173 1174
MODULE_LICENSE ("GPL");

1175
#if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_SA1111)
L
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1176
#include "ohci-sa1111.c"
1177
#define SA1111_DRIVER		ohci_hcd_sa1111_driver
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1178 1179
#endif

1180
#if defined(CONFIG_ARCH_S3C24XX) || defined(CONFIG_ARCH_S3C64XX)
1181
#include "ohci-s3c2410.c"
1182
#define S3C2410_PLATFORM_DRIVER	ohci_hcd_s3c2410_driver
1183 1184
#endif

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Jingoo Han 已提交
1185 1186
#ifdef CONFIG_USB_OHCI_EXYNOS
#include "ohci-exynos.c"
1187
#define EXYNOS_PLATFORM_DRIVER	exynos_ohci_driver
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1188 1189
#endif

1190
#ifdef CONFIG_USB_OHCI_HCD_OMAP1
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1191
#include "ohci-omap.c"
1192 1193 1194 1195 1196 1197
#define OMAP1_PLATFORM_DRIVER	ohci_hcd_omap_driver
#endif

#ifdef CONFIG_USB_OHCI_HCD_OMAP3
#include "ohci-omap3.c"
#define OMAP3_PLATFORM_DRIVER	ohci_hcd_omap3_driver
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#endif

1200
#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
L
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1201
#include "ohci-pxa27x.c"
1202
#define PLATFORM_DRIVER		ohci_hcd_pxa27x_driver
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#endif

1205 1206
#ifdef CONFIG_ARCH_EP93XX
#include "ohci-ep93xx.c"
1207
#define EP93XX_PLATFORM_DRIVER	ohci_hcd_ep93xx_driver
1208 1209
#endif

1210
#ifdef CONFIG_ARCH_AT91
1211
#include "ohci-at91.c"
1212
#define AT91_PLATFORM_DRIVER	ohci_hcd_at91_driver
1213 1214
#endif

1215
#ifdef CONFIG_ARCH_LPC32XX
1216
#include "ohci-nxp.c"
1217
#define NXP_PLATFORM_DRIVER	usb_hcd_nxp_driver
1218 1219
#endif

1220 1221
#ifdef CONFIG_ARCH_DAVINCI_DA8XX
#include "ohci-da8xx.c"
1222
#define DAVINCI_PLATFORM_DRIVER	ohci_hcd_da8xx_driver
1223 1224
#endif

1225 1226 1227 1228 1229
#ifdef CONFIG_USB_OHCI_HCD_PPC_OF
#include "ohci-ppc-of.c"
#define OF_PLATFORM_DRIVER	ohci_hcd_ppc_of_driver
#endif

1230 1231
#ifdef CONFIG_PLAT_SPEAR
#include "ohci-spear.c"
1232
#define SPEAR_PLATFORM_DRIVER	spear_ohci_hcd_driver
1233 1234
#endif

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Geoff Levand 已提交
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#ifdef CONFIG_PPC_PS3
#include "ohci-ps3.c"
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1237
#define PS3_SYSTEM_BUS_DRIVER	ps3_ohci_driver
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1238 1239
#endif

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1240 1241
#ifdef CONFIG_MFD_SM501
#include "ohci-sm501.c"
1242
#define SM501_OHCI_DRIVER	ohci_hcd_sm501_driver
M
Magnus Damm 已提交
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#endif

1245 1246 1247
#ifdef CONFIG_MFD_TC6393XB
#include "ohci-tmio.c"
#define TMIO_OHCI_DRIVER	ohci_hcd_tmio_driver
1248 1249 1250 1251 1252
#endif

#ifdef CONFIG_MACH_JZ4740
#include "ohci-jz4740.c"
#define PLATFORM_DRIVER	ohci_hcd_jz4740_driver
1253 1254
#endif

1255 1256 1257 1258 1259
#ifdef CONFIG_USB_OCTEON_OHCI
#include "ohci-octeon.c"
#define PLATFORM_DRIVER		ohci_octeon_driver
#endif

1260 1261 1262 1263 1264
#ifdef CONFIG_TILE_USB
#include "ohci-tilegx.c"
#define PLATFORM_DRIVER		ohci_hcd_tilegx_driver
#endif

1265 1266 1267 1268 1269
#ifdef CONFIG_USB_OHCI_HCD_PLATFORM
#include "ohci-platform.c"
#define PLATFORM_DRIVER		ohci_platform_driver
#endif

1270
#if	!IS_ENABLED(CONFIG_USB_OHCI_HCD_PCI) &&	\
1271
	!defined(PLATFORM_DRIVER) &&	\
1272 1273
	!defined(OMAP1_PLATFORM_DRIVER) &&	\
	!defined(OMAP3_PLATFORM_DRIVER) &&	\
1274
	!defined(OF_PLATFORM_DRIVER) &&	\
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Geoff Levand 已提交
1275
	!defined(SA1111_DRIVER) &&	\
M
Michael Buesch 已提交
1276
	!defined(PS3_SYSTEM_BUS_DRIVER) && \
1277
	!defined(SM501_OHCI_DRIVER) && \
1278 1279 1280 1281 1282 1283 1284 1285
	!defined(TMIO_OHCI_DRIVER) && \
	!defined(S3C2410_PLATFORM_DRIVER) && \
	!defined(EXYNOS_PLATFORM_DRIVER) && \
	!defined(EP93XX_PLATFORM_DRIVER) && \
	!defined(AT91_PLATFORM_DRIVER) && \
	!defined(NXP_PLATFORM_DRIVER) && \
	!defined(DAVINCI_PLATFORM_DRIVER) && \
	!defined(SPEAR_PLATFORM_DRIVER)
L
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1286 1287
#error "missing bus glue for ohci-hcd"
#endif
1288 1289 1290 1291 1292 1293 1294 1295

static int __init ohci_hcd_mod_init(void)
{
	int retval = 0;

	if (usb_disabled())
		return -ENODEV;

1296
	printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1297 1298
	pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
		sizeof (struct ed), sizeof (struct td));
1299
	set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1300

1301
#ifdef DEBUG
1302
	ohci_debug_root = debugfs_create_dir("ohci", usb_debug_root);
1303 1304 1305 1306 1307 1308
	if (!ohci_debug_root) {
		retval = -ENOENT;
		goto error_debug;
	}
#endif

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#ifdef PS3_SYSTEM_BUS_DRIVER
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1310 1311 1312
	retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
	if (retval < 0)
		goto error_ps3;
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Geoff Levand 已提交
1313 1314
#endif

1315 1316 1317
#ifdef PLATFORM_DRIVER
	retval = platform_driver_register(&PLATFORM_DRIVER);
	if (retval < 0)
1318
		goto error_platform;
1319 1320
#endif

1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332
#ifdef OMAP1_PLATFORM_DRIVER
	retval = platform_driver_register(&OMAP1_PLATFORM_DRIVER);
	if (retval < 0)
		goto error_omap1_platform;
#endif

#ifdef OMAP3_PLATFORM_DRIVER
	retval = platform_driver_register(&OMAP3_PLATFORM_DRIVER);
	if (retval < 0)
		goto error_omap3_platform;
#endif

1333
#ifdef OF_PLATFORM_DRIVER
1334
	retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1335
	if (retval < 0)
1336
		goto error_of_platform;
1337 1338
#endif

1339 1340 1341
#ifdef SA1111_DRIVER
	retval = sa1111_driver_register(&SA1111_DRIVER);
	if (retval < 0)
1342
		goto error_sa1111;
1343 1344
#endif

1345 1346 1347 1348 1349 1350
#ifdef SM501_OHCI_DRIVER
	retval = platform_driver_register(&SM501_OHCI_DRIVER);
	if (retval < 0)
		goto error_sm501;
#endif

1351 1352 1353 1354 1355 1356
#ifdef TMIO_OHCI_DRIVER
	retval = platform_driver_register(&TMIO_OHCI_DRIVER);
	if (retval < 0)
		goto error_tmio;
#endif

1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398
#ifdef S3C2410_PLATFORM_DRIVER
	retval = platform_driver_register(&S3C2410_PLATFORM_DRIVER);
	if (retval < 0)
		goto error_s3c2410;
#endif

#ifdef EXYNOS_PLATFORM_DRIVER
	retval = platform_driver_register(&EXYNOS_PLATFORM_DRIVER);
	if (retval < 0)
		goto error_exynos;
#endif

#ifdef EP93XX_PLATFORM_DRIVER
	retval = platform_driver_register(&EP93XX_PLATFORM_DRIVER);
	if (retval < 0)
		goto error_ep93xx;
#endif

#ifdef AT91_PLATFORM_DRIVER
	retval = platform_driver_register(&AT91_PLATFORM_DRIVER);
	if (retval < 0)
		goto error_at91;
#endif

#ifdef NXP_PLATFORM_DRIVER
	retval = platform_driver_register(&NXP_PLATFORM_DRIVER);
	if (retval < 0)
		goto error_nxp;
#endif

#ifdef DAVINCI_PLATFORM_DRIVER
	retval = platform_driver_register(&DAVINCI_PLATFORM_DRIVER);
	if (retval < 0)
		goto error_davinci;
#endif

#ifdef SPEAR_PLATFORM_DRIVER
	retval = platform_driver_register(&SPEAR_PLATFORM_DRIVER);
	if (retval < 0)
		goto error_spear;
#endif

1399 1400 1401
	return retval;

	/* Error path */
1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429
#ifdef SPEAR_PLATFORM_DRIVER
	platform_driver_unregister(&SPEAR_PLATFORM_DRIVER);
 error_spear:
#endif
#ifdef DAVINCI_PLATFORM_DRIVER
	platform_driver_unregister(&DAVINCI_PLATFORM_DRIVER);
 error_davinci:
#endif
#ifdef NXP_PLATFORM_DRIVER
	platform_driver_unregister(&NXP_PLATFORM_DRIVER);
 error_nxp:
#endif
#ifdef AT91_PLATFORM_DRIVER
	platform_driver_unregister(&AT91_PLATFORM_DRIVER);
 error_at91:
#endif
#ifdef EP93XX_PLATFORM_DRIVER
	platform_driver_unregister(&EP93XX_PLATFORM_DRIVER);
 error_ep93xx:
#endif
#ifdef EXYNOS_PLATFORM_DRIVER
	platform_driver_unregister(&EXYNOS_PLATFORM_DRIVER);
 error_exynos:
#endif
#ifdef S3C2410_PLATFORM_DRIVER
	platform_driver_unregister(&S3C2410_PLATFORM_DRIVER);
 error_s3c2410:
#endif
1430 1431 1432 1433
#ifdef TMIO_OHCI_DRIVER
	platform_driver_unregister(&TMIO_OHCI_DRIVER);
 error_tmio:
#endif
1434
#ifdef SM501_OHCI_DRIVER
1435
	platform_driver_unregister(&SM501_OHCI_DRIVER);
1436 1437
 error_sm501:
#endif
1438 1439 1440
#ifdef SA1111_DRIVER
	sa1111_driver_unregister(&SA1111_DRIVER);
 error_sa1111:
1441
#endif
1442
#ifdef OF_PLATFORM_DRIVER
1443
	platform_driver_unregister(&OF_PLATFORM_DRIVER);
1444
 error_of_platform:
1445
#endif
1446 1447 1448
#ifdef OMAP3_PLATFORM_DRIVER
	platform_driver_unregister(&OMAP3_PLATFORM_DRIVER);
 error_omap3_platform:
G
Geoff Levand 已提交
1449
#endif
1450 1451 1452 1453
#ifdef OMAP1_PLATFORM_DRIVER
	platform_driver_unregister(&OMAP1_PLATFORM_DRIVER);
 error_omap1_platform:
#endif
1454 1455 1456
#ifdef PLATFORM_DRIVER
	platform_driver_unregister(&PLATFORM_DRIVER);
 error_platform:
1457
#endif
G
Geoff Levand 已提交
1458
#ifdef PS3_SYSTEM_BUS_DRIVER
G
Geoff Levand 已提交
1459
	ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
G
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1460
 error_ps3:
1461
#endif
1462 1463 1464 1465 1466 1467
#ifdef DEBUG
	debugfs_remove(ohci_debug_root);
	ohci_debug_root = NULL;
 error_debug:
#endif

1468
	clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1469 1470 1471 1472 1473 1474
	return retval;
}
module_init(ohci_hcd_mod_init);

static void __exit ohci_hcd_mod_exit(void)
{
1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495
#ifdef SPEAR_PLATFORM_DRIVER
	platform_driver_unregister(&SPEAR_PLATFORM_DRIVER);
#endif
#ifdef DAVINCI_PLATFORM_DRIVER
	platform_driver_unregister(&DAVINCI_PLATFORM_DRIVER);
#endif
#ifdef NXP_PLATFORM_DRIVER
	platform_driver_unregister(&NXP_PLATFORM_DRIVER);
#endif
#ifdef AT91_PLATFORM_DRIVER
	platform_driver_unregister(&AT91_PLATFORM_DRIVER);
#endif
#ifdef EP93XX_PLATFORM_DRIVER
	platform_driver_unregister(&EP93XX_PLATFORM_DRIVER);
#endif
#ifdef EXYNOS_PLATFORM_DRIVER
	platform_driver_unregister(&EXYNOS_PLATFORM_DRIVER);
#endif
#ifdef S3C2410_PLATFORM_DRIVER
	platform_driver_unregister(&S3C2410_PLATFORM_DRIVER);
#endif
1496 1497 1498
#ifdef TMIO_OHCI_DRIVER
	platform_driver_unregister(&TMIO_OHCI_DRIVER);
#endif
1499 1500 1501
#ifdef SM501_OHCI_DRIVER
	platform_driver_unregister(&SM501_OHCI_DRIVER);
#endif
1502 1503 1504
#ifdef SA1111_DRIVER
	sa1111_driver_unregister(&SA1111_DRIVER);
#endif
1505
#ifdef OF_PLATFORM_DRIVER
1506
	platform_driver_unregister(&OF_PLATFORM_DRIVER);
1507
#endif
1508 1509 1510
#ifdef OMAP3_PLATFORM_DRIVER
	platform_driver_unregister(&OMAP3_PLATFORM_DRIVER);
#endif
1511 1512 1513 1514 1515 1516
#ifdef OMAP1_PLATFORM_DRIVER
	platform_driver_unregister(&OMAP1_PLATFORM_DRIVER);
#endif
#ifdef PLATFORM_DRIVER
	platform_driver_unregister(&PLATFORM_DRIVER);
#endif
G
Geoff Levand 已提交
1517
#ifdef PS3_SYSTEM_BUS_DRIVER
G
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1518
	ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
G
Geoff Levand 已提交
1519
#endif
1520 1521 1522
#ifdef DEBUG
	debugfs_remove(ohci_debug_root);
#endif
1523
	clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1524 1525 1526
}
module_exit(ohci_hcd_mod_exit);