priv.c 36.5 KB
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// SPDX-License-Identifier: GPL-2.0
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/*
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 * handling privileged instructions
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 *
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 * Copyright IBM Corp. 2008, 2013
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 *
 *    Author(s): Carsten Otte <cotte@de.ibm.com>
 *               Christian Borntraeger <borntraeger@de.ibm.com>
 */

#include <linux/kvm.h>
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#include <linux/gfp.h>
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#include <linux/errno.h>
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#include <linux/compat.h>
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#include <linux/mm_types.h>

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#include <asm/asm-offsets.h>
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#include <asm/facility.h>
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#include <asm/current.h>
#include <asm/debug.h>
#include <asm/ebcdic.h>
#include <asm/sysinfo.h>
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#include <asm/pgtable.h>
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#include <asm/page-states.h>
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#include <asm/pgalloc.h>
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#include <asm/gmap.h>
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#include <asm/io.h>
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#include <asm/ptrace.h>
#include <asm/compat.h>
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#include <asm/sclp.h>
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#include "gaccess.h"
#include "kvm-s390.h"
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#include "trace.h"
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static int handle_ri(struct kvm_vcpu *vcpu)
{
	if (test_kvm_facility(vcpu->kvm, 64)) {
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		VCPU_EVENT(vcpu, 3, "%s", "ENABLE: RI (lazy)");
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		vcpu->arch.sie_block->ecb3 |= ECB3_RI;
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		kvm_s390_retry_instr(vcpu);
		return 0;
	} else
		return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
}

int kvm_s390_handle_aa(struct kvm_vcpu *vcpu)
{
	if ((vcpu->arch.sie_block->ipa & 0xf) <= 4)
		return handle_ri(vcpu);
	else
		return -EOPNOTSUPP;
}

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static int handle_gs(struct kvm_vcpu *vcpu)
{
	if (test_kvm_facility(vcpu->kvm, 133)) {
		VCPU_EVENT(vcpu, 3, "%s", "ENABLE: GS (lazy)");
		preempt_disable();
		__ctl_set_bit(2, 4);
		current->thread.gs_cb = (struct gs_cb *)&vcpu->run->s.regs.gscb;
		restore_gs_cb(current->thread.gs_cb);
		preempt_enable();
		vcpu->arch.sie_block->ecb |= ECB_GS;
		vcpu->arch.sie_block->ecd |= ECD_HOSTREGMGMT;
		vcpu->arch.gs_enabled = 1;
		kvm_s390_retry_instr(vcpu);
		return 0;
	} else
		return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
}

int kvm_s390_handle_e3(struct kvm_vcpu *vcpu)
{
	int code = vcpu->arch.sie_block->ipb & 0xff;

	if (code == 0x49 || code == 0x4d)
		return handle_gs(vcpu);
	else
		return -EOPNOTSUPP;
}
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/* Handle SCK (SET CLOCK) interception */
static int handle_set_clock(struct kvm_vcpu *vcpu)
{
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	int rc;
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	u8 ar;
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	u64 op2, val;
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	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

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	op2 = kvm_s390_get_base_disp_s(vcpu, &ar);
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	if (op2 & 7)	/* Operand must be on a doubleword boundary */
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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	rc = read_guest(vcpu, op2, ar, &val, sizeof(val));
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	if (rc)
		return kvm_s390_inject_prog_cond(vcpu, rc);
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	VCPU_EVENT(vcpu, 3, "SCK: setting guest TOD to 0x%llx", val);
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	kvm_s390_set_tod_clock(vcpu->kvm, val);
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	kvm_s390_set_psw_cc(vcpu, 0);
	return 0;
}

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static int handle_set_prefix(struct kvm_vcpu *vcpu)
{
	u64 operand2;
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	u32 address;
	int rc;
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	u8 ar;
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	vcpu->stat.instruction_spx++;

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	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

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	operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
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	/* must be word boundary */
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	if (operand2 & 3)
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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	/* get the value */
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	rc = read_guest(vcpu, operand2, ar, &address, sizeof(address));
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	if (rc)
		return kvm_s390_inject_prog_cond(vcpu, rc);

	address &= 0x7fffe000u;

	/*
	 * Make sure the new value is valid memory. We only need to check the
	 * first page, since address is 8k aligned and memory pieces are always
	 * at least 1MB aligned and have at least a size of 1MB.
	 */
	if (kvm_is_error_gpa(vcpu->kvm, address))
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		return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
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	kvm_s390_set_prefix(vcpu, address);
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	trace_kvm_s390_handle_prefix(vcpu, 1, address);
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	return 0;
}

static int handle_store_prefix(struct kvm_vcpu *vcpu)
{
	u64 operand2;
	u32 address;
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	int rc;
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	u8 ar;
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	vcpu->stat.instruction_stpx++;
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	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

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	operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
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	/* must be word boundary */
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	if (operand2 & 3)
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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	address = kvm_s390_get_prefix(vcpu);
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	/* get the value */
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	rc = write_guest(vcpu, operand2, ar, &address, sizeof(address));
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	if (rc)
		return kvm_s390_inject_prog_cond(vcpu, rc);
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	VCPU_EVENT(vcpu, 3, "STPX: storing prefix 0x%x into 0x%llx", address, operand2);
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	trace_kvm_s390_handle_prefix(vcpu, 0, address);
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	return 0;
}

static int handle_store_cpu_address(struct kvm_vcpu *vcpu)
{
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	u16 vcpu_id = vcpu->vcpu_id;
	u64 ga;
	int rc;
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	u8 ar;
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	vcpu->stat.instruction_stap++;
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	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

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	ga = kvm_s390_get_base_disp_s(vcpu, &ar);
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	if (ga & 1)
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		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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	rc = write_guest(vcpu, ga, ar, &vcpu_id, sizeof(vcpu_id));
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	if (rc)
		return kvm_s390_inject_prog_cond(vcpu, rc);
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	VCPU_EVENT(vcpu, 3, "STAP: storing cpu address (%u) to 0x%llx", vcpu_id, ga);
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	trace_kvm_s390_handle_stap(vcpu, ga);
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	return 0;
}

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int kvm_s390_skey_check_enable(struct kvm_vcpu *vcpu)
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{
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	int rc = 0;
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	struct kvm_s390_sie_block *sie_block = vcpu->arch.sie_block;
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	trace_kvm_s390_skey_related_inst(vcpu);
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	if (!(sie_block->ictl & (ICTL_ISKE | ICTL_SSKE | ICTL_RRBE)) &&
	    !(atomic_read(&sie_block->cpuflags) & CPUSTAT_KSS))
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		return rc;
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	rc = s390_enable_skey();
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	VCPU_EVENT(vcpu, 3, "enabling storage keys for guest: %d", rc);
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	if (!rc) {
		if (atomic_read(&sie_block->cpuflags) & CPUSTAT_KSS)
			atomic_andnot(CPUSTAT_KSS, &sie_block->cpuflags);
		else
			sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE |
					     ICTL_RRBE);
	}
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	return rc;
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}

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static int try_handle_skey(struct kvm_vcpu *vcpu)
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{
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	int rc;
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	vcpu->stat.instruction_storage_key++;
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	rc = kvm_s390_skey_check_enable(vcpu);
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	if (rc)
		return rc;
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	if (sclp.has_skey) {
		/* with storage-key facility, SIE interprets it for us */
		kvm_s390_retry_instr(vcpu);
		VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation");
		return -EAGAIN;
	}
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	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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	return 0;
}
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static int handle_iske(struct kvm_vcpu *vcpu)
{
	unsigned long addr;
	unsigned char key;
	int reg1, reg2;
	int rc;

	rc = try_handle_skey(vcpu);
	if (rc)
		return rc != -EAGAIN ? rc : 0;

	kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);

	addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
	addr = kvm_s390_logical_to_effective(vcpu, addr);
	addr = kvm_s390_real_to_abs(vcpu, addr);
	addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(addr));
	if (kvm_is_error_hva(addr))
		return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);

	down_read(&current->mm->mmap_sem);
	rc = get_guest_storage_key(current->mm, addr, &key);
	up_read(&current->mm->mmap_sem);
	if (rc)
		return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
	vcpu->run->s.regs.gprs[reg1] &= ~0xff;
	vcpu->run->s.regs.gprs[reg1] |= key;
	return 0;
}

static int handle_rrbe(struct kvm_vcpu *vcpu)
{
	unsigned long addr;
	int reg1, reg2;
	int rc;

	rc = try_handle_skey(vcpu);
	if (rc)
		return rc != -EAGAIN ? rc : 0;

	kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);

	addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
	addr = kvm_s390_logical_to_effective(vcpu, addr);
	addr = kvm_s390_real_to_abs(vcpu, addr);
	addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(addr));
	if (kvm_is_error_hva(addr))
		return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);

	down_read(&current->mm->mmap_sem);
	rc = reset_guest_reference_bit(current->mm, addr);
	up_read(&current->mm->mmap_sem);
	if (rc < 0)
		return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);

	kvm_s390_set_psw_cc(vcpu, rc);
	return 0;
}

#define SSKE_NQ 0x8
#define SSKE_MR 0x4
#define SSKE_MC 0x2
#define SSKE_MB 0x1
static int handle_sske(struct kvm_vcpu *vcpu)
{
	unsigned char m3 = vcpu->arch.sie_block->ipb >> 28;
	unsigned long start, end;
	unsigned char key, oldkey;
	int reg1, reg2;
	int rc;

	rc = try_handle_skey(vcpu);
	if (rc)
		return rc != -EAGAIN ? rc : 0;

	if (!test_kvm_facility(vcpu->kvm, 8))
		m3 &= ~SSKE_MB;
	if (!test_kvm_facility(vcpu->kvm, 10))
		m3 &= ~(SSKE_MC | SSKE_MR);
	if (!test_kvm_facility(vcpu->kvm, 14))
		m3 &= ~SSKE_NQ;

	kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);

	key = vcpu->run->s.regs.gprs[reg1] & 0xfe;
	start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
	start = kvm_s390_logical_to_effective(vcpu, start);
	if (m3 & SSKE_MB) {
		/* start already designates an absolute address */
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		end = (start + _SEGMENT_SIZE) & ~(_SEGMENT_SIZE - 1);
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	} else {
		start = kvm_s390_real_to_abs(vcpu, start);
		end = start + PAGE_SIZE;
	}

	while (start != end) {
		unsigned long addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start));

		if (kvm_is_error_hva(addr))
			return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);

		down_read(&current->mm->mmap_sem);
		rc = cond_set_guest_storage_key(current->mm, addr, key, &oldkey,
						m3 & SSKE_NQ, m3 & SSKE_MR,
						m3 & SSKE_MC);
		up_read(&current->mm->mmap_sem);
		if (rc < 0)
			return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
		start += PAGE_SIZE;
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	}
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	if (m3 & (SSKE_MC | SSKE_MR)) {
		if (m3 & SSKE_MB) {
			/* skey in reg1 is unpredictable */
			kvm_s390_set_psw_cc(vcpu, 3);
		} else {
			kvm_s390_set_psw_cc(vcpu, rc);
			vcpu->run->s.regs.gprs[reg1] &= ~0xff00UL;
			vcpu->run->s.regs.gprs[reg1] |= (u64) oldkey << 8;
		}
	}
	if (m3 & SSKE_MB) {
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		if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT)
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			vcpu->run->s.regs.gprs[reg2] &= ~PAGE_MASK;
		else
			vcpu->run->s.regs.gprs[reg2] &= ~0xfffff000UL;
		end = kvm_s390_logical_to_effective(vcpu, end);
		vcpu->run->s.regs.gprs[reg2] |= end;
	}
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	return 0;
}

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static int handle_ipte_interlock(struct kvm_vcpu *vcpu)
{
	vcpu->stat.instruction_ipte_interlock++;
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	if (psw_bits(vcpu->arch.sie_block->gpsw).pstate)
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		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
	wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu));
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	kvm_s390_retry_instr(vcpu);
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	VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation");
	return 0;
}

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static int handle_test_block(struct kvm_vcpu *vcpu)
{
	gpa_t addr;
	int reg2;

	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

	kvm_s390_get_regs_rre(vcpu, NULL, &reg2);
	addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
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	addr = kvm_s390_logical_to_effective(vcpu, addr);
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	if (kvm_s390_check_low_addr_prot_real(vcpu, addr))
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		return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
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	addr = kvm_s390_real_to_abs(vcpu, addr);

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	if (kvm_is_error_gpa(vcpu->kvm, addr))
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		return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
	/*
	 * We don't expect errors on modern systems, and do not care
	 * about storage keys (yet), so let's just clear the page.
	 */
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	if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE))
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		return -EFAULT;
	kvm_s390_set_psw_cc(vcpu, 0);
	vcpu->run->s.regs.gprs[0] = 0;
	return 0;
}

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static int handle_tpi(struct kvm_vcpu *vcpu)
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{
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	struct kvm_s390_interrupt_info *inti;
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	unsigned long len;
	u32 tpi_data[3];
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	int rc;
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	u64 addr;
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	u8 ar;
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	addr = kvm_s390_get_base_disp_s(vcpu, &ar);
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	if (addr & 3)
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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	inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0);
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	if (!inti) {
		kvm_s390_set_psw_cc(vcpu, 0);
		return 0;
	}

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	tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr;
	tpi_data[1] = inti->io.io_int_parm;
	tpi_data[2] = inti->io.io_int_word;
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	if (addr) {
		/*
		 * Store the two-word I/O interruption code into the
		 * provided area.
		 */
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		len = sizeof(tpi_data) - 4;
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		rc = write_guest(vcpu, addr, ar, &tpi_data, len);
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		if (rc) {
			rc = kvm_s390_inject_prog_cond(vcpu, rc);
			goto reinject_interrupt;
		}
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	} else {
		/*
		 * Store the three-word I/O interruption code into
		 * the appropriate lowcore area.
		 */
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		len = sizeof(tpi_data);
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		if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len)) {
			/* failed writes to the low core are not recoverable */
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			rc = -EFAULT;
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			goto reinject_interrupt;
		}
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	}
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	/* irq was successfully handed to the guest */
	kfree(inti);
	kvm_s390_set_psw_cc(vcpu, 1);
	return 0;
reinject_interrupt:
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	/*
	 * If we encounter a problem storing the interruption code, the
	 * instruction is suppressed from the guest's view: reinject the
	 * interrupt.
	 */
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	if (kvm_s390_reinject_io_int(vcpu->kvm, inti)) {
		kfree(inti);
		rc = -EFAULT;
	}
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	/* don't set the cc, a pgm irq was injected or we drop to user space */
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	return rc ? -EFAULT : 0;
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}

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static int handle_tsch(struct kvm_vcpu *vcpu)
{
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	struct kvm_s390_interrupt_info *inti = NULL;
	const u64 isc_mask = 0xffUL << 24; /* all iscs set */
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	/* a valid schid has at least one bit set */
	if (vcpu->run->s.regs.gprs[1])
		inti = kvm_s390_get_io_int(vcpu->kvm, isc_mask,
					   vcpu->run->s.regs.gprs[1]);
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	/*
	 * Prepare exit to userspace.
	 * We indicate whether we dequeued a pending I/O interrupt
	 * so that userspace can re-inject it if the instruction gets
	 * a program check. While this may re-order the pending I/O
	 * interrupts, this is no problem since the priority is kept
	 * intact.
	 */
	vcpu->run->exit_reason = KVM_EXIT_S390_TSCH;
	vcpu->run->s390_tsch.dequeued = !!inti;
	if (inti) {
		vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id;
		vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr;
		vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm;
		vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word;
	}
	vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb;
	kfree(inti);
	return -EREMOTE;
}

static int handle_io_inst(struct kvm_vcpu *vcpu)
{
	VCPU_EVENT(vcpu, 4, "%s", "I/O instruction");

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	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

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	if (vcpu->kvm->arch.css_support) {
		/*
		 * Most I/O instructions will be handled by userspace.
		 * Exceptions are tpi and the interrupt portion of tsch.
		 */
		if (vcpu->arch.sie_block->ipa == 0xb236)
			return handle_tpi(vcpu);
		if (vcpu->arch.sie_block->ipa == 0xb235)
			return handle_tsch(vcpu);
		/* Handle in userspace. */
		return -EOPNOTSUPP;
	} else {
		/*
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		 * Set condition code 3 to stop the guest from issuing channel
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		 * I/O instructions.
		 */
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		kvm_s390_set_psw_cc(vcpu, 3);
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		return 0;
	}
}

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static int handle_stfl(struct kvm_vcpu *vcpu)
{
	int rc;
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	unsigned int fac;
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	vcpu->stat.instruction_stfl++;
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	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

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	/*
	 * We need to shift the lower 32 facility bits (bit 0-31) from a u64
	 * into a u32 memory representation. They will remain bits 0-31.
	 */
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	fac = *vcpu->kvm->arch.model.fac_list >> 32;
549
	rc = write_guest_lc(vcpu, offsetof(struct lowcore, stfl_fac_list),
550
			    &fac, sizeof(fac));
551
	if (rc)
552
		return rc;
553
	VCPU_EVENT(vcpu, 3, "STFL: store facility list 0x%x", fac);
554
	trace_kvm_s390_handle_stfl(vcpu, fac);
555 556 557
	return 0;
}

558 559
#define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA)
#define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL
560
#define PSW_ADDR_24 0x0000000000ffffffUL
561 562
#define PSW_ADDR_31 0x000000007fffffffUL

T
Thomas Huth 已提交
563 564
int is_valid_psw(psw_t *psw)
{
565 566 567 568 569 570 571 572 573 574
	if (psw->mask & PSW_MASK_UNASSIGNED)
		return 0;
	if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) {
		if (psw->addr & ~PSW_ADDR_31)
			return 0;
	}
	if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24))
		return 0;
	if ((psw->mask & PSW_MASK_ADDR_MODE) ==  PSW_MASK_EA)
		return 0;
T
Thomas Huth 已提交
575 576
	if (psw->addr & 1)
		return 0;
577 578 579
	return 1;
}

580 581
int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu)
{
582
	psw_t *gpsw = &vcpu->arch.sie_block->gpsw;
583
	psw_compat_t new_psw;
584
	u64 addr;
585
	int rc;
586
	u8 ar;
587

588
	if (gpsw->mask & PSW_MASK_PSTATE)
589 590
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

591
	addr = kvm_s390_get_base_disp_s(vcpu, &ar);
592 593
	if (addr & 7)
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
594

595
	rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
596 597
	if (rc)
		return kvm_s390_inject_prog_cond(vcpu, rc);
598 599
	if (!(new_psw.mask & PSW32_MASK_BASE))
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
600 601 602 603
	gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32;
	gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE;
	gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE;
	if (!is_valid_psw(gpsw))
604
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
605 606 607 608 609 610
	return 0;
}

static int handle_lpswe(struct kvm_vcpu *vcpu)
{
	psw_t new_psw;
611
	u64 addr;
612
	int rc;
613
	u8 ar;
614

615 616 617
	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

618
	addr = kvm_s390_get_base_disp_s(vcpu, &ar);
619 620
	if (addr & 7)
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
621
	rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
622 623
	if (rc)
		return kvm_s390_inject_prog_cond(vcpu, rc);
624 625
	vcpu->arch.sie_block->gpsw = new_psw;
	if (!is_valid_psw(&vcpu->arch.sie_block->gpsw))
626
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
627 628 629
	return 0;
}

630 631
static int handle_stidp(struct kvm_vcpu *vcpu)
{
632
	u64 stidp_data = vcpu->kvm->arch.model.cpuid;
633
	u64 operand2;
634
	int rc;
635
	u8 ar;
636 637

	vcpu->stat.instruction_stidp++;
638

639 640 641
	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

642
	operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
643

644 645
	if (operand2 & 7)
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
646

647
	rc = write_guest(vcpu, operand2, ar, &stidp_data, sizeof(stidp_data));
648 649
	if (rc)
		return kvm_s390_inject_prog_cond(vcpu, rc);
650

651
	VCPU_EVENT(vcpu, 3, "STIDP: store cpu id 0x%llx", stidp_data);
652 653 654 655 656 657 658 659
	return 0;
}

static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem)
{
	int cpus = 0;
	int n;

660
	cpus = atomic_read(&vcpu->kvm->online_vcpus);
661 662

	/* deal with other level 3 hypervisors */
663
	if (stsi(mem, 3, 2, 2))
664 665 666 667 668 669
		mem->count = 0;
	if (mem->count < 8)
		mem->count++;
	for (n = mem->count - 1; n > 0 ; n--)
		memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0]));

670
	memset(&mem->vm[0], 0, sizeof(mem->vm[0]));
671 672 673 674 675 676 677 678 679 680 681
	mem->vm[0].cpus_total = cpus;
	mem->vm[0].cpus_configured = cpus;
	mem->vm[0].cpus_standby = 0;
	mem->vm[0].cpus_reserved = 0;
	mem->vm[0].caf = 1000;
	memcpy(mem->vm[0].name, "KVMguest", 8);
	ASCEBC(mem->vm[0].name, 8);
	memcpy(mem->vm[0].cpi, "KVM/Linux       ", 16);
	ASCEBC(mem->vm[0].cpi, 16);
}

682
static void insert_stsi_usr_data(struct kvm_vcpu *vcpu, u64 addr, u8 ar,
683 684 685 686 687 688 689 690 691 692
				 u8 fc, u8 sel1, u16 sel2)
{
	vcpu->run->exit_reason = KVM_EXIT_S390_STSI;
	vcpu->run->s390_stsi.addr = addr;
	vcpu->run->s390_stsi.ar = ar;
	vcpu->run->s390_stsi.fc = fc;
	vcpu->run->s390_stsi.sel1 = sel1;
	vcpu->run->s390_stsi.sel2 = sel2;
}

693 694
static int handle_stsi(struct kvm_vcpu *vcpu)
{
695 696 697
	int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28;
	int sel1 = vcpu->run->s.regs.gprs[0] & 0xff;
	int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff;
698
	unsigned long mem = 0;
699
	u64 operand2;
700
	int rc = 0;
701
	u8 ar;
702 703

	vcpu->stat.instruction_stsi++;
704
	VCPU_EVENT(vcpu, 3, "STSI: fc: %u sel1: %u sel2: %u", fc, sel1, sel2);
705

706 707 708
	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

709
	if (fc > 3) {
710
		kvm_s390_set_psw_cc(vcpu, 3);
711 712
		return 0;
	}
713

714 715
	if (vcpu->run->s.regs.gprs[0] & 0x0fffff00
	    || vcpu->run->s.regs.gprs[1] & 0xffff0000)
716 717
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);

718
	if (fc == 0) {
719
		vcpu->run->s.regs.gprs[0] = 3 << 28;
720
		kvm_s390_set_psw_cc(vcpu, 0);
721
		return 0;
722 723
	}

724
	operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
725 726 727 728 729

	if (operand2 & 0xfff)
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);

	switch (fc) {
730 731 732 733
	case 1: /* same handling for 1 and 2 */
	case 2:
		mem = get_zeroed_page(GFP_KERNEL);
		if (!mem)
734
			goto out_no_data;
735
		if (stsi((void *) mem, fc, sel1, sel2))
736
			goto out_no_data;
737 738 739
		break;
	case 3:
		if (sel1 != 2 || sel2 != 2)
740
			goto out_no_data;
741 742
		mem = get_zeroed_page(GFP_KERNEL);
		if (!mem)
743
			goto out_no_data;
744 745 746 747
		handle_stsi_3_2_2(vcpu, (void *) mem);
		break;
	}

748
	rc = write_guest(vcpu, operand2, ar, (void *)mem, PAGE_SIZE);
749 750 751
	if (rc) {
		rc = kvm_s390_inject_prog_cond(vcpu, rc);
		goto out;
752
	}
753 754 755 756
	if (vcpu->kvm->arch.user_stsi) {
		insert_stsi_usr_data(vcpu, operand2, ar, fc, sel1, sel2);
		rc = -EREMOTE;
	}
757
	trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2);
758
	free_page(mem);
759
	kvm_s390_set_psw_cc(vcpu, 0);
760
	vcpu->run->s.regs.gprs[0] = 0;
761
	return rc;
762
out_no_data:
763
	kvm_s390_set_psw_cc(vcpu, 3);
764
out:
765
	free_page(mem);
766
	return rc;
767 768
}

769
static const intercept_handler_t b2_handlers[256] = {
770
	[0x02] = handle_stidp,
771
	[0x04] = handle_set_clock,
772 773 774
	[0x10] = handle_set_prefix,
	[0x11] = handle_store_prefix,
	[0x12] = handle_store_cpu_address,
775
	[0x14] = kvm_s390_handle_vsie,
776
	[0x21] = handle_ipte_interlock,
777 778 779
	[0x29] = handle_iske,
	[0x2a] = handle_rrbe,
	[0x2b] = handle_sske,
T
Thomas Huth 已提交
780
	[0x2c] = handle_test_block,
781 782 783 784 785 786 787 788 789 790 791 792 793
	[0x30] = handle_io_inst,
	[0x31] = handle_io_inst,
	[0x32] = handle_io_inst,
	[0x33] = handle_io_inst,
	[0x34] = handle_io_inst,
	[0x35] = handle_io_inst,
	[0x36] = handle_io_inst,
	[0x37] = handle_io_inst,
	[0x38] = handle_io_inst,
	[0x39] = handle_io_inst,
	[0x3a] = handle_io_inst,
	[0x3b] = handle_io_inst,
	[0x3c] = handle_io_inst,
794
	[0x50] = handle_ipte_interlock,
795
	[0x56] = handle_sthyi,
796 797 798
	[0x5f] = handle_io_inst,
	[0x74] = handle_io_inst,
	[0x76] = handle_io_inst,
799 800
	[0x7d] = handle_stsi,
	[0xb1] = handle_stfl,
801
	[0xb2] = handle_lpswe,
802 803
};

804
int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
805 806 807
{
	intercept_handler_t handler;

808
	/*
809 810 811 812
	 * A lot of B2 instructions are priviledged. Here we check for
	 * the privileged ones, that we can handle in the kernel.
	 * Anything else goes to userspace.
	 */
813
	handler = b2_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
814 815 816
	if (handler)
		return handler(vcpu);

817
	return -EOPNOTSUPP;
818
}
819

820 821 822 823
static int handle_epsw(struct kvm_vcpu *vcpu)
{
	int reg1, reg2;

824
	kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
825 826

	/* This basically extracts the mask half of the psw. */
827
	vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL;
828 829
	vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32;
	if (reg2) {
830
		vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL;
831
		vcpu->run->s.regs.gprs[reg2] |=
832
			vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL;
833 834 835 836
	}
	return 0;
}

837 838 839 840 841 842 843 844 845 846 847 848
#define PFMF_RESERVED   0xfffc0101UL
#define PFMF_SK         0x00020000UL
#define PFMF_CF         0x00010000UL
#define PFMF_UI         0x00008000UL
#define PFMF_FSC        0x00007000UL
#define PFMF_NQ         0x00000800UL
#define PFMF_MR         0x00000400UL
#define PFMF_MC         0x00000200UL
#define PFMF_KEY        0x000000feUL

static int handle_pfmf(struct kvm_vcpu *vcpu)
{
849
	bool mr = false, mc = false, nq;
850 851
	int reg1, reg2;
	unsigned long start, end;
852
	unsigned char key;
853 854 855 856 857

	vcpu->stat.instruction_pfmf++;

	kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);

858
	if (!test_kvm_facility(vcpu->kvm, 8))
859 860 861
		return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);

	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
862
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
863 864 865 866

	if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED)
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);

867 868 869
	/* Only provide non-quiescing support if enabled for the guest */
	if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ &&
	    !test_kvm_facility(vcpu->kvm, 14))
870 871
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);

872 873 874 875 876 877 878 879 880
	/* Only provide conditional-SSKE support if enabled for the guest */
	if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK &&
	    test_kvm_facility(vcpu->kvm, 10)) {
		mr = vcpu->run->s.regs.gprs[reg1] & PFMF_MR;
		mc = vcpu->run->s.regs.gprs[reg1] & PFMF_MC;
	}

	nq = vcpu->run->s.regs.gprs[reg1] & PFMF_NQ;
	key = vcpu->run->s.regs.gprs[reg1] & PFMF_KEY;
881
	start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
882
	start = kvm_s390_logical_to_effective(vcpu, start);
T
Thomas Huth 已提交
883

884 885 886 887 888
	if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
		if (kvm_s390_check_low_addr_prot_real(vcpu, start))
			return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
	}

889 890
	switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
	case 0x00000000:
891 892
		/* only 4k frames specify a real address */
		start = kvm_s390_real_to_abs(vcpu, start);
893
		end = (start + PAGE_SIZE) & ~(PAGE_SIZE - 1);
894 895
		break;
	case 0x00001000:
896
		end = (start + _SEGMENT_SIZE) & ~(_SEGMENT_SIZE - 1);
897 898
		break;
	case 0x00002000:
899 900 901
		/* only support 2G frame size if EDAT2 is available and we are
		   not in 24-bit addressing mode */
		if (!test_kvm_facility(vcpu->kvm, 78) ||
H
Heiko Carstens 已提交
902
		    psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_24BIT)
903
			return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
904
		end = (start + _REGION3_SIZE) & ~(_REGION3_SIZE - 1);
905
		break;
906 907 908
	default:
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
	}
909

910
	while (start != end) {
911
		unsigned long useraddr;
T
Thomas Huth 已提交
912 913

		/* Translate guest address to host address */
914
		useraddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start));
T
Thomas Huth 已提交
915
		if (kvm_is_error_hva(useraddr))
916 917 918 919 920 921 922 923
			return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);

		if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
			if (clear_user((void __user *)useraddr, PAGE_SIZE))
				return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
		}

		if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) {
924
			int rc = kvm_s390_skey_check_enable(vcpu);
925 926 927

			if (rc)
				return rc;
928
			down_read(&current->mm->mmap_sem);
929 930
			rc = cond_set_guest_storage_key(current->mm, useraddr,
							key, NULL, nq, mr, mc);
931
			up_read(&current->mm->mmap_sem);
932
			if (rc < 0)
933 934 935 936 937
				return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
		}

		start += PAGE_SIZE;
	}
938
	if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
H
Heiko Carstens 已提交
939
		if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT) {
940 941 942 943 944 945 946
			vcpu->run->s.regs.gprs[reg2] = end;
		} else {
			vcpu->run->s.regs.gprs[reg2] &= ~0xffffffffUL;
			end = kvm_s390_logical_to_effective(vcpu, end);
			vcpu->run->s.regs.gprs[reg2] |= end;
		}
	}
947 948 949
	return 0;
}

950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987
static inline int do_essa(struct kvm_vcpu *vcpu, const int orc)
{
	struct kvm_s390_migration_state *ms = vcpu->kvm->arch.migration_state;
	int r1, r2, nappended, entries;
	unsigned long gfn, hva, res, pgstev, ptev;
	unsigned long *cbrlo;

	/*
	 * We don't need to set SD.FPF.SK to 1 here, because if we have a
	 * machine check here we either handle it or crash
	 */

	kvm_s390_get_regs_rre(vcpu, &r1, &r2);
	gfn = vcpu->run->s.regs.gprs[r2] >> PAGE_SHIFT;
	hva = gfn_to_hva(vcpu->kvm, gfn);
	entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;

	if (kvm_is_error_hva(hva))
		return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);

	nappended = pgste_perform_essa(vcpu->kvm->mm, hva, orc, &ptev, &pgstev);
	if (nappended < 0) {
		res = orc ? 0x10 : 0;
		vcpu->run->s.regs.gprs[r1] = res; /* Exception Indication */
		return 0;
	}
	res = (pgstev & _PGSTE_GPS_USAGE_MASK) >> 22;
	/*
	 * Set the block-content state part of the result. 0 means resident, so
	 * nothing to do if the page is valid. 2 is for preserved pages
	 * (non-present and non-zero), and 3 for zero pages (non-present and
	 * zero).
	 */
	if (ptev & _PAGE_INVALID) {
		res |= 2;
		if (pgstev & _PGSTE_GPS_ZERO)
			res |= 1;
	}
988 989
	if (pgstev & _PGSTE_GPS_NODAT)
		res |= 0x20;
990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010
	vcpu->run->s.regs.gprs[r1] = res;
	/*
	 * It is possible that all the normal 511 slots were full, in which case
	 * we will now write in the 512th slot, which is reserved for host use.
	 * In both cases we let the normal essa handling code process all the
	 * slots, including the reserved one, if needed.
	 */
	if (nappended > 0) {
		cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo & PAGE_MASK);
		cbrlo[entries] = gfn << PAGE_SHIFT;
	}

	if (orc) {
		/* increment only if we are really flipping the bit to 1 */
		if (!test_and_set_bit(gfn, ms->pgste_bitmap))
			atomic64_inc(&ms->dirty_pages);
	}

	return nappended;
}

1011 1012 1013 1014
static int handle_essa(struct kvm_vcpu *vcpu)
{
	/* entries expected to be 1FF */
	int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
1015
	unsigned long *cbrlo;
1016
	struct gmap *gmap;
1017
	int i, orc;
1018

1019
	VCPU_EVENT(vcpu, 4, "ESSA: release %d pages", entries);
1020 1021
	gmap = vcpu->arch.gmap;
	vcpu->stat.instruction_essa++;
1022
	if (!vcpu->kvm->arch.use_cmma)
1023 1024 1025 1026
		return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);

	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1027 1028
	/* Check for invalid operation request code */
	orc = (vcpu->arch.sie_block->ipb & 0xf0000000) >> 28;
1029 1030 1031
	/* ORCs 0-6 are always valid */
	if (orc > (test_kvm_facility(vcpu->kvm, 147) ? ESSA_SET_STABLE_NODAT
						: ESSA_SET_STABLE_IF_RESIDENT))
1032 1033
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);

1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067
	if (likely(!vcpu->kvm->arch.migration_state)) {
		/*
		 * CMMA is enabled in the KVM settings, but is disabled in
		 * the SIE block and in the mm_context, and we are not doing
		 * a migration. Enable CMMA in the mm_context.
		 * Since we need to take a write lock to write to the context
		 * to avoid races with storage keys handling, we check if the
		 * value really needs to be written to; if the value is
		 * already correct, we do nothing and avoid the lock.
		 */
		if (vcpu->kvm->mm->context.use_cmma == 0) {
			down_write(&vcpu->kvm->mm->mmap_sem);
			vcpu->kvm->mm->context.use_cmma = 1;
			up_write(&vcpu->kvm->mm->mmap_sem);
		}
		/*
		 * If we are here, we are supposed to have CMMA enabled in
		 * the SIE block. Enabling CMMA works on a per-CPU basis,
		 * while the context use_cmma flag is per process.
		 * It's possible that the context flag is enabled and the
		 * SIE flag is not, so we set the flag always; if it was
		 * already set, nothing changes, otherwise we enable it
		 * on this CPU too.
		 */
		vcpu->arch.sie_block->ecb2 |= ECB2_CMMA;
		/* Retry the ESSA instruction */
		kvm_s390_retry_instr(vcpu);
	} else {
		/* Account for the possible extra cbrl entry */
		i = do_essa(vcpu, orc);
		if (i < 0)
			return i;
		entries += i;
	}
1068 1069 1070
	vcpu->arch.sie_block->cbrlo &= PAGE_MASK;	/* reset nceo */
	cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo);
	down_read(&gmap->mm->mmap_sem);
1071 1072
	for (i = 0; i < entries; ++i)
		__gmap_zap(gmap, cbrlo[i]);
1073 1074 1075 1076
	up_read(&gmap->mm->mmap_sem);
	return 0;
}

1077
static const intercept_handler_t b9_handlers[256] = {
1078
	[0x8a] = handle_ipte_interlock,
1079
	[0x8d] = handle_epsw,
1080 1081
	[0x8e] = handle_ipte_interlock,
	[0x8f] = handle_ipte_interlock,
1082
	[0xab] = handle_essa,
1083
	[0xaf] = handle_pfmf,
1084 1085 1086 1087 1088 1089 1090 1091
};

int kvm_s390_handle_b9(struct kvm_vcpu *vcpu)
{
	intercept_handler_t handler;

	/* This is handled just as for the B2 instructions. */
	handler = b9_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
1092 1093 1094
	if (handler)
		return handler(vcpu);

1095 1096 1097
	return -EOPNOTSUPP;
}

1098 1099 1100 1101
int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu)
{
	int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
	int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
1102 1103
	int reg, rc, nr_regs;
	u32 ctl_array[16];
1104
	u64 ga;
1105
	u8 ar;
1106 1107 1108 1109 1110 1111

	vcpu->stat.instruction_lctl++;

	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

1112
	ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
1113

1114
	if (ga & 3)
1115 1116
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);

1117
	VCPU_EVENT(vcpu, 4, "LCTL: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
1118
	trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga);
1119

1120
	nr_regs = ((reg3 - reg1) & 0xf) + 1;
1121
	rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
1122 1123
	if (rc)
		return kvm_s390_inject_prog_cond(vcpu, rc);
1124
	reg = reg1;
1125
	nr_regs = 0;
1126 1127
	do {
		vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul;
1128
		vcpu->arch.sie_block->gcr[reg] |= ctl_array[nr_regs++];
1129 1130 1131 1132
		if (reg == reg3)
			break;
		reg = (reg + 1) % 16;
	} while (1);
1133
	kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
1134 1135 1136
	return 0;
}

1137 1138 1139 1140
int kvm_s390_handle_stctl(struct kvm_vcpu *vcpu)
{
	int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
	int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
1141 1142
	int reg, rc, nr_regs;
	u32 ctl_array[16];
1143
	u64 ga;
1144
	u8 ar;
1145 1146 1147 1148 1149 1150

	vcpu->stat.instruction_stctl++;

	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

1151
	ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
1152 1153 1154 1155

	if (ga & 3)
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);

1156
	VCPU_EVENT(vcpu, 4, "STCTL r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
1157 1158 1159
	trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga);

	reg = reg1;
1160
	nr_regs = 0;
1161
	do {
1162
		ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
1163 1164 1165 1166
		if (reg == reg3)
			break;
		reg = (reg + 1) % 16;
	} while (1);
1167
	rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
1168
	return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
1169 1170
}

1171 1172 1173 1174
static int handle_lctlg(struct kvm_vcpu *vcpu)
{
	int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
	int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
1175 1176 1177
	int reg, rc, nr_regs;
	u64 ctl_array[16];
	u64 ga;
1178
	u8 ar;
1179 1180 1181 1182 1183 1184

	vcpu->stat.instruction_lctlg++;

	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

1185
	ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
1186

1187
	if (ga & 7)
1188 1189
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);

1190
	VCPU_EVENT(vcpu, 4, "LCTLG: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
1191
	trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga);
1192

1193
	nr_regs = ((reg3 - reg1) & 0xf) + 1;
1194
	rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
1195 1196 1197 1198
	if (rc)
		return kvm_s390_inject_prog_cond(vcpu, rc);
	reg = reg1;
	nr_regs = 0;
1199
	do {
1200
		vcpu->arch.sie_block->gcr[reg] = ctl_array[nr_regs++];
1201 1202 1203 1204
		if (reg == reg3)
			break;
		reg = (reg + 1) % 16;
	} while (1);
1205
	kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
1206 1207 1208
	return 0;
}

1209 1210 1211 1212
static int handle_stctg(struct kvm_vcpu *vcpu)
{
	int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
	int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
1213 1214 1215
	int reg, rc, nr_regs;
	u64 ctl_array[16];
	u64 ga;
1216
	u8 ar;
1217 1218 1219 1220 1221 1222

	vcpu->stat.instruction_stctg++;

	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

1223
	ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
1224 1225 1226 1227

	if (ga & 7)
		return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);

1228
	VCPU_EVENT(vcpu, 4, "STCTG r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
1229 1230
	trace_kvm_s390_handle_stctl(vcpu, 1, reg1, reg3, ga);

1231 1232
	reg = reg1;
	nr_regs = 0;
1233
	do {
1234
		ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
1235 1236 1237 1238
		if (reg == reg3)
			break;
		reg = (reg + 1) % 16;
	} while (1);
1239
	rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
1240
	return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
1241 1242
}

1243
static const intercept_handler_t eb_handlers[256] = {
1244
	[0x2f] = handle_lctlg,
1245
	[0x25] = handle_stctg,
F
Fan Zhang 已提交
1246 1247 1248
	[0x60] = handle_ri,
	[0x61] = handle_ri,
	[0x62] = handle_ri,
1249 1250
};

1251
int kvm_s390_handle_eb(struct kvm_vcpu *vcpu)
1252 1253 1254 1255 1256 1257 1258 1259 1260
{
	intercept_handler_t handler;

	handler = eb_handlers[vcpu->arch.sie_block->ipb & 0xff];
	if (handler)
		return handler(vcpu);
	return -EOPNOTSUPP;
}

1261 1262
static int handle_tprot(struct kvm_vcpu *vcpu)
{
1263
	u64 address1, address2;
1264 1265 1266
	unsigned long hva, gpa;
	int ret = 0, cc = 0;
	bool writable;
1267
	u8 ar;
1268 1269 1270

	vcpu->stat.instruction_tprot++;

1271 1272 1273
	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

1274
	kvm_s390_get_base_disp_sse(vcpu, &address1, &address2, &ar, NULL);
1275

1276 1277 1278 1279 1280 1281
	/* we only handle the Linux memory detection case:
	 * access key == 0
	 * everything else goes to userspace. */
	if (address2 & 0xf0)
		return -EOPNOTSUPP;
	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
1282
		ipte_lock(vcpu);
1283
	ret = guest_translate_address(vcpu, address1, ar, &gpa, GACC_STORE);
1284 1285 1286
	if (ret == PGM_PROTECTION) {
		/* Write protected? Try again with read-only... */
		cc = 1;
1287 1288
		ret = guest_translate_address(vcpu, address1, ar, &gpa,
					      GACC_FETCH);
1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299
	}
	if (ret) {
		if (ret == PGM_ADDRESSING || ret == PGM_TRANSLATION_SPEC) {
			ret = kvm_s390_inject_program_int(vcpu, ret);
		} else if (ret > 0) {
			/* Translation not available */
			kvm_s390_set_psw_cc(vcpu, 3);
			ret = 0;
		}
		goto out_unlock;
	}
1300

1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313
	hva = gfn_to_hva_prot(vcpu->kvm, gpa_to_gfn(gpa), &writable);
	if (kvm_is_error_hva(hva)) {
		ret = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
	} else {
		if (!writable)
			cc = 1;		/* Write not permitted ==> read-only */
		kvm_s390_set_psw_cc(vcpu, cc);
		/* Note: CC2 only occurs for storage keys (not supported yet) */
	}
out_unlock:
	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
		ipte_unlock(vcpu);
	return ret;
1314 1315 1316 1317 1318 1319 1320 1321 1322 1323
}

int kvm_s390_handle_e5(struct kvm_vcpu *vcpu)
{
	/* For e5xx... instructions we only handle TPROT */
	if ((vcpu->arch.sie_block->ipa & 0x00ff) == 0x01)
		return handle_tprot(vcpu);
	return -EOPNOTSUPP;
}

1324 1325 1326 1327 1328
static int handle_sckpf(struct kvm_vcpu *vcpu)
{
	u32 value;

	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1329
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340

	if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000)
		return kvm_s390_inject_program_int(vcpu,
						   PGM_SPECIFICATION);

	value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff;
	vcpu->arch.sie_block->todpr = value;

	return 0;
}

1341 1342 1343 1344 1345 1346 1347
static int handle_ptff(struct kvm_vcpu *vcpu)
{
	/* we don't emulate any control instructions yet */
	kvm_s390_set_psw_cc(vcpu, 3);
	return 0;
}

1348
static const intercept_handler_t x01_handlers[256] = {
1349
	[0x04] = handle_ptff,
1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361
	[0x07] = handle_sckpf,
};

int kvm_s390_handle_01(struct kvm_vcpu *vcpu)
{
	intercept_handler_t handler;

	handler = x01_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
	if (handler)
		return handler(vcpu);
	return -EOPNOTSUPP;
}