ixgbevf_main.c 98.3 KB
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/*******************************************************************************

  Intel 82599 Virtual Function driver
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  Copyright(c) 1999 - 2012 Intel Corporation.
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  This program is free software; you can redistribute it and/or modify it
  under the terms and conditions of the GNU General Public License,
  version 2, as published by the Free Software Foundation.

  This program is distributed in the hope it will be useful, but WITHOUT
  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  more details.

  You should have received a copy of the GNU General Public License along with
  this program; if not, write to the Free Software Foundation, Inc.,
  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

  The full GNU General Public License is included in this distribution in
  the file called "COPYING".

  Contact Information:
  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

*******************************************************************************/


/******************************************************************************
 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
******************************************************************************/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#include <linux/types.h>
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#include <linux/bitops.h>
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#include <linux/module.h>
#include <linux/pci.h>
#include <linux/netdevice.h>
#include <linux/vmalloc.h>
#include <linux/string.h>
#include <linux/in.h>
#include <linux/ip.h>
#include <linux/tcp.h>
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#include <linux/sctp.h>
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#include <linux/ipv6.h>
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#include <linux/slab.h>
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#include <net/checksum.h>
#include <net/ip6_checksum.h>
#include <linux/ethtool.h>
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#include <linux/if.h>
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#include <linux/if_vlan.h>
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#include <linux/prefetch.h>
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#include "ixgbevf.h"

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const char ixgbevf_driver_name[] = "ixgbevf";
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static const char ixgbevf_driver_string[] =
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	"Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
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#define DRV_VERSION "2.12.1-k"
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const char ixgbevf_driver_version[] = DRV_VERSION;
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static char ixgbevf_copyright[] =
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	"Copyright (c) 2009 - 2012 Intel Corporation.";
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static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
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	[board_82599_vf] = &ixgbevf_82599_vf_info,
	[board_X540_vf]  = &ixgbevf_X540_vf_info,
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};

/* ixgbevf_pci_tbl - PCI Device ID Table
 *
 * Wildcard entries (PCI_ANY_ID) should come last
 * Last entry must be all 0s
 *
 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
 *   Class, Class Mask, private data (not used) }
 */
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static DEFINE_PCI_DEVICE_TABLE(ixgbevf_pci_tbl) = {
	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
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	/* required last entry */
	{0, }
};
MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);

MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);

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#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
static int debug = -1;
module_param(debug, int, 0);
MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
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/* forward decls */
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static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
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static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
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static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
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static inline void ixgbevf_release_rx_desc(struct ixgbevf_ring *rx_ring,
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					   u32 val)
{
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	rx_ring->next_to_use = val;

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	/*
	 * Force memory writes to complete before letting h/w
	 * know there are new descriptors to fetch.  (Only
	 * applicable for weak-ordered memory model archs,
	 * such as IA-64).
	 */
	wmb();
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	writel(val, rx_ring->tail);
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}

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/**
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 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
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 * @adapter: pointer to adapter struct
 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 * @queue: queue to map the corresponding interrupt to
 * @msix_vector: the vector to map to the corresponding queue
 */
static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
			     u8 queue, u8 msix_vector)
{
	u32 ivar, index;
	struct ixgbe_hw *hw = &adapter->hw;
	if (direction == -1) {
		/* other causes */
		msix_vector |= IXGBE_IVAR_ALLOC_VAL;
		ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
		ivar &= ~0xFF;
		ivar |= msix_vector;
		IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
	} else {
		/* tx or rx causes */
		msix_vector |= IXGBE_IVAR_ALLOC_VAL;
		index = ((16 * (queue & 1)) + (8 * direction));
		ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
		ivar &= ~(0xFF << index);
		ivar |= (msix_vector << index);
		IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
	}
}

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static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
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					struct ixgbevf_tx_buffer *tx_buffer)
{
	if (tx_buffer->skb) {
		dev_kfree_skb_any(tx_buffer->skb);
		if (dma_unmap_len(tx_buffer, len))
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			dma_unmap_single(tx_ring->dev,
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					 dma_unmap_addr(tx_buffer, dma),
					 dma_unmap_len(tx_buffer, len),
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					 DMA_TO_DEVICE);
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	} else if (dma_unmap_len(tx_buffer, len)) {
		dma_unmap_page(tx_ring->dev,
			       dma_unmap_addr(tx_buffer, dma),
			       dma_unmap_len(tx_buffer, len),
			       DMA_TO_DEVICE);
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	}
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	tx_buffer->next_to_watch = NULL;
	tx_buffer->skb = NULL;
	dma_unmap_len_set(tx_buffer, len, 0);
	/* tx_buffer must be completely set up in the transmit path */
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}

#define IXGBE_MAX_TXD_PWR	14
#define IXGBE_MAX_DATA_PER_TXD	(1 << IXGBE_MAX_TXD_PWR)

/* Tx Descriptors needed, worst case */
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#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
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static void ixgbevf_tx_timeout(struct net_device *netdev);

/**
 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
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 * @q_vector: board private structure
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 * @tx_ring: tx ring to clean
 **/
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static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
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				 struct ixgbevf_ring *tx_ring)
{
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	struct ixgbevf_adapter *adapter = q_vector->adapter;
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	struct ixgbevf_tx_buffer *tx_buffer;
	union ixgbe_adv_tx_desc *tx_desc;
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	unsigned int total_bytes = 0, total_packets = 0;
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	unsigned int budget = tx_ring->count / 2;
	unsigned int i = tx_ring->next_to_clean;
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	if (test_bit(__IXGBEVF_DOWN, &adapter->state))
		return true;

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	tx_buffer = &tx_ring->tx_buffer_info[i];
	tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
	i -= tx_ring->count;
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	do {
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		union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
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		/* if next_to_watch is not set then there is no work pending */
		if (!eop_desc)
			break;

		/* prevent any other reads prior to eop_desc */
		read_barrier_depends();

		/* if DD is not set pending work has not been completed */
		if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
			break;

		/* clear next_to_watch to prevent false hangs */
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		tx_buffer->next_to_watch = NULL;
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		/* update the statistics for this packet */
		total_bytes += tx_buffer->bytecount;
		total_packets += tx_buffer->gso_segs;
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		/* free the skb */
		dev_kfree_skb_any(tx_buffer->skb);

		/* unmap skb header data */
		dma_unmap_single(tx_ring->dev,
				 dma_unmap_addr(tx_buffer, dma),
				 dma_unmap_len(tx_buffer, len),
				 DMA_TO_DEVICE);

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		/* clear tx_buffer data */
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		tx_buffer->skb = NULL;
		dma_unmap_len_set(tx_buffer, len, 0);
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		/* unmap remaining buffers */
		while (tx_desc != eop_desc) {
			tx_buffer++;
			tx_desc++;
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			i++;
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			if (unlikely(!i)) {
				i -= tx_ring->count;
				tx_buffer = tx_ring->tx_buffer_info;
				tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
			}
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			/* unmap any remaining paged data */
			if (dma_unmap_len(tx_buffer, len)) {
				dma_unmap_page(tx_ring->dev,
					       dma_unmap_addr(tx_buffer, dma),
					       dma_unmap_len(tx_buffer, len),
					       DMA_TO_DEVICE);
				dma_unmap_len_set(tx_buffer, len, 0);
			}
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		}

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		/* move us one more past the eop_desc for start of next pkt */
		tx_buffer++;
		tx_desc++;
		i++;
		if (unlikely(!i)) {
			i -= tx_ring->count;
			tx_buffer = tx_ring->tx_buffer_info;
			tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
		}

		/* issue prefetch for next Tx descriptor */
		prefetch(tx_desc);

		/* update budget accounting */
		budget--;
	} while (likely(budget));

	i += tx_ring->count;
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	tx_ring->next_to_clean = i;
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	u64_stats_update_begin(&tx_ring->syncp);
	tx_ring->stats.bytes += total_bytes;
	tx_ring->stats.packets += total_packets;
	u64_stats_update_end(&tx_ring->syncp);
	q_vector->tx.total_bytes += total_bytes;
	q_vector->tx.total_packets += total_packets;
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#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
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	if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
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		     (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
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		/* Make sure that anybody stopping the queue after this
		 * sees the new next_to_clean.
		 */
		smp_mb();
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		if (__netif_subqueue_stopped(tx_ring->netdev,
					     tx_ring->queue_index) &&
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		    !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
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			netif_wake_subqueue(tx_ring->netdev,
					    tx_ring->queue_index);
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			++tx_ring->tx_stats.restart_queue;
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		}
	}

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	return !!budget;
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}

/**
 * ixgbevf_receive_skb - Send a completed packet up the stack
 * @q_vector: structure containing interrupt and ring information
 * @skb: packet to send up
 * @status: hardware indication of status of receive
 * @rx_desc: rx descriptor
 **/
static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
				struct sk_buff *skb, u8 status,
				union ixgbe_adv_rx_desc *rx_desc)
{
	struct ixgbevf_adapter *adapter = q_vector->adapter;
	bool is_vlan = (status & IXGBE_RXD_STAT_VP);
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	u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
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	if (is_vlan && test_bit(tag & VLAN_VID_MASK, adapter->active_vlans))
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		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
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	if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
		napi_gro_receive(&q_vector->napi, skb);
	else
		netif_rx(skb);
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}

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/**
 * ixgbevf_rx_skb - Helper function to determine proper Rx method
 * @q_vector: structure containing interrupt and ring information
 * @skb: packet to send up
 * @status: hardware indication of status of receive
 * @rx_desc: rx descriptor
 **/
static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
			   struct sk_buff *skb, u8 status,
			   union ixgbe_adv_rx_desc *rx_desc)
{
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#ifdef CONFIG_NET_RX_BUSY_POLL
	skb_mark_napi_id(skb, &q_vector->napi);

	if (ixgbevf_qv_busy_polling(q_vector)) {
		netif_receive_skb(skb);
		/* exit early if we busy polled */
		return;
	}
#endif /* CONFIG_NET_RX_BUSY_POLL */

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	ixgbevf_receive_skb(q_vector, skb, status, rx_desc);
}

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/**
 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
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 * @ring: pointer to Rx descriptor ring structure
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 * @status_err: hardware indication of status of receive
 * @skb: skb currently being received and modified
 **/
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static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
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				       u32 status_err, struct sk_buff *skb)
{
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	skb_checksum_none_assert(skb);
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	/* Rx csum disabled */
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	if (!(ring->netdev->features & NETIF_F_RXCSUM))
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		return;

	/* if IP and error */
	if ((status_err & IXGBE_RXD_STAT_IPCS) &&
	    (status_err & IXGBE_RXDADV_ERR_IPE)) {
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		ring->rx_stats.csum_err++;
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		return;
	}

	if (!(status_err & IXGBE_RXD_STAT_L4CS))
		return;

	if (status_err & IXGBE_RXDADV_ERR_TCPE) {
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		ring->rx_stats.csum_err++;
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		return;
	}

	/* It must be a TCP or UDP packet with a valid checksum */
	skb->ip_summed = CHECKSUM_UNNECESSARY;
}

/**
 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
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 * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
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 **/
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static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
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				     int cleaned_count)
{
	union ixgbe_adv_rx_desc *rx_desc;
	struct ixgbevf_rx_buffer *bi;
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	unsigned int i = rx_ring->next_to_use;
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	while (cleaned_count--) {
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		rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
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		bi = &rx_ring->rx_buffer_info[i];
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		if (!bi->skb) {
			struct sk_buff *skb;

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			skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
							rx_ring->rx_buf_len);
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			if (!skb)
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				goto no_buffers;
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			bi->skb = skb;
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			bi->dma = dma_map_single(rx_ring->dev, skb->data,
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						 rx_ring->rx_buf_len,
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						 DMA_FROM_DEVICE);
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			if (dma_mapping_error(rx_ring->dev, bi->dma)) {
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				dev_kfree_skb(skb);
				bi->skb = NULL;
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				dev_err(rx_ring->dev, "Rx DMA map failed\n");
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				break;
			}
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		}
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		rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
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		i++;
		if (i == rx_ring->count)
			i = 0;
	}

no_buffers:
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	rx_ring->rx_stats.alloc_rx_buff_failed++;
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	if (rx_ring->next_to_use != i)
		ixgbevf_release_rx_desc(rx_ring, i);
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}

static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
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					     u32 qmask)
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{
	struct ixgbe_hw *hw = &adapter->hw;

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	IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
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}

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static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
				struct ixgbevf_ring *rx_ring,
				int budget)
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{
	union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
	struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
	struct sk_buff *skb;
	unsigned int i;
	u32 len, staterr;
	int cleaned_count = 0;
	unsigned int total_rx_bytes = 0, total_rx_packets = 0;

	i = rx_ring->next_to_clean;
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	rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
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	staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
	rx_buffer_info = &rx_ring->rx_buffer_info[i];

	while (staterr & IXGBE_RXD_STAT_DD) {
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		if (!budget)
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			break;
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		budget--;
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		rmb(); /* read descriptor and rx_buffer_info after status DD */
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		len = le16_to_cpu(rx_desc->wb.upper.length);
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		skb = rx_buffer_info->skb;
		prefetch(skb->data - NET_IP_ALIGN);
		rx_buffer_info->skb = NULL;

		if (rx_buffer_info->dma) {
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			dma_unmap_single(rx_ring->dev, rx_buffer_info->dma,
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					 rx_ring->rx_buf_len,
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					 DMA_FROM_DEVICE);
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			rx_buffer_info->dma = 0;
			skb_put(skb, len);
		}

		i++;
		if (i == rx_ring->count)
			i = 0;

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		next_rxd = IXGBEVF_RX_DESC(rx_ring, i);
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		prefetch(next_rxd);
		cleaned_count++;

		next_buffer = &rx_ring->rx_buffer_info[i];

		if (!(staterr & IXGBE_RXD_STAT_EOP)) {
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			skb->next = next_buffer->skb;
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			IXGBE_CB(skb->next)->prev = skb;
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			rx_ring->rx_stats.non_eop_descs++;
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			goto next_desc;
		}

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		/* we should not be chaining buffers, if we did drop the skb */
		if (IXGBE_CB(skb)->prev) {
			do {
				struct sk_buff *this = skb;
				skb = IXGBE_CB(skb)->prev;
				dev_kfree_skb(this);
			} while (skb);
			goto next_desc;
		}

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		/* ERR_MASK will only have valid bits if EOP set */
		if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
			dev_kfree_skb_irq(skb);
			goto next_desc;
		}

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		ixgbevf_rx_checksum(rx_ring, staterr, skb);
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		/* probably a little skewed due to removing CRC */
		total_rx_bytes += skb->len;
		total_rx_packets++;

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		skb->protocol = eth_type_trans(skb, rx_ring->netdev);
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		/* Workaround hardware that can't do proper VEPA multicast
		 * source pruning.
		 */
		if ((skb->pkt_type & (PACKET_BROADCAST | PACKET_MULTICAST)) &&
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		    ether_addr_equal(rx_ring->netdev->dev_addr,
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				     eth_hdr(skb)->h_source)) {
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			dev_kfree_skb_irq(skb);
			goto next_desc;
		}

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		ixgbevf_rx_skb(q_vector, skb, staterr, rx_desc);
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next_desc:
		rx_desc->wb.upper.status_error = 0;

		/* return some buffers to hardware, one at a time is too slow */
		if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
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			ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
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			cleaned_count = 0;
		}

		/* use prefetched values */
		rx_desc = next_rxd;
		rx_buffer_info = &rx_ring->rx_buffer_info[i];

		staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
	}

	rx_ring->next_to_clean = i;
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	cleaned_count = ixgbevf_desc_unused(rx_ring);
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	if (cleaned_count)
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		ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
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	u64_stats_update_begin(&rx_ring->syncp);
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	rx_ring->stats.packets += total_rx_packets;
	rx_ring->stats.bytes += total_rx_bytes;
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	u64_stats_update_end(&rx_ring->syncp);
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	q_vector->rx.total_packets += total_rx_packets;
	q_vector->rx.total_bytes += total_rx_bytes;
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	return total_rx_packets;
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}

/**
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 * ixgbevf_poll - NAPI polling calback
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 * @napi: napi struct with our devices info in it
 * @budget: amount of work driver is allowed to do this pass, in packets
 *
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 * This function will clean more than one or more rings associated with a
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 * q_vector.
 **/
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static int ixgbevf_poll(struct napi_struct *napi, int budget)
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{
	struct ixgbevf_q_vector *q_vector =
		container_of(napi, struct ixgbevf_q_vector, napi);
	struct ixgbevf_adapter *adapter = q_vector->adapter;
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	struct ixgbevf_ring *ring;
	int per_ring_budget;
	bool clean_complete = true;

	ixgbevf_for_each_ring(ring, q_vector->tx)
		clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
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580 581 582 583 584
#ifdef CONFIG_NET_RX_BUSY_POLL
	if (!ixgbevf_qv_lock_napi(q_vector))
		return budget;
#endif

585 586
	/* attempt to distribute budget to each queue fairly, but don't allow
	 * the budget to go below 1 because we'll exit polling */
587 588 589 590 591
	if (q_vector->rx.count > 1)
		per_ring_budget = max(budget/q_vector->rx.count, 1);
	else
		per_ring_budget = budget;

592
	adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
593
	ixgbevf_for_each_ring(ring, q_vector->rx)
594 595 596
		clean_complete &= (ixgbevf_clean_rx_irq(q_vector, ring,
							per_ring_budget)
				   < per_ring_budget);
597
	adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
598

599 600 601 602
#ifdef CONFIG_NET_RX_BUSY_POLL
	ixgbevf_qv_unlock_napi(q_vector);
#endif

603 604 605 606 607 608 609 610 611 612
	/* If all work not completed, return budget and keep polling */
	if (!clean_complete)
		return budget;
	/* all work done, exit the polling mode */
	napi_complete(napi);
	if (adapter->rx_itr_setting & 1)
		ixgbevf_set_itr(q_vector);
	if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
		ixgbevf_irq_enable_queues(adapter,
					  1 << q_vector->v_idx);
613

614
	return 0;
615 616
}

617 618 619 620
/**
 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
 * @q_vector: structure containing interrupt and ring information
 */
621
void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
622 623 624 625 626 627 628 629 630 631 632 633 634 635
{
	struct ixgbevf_adapter *adapter = q_vector->adapter;
	struct ixgbe_hw *hw = &adapter->hw;
	int v_idx = q_vector->v_idx;
	u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;

	/*
	 * set the WDIS bit to not clear the timer bits and cause an
	 * immediate assertion of the interrupt
	 */
	itr_reg |= IXGBE_EITR_CNT_WDIS;

	IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
}
636

637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654
#ifdef CONFIG_NET_RX_BUSY_POLL
/* must be called with local_bh_disable()d */
static int ixgbevf_busy_poll_recv(struct napi_struct *napi)
{
	struct ixgbevf_q_vector *q_vector =
			container_of(napi, struct ixgbevf_q_vector, napi);
	struct ixgbevf_adapter *adapter = q_vector->adapter;
	struct ixgbevf_ring  *ring;
	int found = 0;

	if (test_bit(__IXGBEVF_DOWN, &adapter->state))
		return LL_FLUSH_FAILED;

	if (!ixgbevf_qv_lock_poll(q_vector))
		return LL_FLUSH_BUSY;

	ixgbevf_for_each_ring(ring, q_vector->rx) {
		found = ixgbevf_clean_rx_irq(q_vector, ring, 4);
655 656
#ifdef BP_EXTENDED_STATS
		if (found)
657
			ring->stats.cleaned += found;
658
		else
659
			ring->stats.misses++;
660
#endif
661 662 663 664 665 666 667 668 669 670
		if (found)
			break;
	}

	ixgbevf_qv_unlock_poll(q_vector);

	return found;
}
#endif /* CONFIG_NET_RX_BUSY_POLL */

671 672 673 674 675 676 677 678 679 680
/**
 * ixgbevf_configure_msix - Configure MSI-X hardware
 * @adapter: board private structure
 *
 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
 * interrupts.
 **/
static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
{
	struct ixgbevf_q_vector *q_vector;
681
	int q_vectors, v_idx;
682 683

	q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
684
	adapter->eims_enable_mask = 0;
685 686 687 688 689 690

	/*
	 * Populate the IVAR table and set the ITR values to the
	 * corresponding register.
	 */
	for (v_idx = 0; v_idx < q_vectors; v_idx++) {
691
		struct ixgbevf_ring *ring;
692
		q_vector = adapter->q_vector[v_idx];
693 694 695 696 697 698

		ixgbevf_for_each_ring(ring, q_vector->rx)
			ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);

		ixgbevf_for_each_ring(ring, q_vector->tx)
			ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
699

700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715
		if (q_vector->tx.ring && !q_vector->rx.ring) {
			/* tx only vector */
			if (adapter->tx_itr_setting == 1)
				q_vector->itr = IXGBE_10K_ITR;
			else
				q_vector->itr = adapter->tx_itr_setting;
		} else {
			/* rx or rx/tx vector */
			if (adapter->rx_itr_setting == 1)
				q_vector->itr = IXGBE_20K_ITR;
			else
				q_vector->itr = adapter->rx_itr_setting;
		}

		/* add q_vector eims value to global eims_enable_mask */
		adapter->eims_enable_mask |= 1 << v_idx;
716

717
		ixgbevf_write_eitr(q_vector);
718 719 720
	}

	ixgbevf_set_ivar(adapter, -1, 1, v_idx);
721 722 723
	/* setup eims_other and add value to global eims_enable_mask */
	adapter->eims_other = 1 << v_idx;
	adapter->eims_enable_mask |= adapter->eims_other;
724 725 726 727 728 729 730 731 732 733 734
}

enum latency_range {
	lowest_latency = 0,
	low_latency = 1,
	bulk_latency = 2,
	latency_invalid = 255
};

/**
 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
735 736
 * @q_vector: structure containing interrupt and ring information
 * @ring_container: structure containing ring performance data
737 738 739 740 741 742 743 744 745
 *
 *      Stores a new ITR value based on packets and byte
 *      counts during the last interrupt.  The advantage of per interrupt
 *      computation is faster updates and more accurate ITR for the current
 *      traffic pattern.  Constants in this function were computed
 *      based on theoretical maximum wire speed and thresholds were set based
 *      on testing data as well as attempting to minimize response time
 *      while increasing bulk throughput.
 **/
746 747
static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
			       struct ixgbevf_ring_container *ring_container)
748
{
749 750
	int bytes = ring_container->total_bytes;
	int packets = ring_container->total_packets;
751 752
	u32 timepassed_us;
	u64 bytes_perint;
753
	u8 itr_setting = ring_container->itr;
754 755

	if (packets == 0)
756
		return;
757 758 759 760 761 762 763

	/* simple throttlerate management
	 *    0-20MB/s lowest (100000 ints/s)
	 *   20-100MB/s low   (20000 ints/s)
	 *  100-1249MB/s bulk (8000 ints/s)
	 */
	/* what was last interrupt timeslice? */
764
	timepassed_us = q_vector->itr >> 2;
765 766 767 768
	bytes_perint = bytes / timepassed_us; /* bytes/usec */

	switch (itr_setting) {
	case lowest_latency:
769
		if (bytes_perint > 10)
770
			itr_setting = low_latency;
771 772
		break;
	case low_latency:
773
		if (bytes_perint > 20)
774
			itr_setting = bulk_latency;
775
		else if (bytes_perint <= 10)
776
			itr_setting = lowest_latency;
777 778
		break;
	case bulk_latency:
779
		if (bytes_perint <= 20)
780
			itr_setting = low_latency;
781 782 783
		break;
	}

784 785 786 787 788 789
	/* clear work counters since we have the values we need */
	ring_container->total_bytes = 0;
	ring_container->total_packets = 0;

	/* write updated itr to ring container */
	ring_container->itr = itr_setting;
790 791
}

792
static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
793
{
794 795
	u32 new_itr = q_vector->itr;
	u8 current_itr;
796

797 798
	ixgbevf_update_itr(q_vector, &q_vector->tx);
	ixgbevf_update_itr(q_vector, &q_vector->rx);
799

800
	current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
801 802 803 804

	switch (current_itr) {
	/* counts and packets in update_itr are dependent on these numbers */
	case lowest_latency:
805
		new_itr = IXGBE_100K_ITR;
806 807
		break;
	case low_latency:
808
		new_itr = IXGBE_20K_ITR;
809 810 811
		break;
	case bulk_latency:
	default:
812
		new_itr = IXGBE_8K_ITR;
813 814 815
		break;
	}

816
	if (new_itr != q_vector->itr) {
817
		/* do an exponential smoothing */
818 819 820 821 822 823 824
		new_itr = (10 * new_itr * q_vector->itr) /
			  ((9 * new_itr) + q_vector->itr);

		/* save the algorithm value here */
		q_vector->itr = new_itr;

		ixgbevf_write_eitr(q_vector);
825 826 827
	}
}

828
static irqreturn_t ixgbevf_msix_other(int irq, void *data)
829
{
830
	struct ixgbevf_adapter *adapter = data;
831
	struct ixgbe_hw *hw = &adapter->hw;
832

833
	hw->mac.get_link_status = 1;
834

835 836
	if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
		mod_timer(&adapter->watchdog_timer, jiffies);
837

838 839
	IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);

840 841 842 843
	return IRQ_HANDLED;
}

/**
844
 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
845 846 847
 * @irq: unused
 * @data: pointer to our q_vector struct for this interrupt vector
 **/
848
static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
849 850 851
{
	struct ixgbevf_q_vector *q_vector = data;

852
	/* EIAM disabled interrupts (on this vector) for us */
853 854
	if (q_vector->rx.ring || q_vector->tx.ring)
		napi_schedule(&q_vector->napi);
855 856 857 858 859 860 861 862 863

	return IRQ_HANDLED;
}

static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
				     int r_idx)
{
	struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];

864 865
	a->rx_ring[r_idx]->next = q_vector->rx.ring;
	q_vector->rx.ring = a->rx_ring[r_idx];
866
	q_vector->rx.count++;
867 868 869 870 871 872 873
}

static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
				     int t_idx)
{
	struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];

874 875
	a->tx_ring[t_idx]->next = q_vector->tx.ring;
	q_vector->tx.ring = a->tx_ring[t_idx];
876
	q_vector->tx.count++;
877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951
}

/**
 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
 * @adapter: board private structure to initialize
 *
 * This function maps descriptor rings to the queue-specific vectors
 * we were allotted through the MSI-X enabling code.  Ideally, we'd have
 * one vector per ring/queue, but on a constrained vector budget, we
 * group the rings as "efficiently" as possible.  You would add new
 * mapping configurations in here.
 **/
static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
{
	int q_vectors;
	int v_start = 0;
	int rxr_idx = 0, txr_idx = 0;
	int rxr_remaining = adapter->num_rx_queues;
	int txr_remaining = adapter->num_tx_queues;
	int i, j;
	int rqpv, tqpv;
	int err = 0;

	q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;

	/*
	 * The ideal configuration...
	 * We have enough vectors to map one per queue.
	 */
	if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
		for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
			map_vector_to_rxq(adapter, v_start, rxr_idx);

		for (; txr_idx < txr_remaining; v_start++, txr_idx++)
			map_vector_to_txq(adapter, v_start, txr_idx);
		goto out;
	}

	/*
	 * If we don't have enough vectors for a 1-to-1
	 * mapping, we'll have to group them so there are
	 * multiple queues per vector.
	 */
	/* Re-adjusting *qpv takes care of the remainder. */
	for (i = v_start; i < q_vectors; i++) {
		rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
		for (j = 0; j < rqpv; j++) {
			map_vector_to_rxq(adapter, i, rxr_idx);
			rxr_idx++;
			rxr_remaining--;
		}
	}
	for (i = v_start; i < q_vectors; i++) {
		tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
		for (j = 0; j < tqpv; j++) {
			map_vector_to_txq(adapter, i, txr_idx);
			txr_idx++;
			txr_remaining--;
		}
	}

out:
	return err;
}

/**
 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
 * @adapter: board private structure
 *
 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
 * interrupts from the kernel.
 **/
static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
{
	struct net_device *netdev = adapter->netdev;
952 953
	int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
	int vector, err;
954 955 956
	int ri = 0, ti = 0;

	for (vector = 0; vector < q_vectors; vector++) {
957 958 959 960 961 962 963 964 965 966 967 968 969
		struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
		struct msix_entry *entry = &adapter->msix_entries[vector];

		if (q_vector->tx.ring && q_vector->rx.ring) {
			snprintf(q_vector->name, sizeof(q_vector->name) - 1,
				 "%s-%s-%d", netdev->name, "TxRx", ri++);
			ti++;
		} else if (q_vector->rx.ring) {
			snprintf(q_vector->name, sizeof(q_vector->name) - 1,
				 "%s-%s-%d", netdev->name, "rx", ri++);
		} else if (q_vector->tx.ring) {
			snprintf(q_vector->name, sizeof(q_vector->name) - 1,
				 "%s-%s-%d", netdev->name, "tx", ti++);
970 971 972 973
		} else {
			/* skip this unused q_vector */
			continue;
		}
974 975
		err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
				  q_vector->name, q_vector);
976 977 978 979 980 981 982 983 984
		if (err) {
			hw_dbg(&adapter->hw,
			       "request_irq failed for MSIX interrupt "
			       "Error: %d\n", err);
			goto free_queue_irqs;
		}
	}

	err = request_irq(adapter->msix_entries[vector].vector,
985
			  &ixgbevf_msix_other, 0, netdev->name, adapter);
986 987
	if (err) {
		hw_dbg(&adapter->hw,
988
		       "request_irq for msix_other failed: %d\n", err);
989 990 991 992 993 994
		goto free_queue_irqs;
	}

	return 0;

free_queue_irqs:
995 996 997 998 999
	while (vector) {
		vector--;
		free_irq(adapter->msix_entries[vector].vector,
			 adapter->q_vector[vector]);
	}
1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010
	/* This failure is non-recoverable - it indicates the system is
	 * out of MSIX vector resources and the VF driver cannot run
	 * without them.  Set the number of msix vectors to zero
	 * indicating that not enough can be allocated.  The error
	 * will be returned to the user indicating device open failed.
	 * Any further attempts to force the driver to open will also
	 * fail.  The only way to recover is to unload the driver and
	 * reload it again.  If the system has recovered some MSIX
	 * vectors then it may succeed.
	 */
	adapter->num_msix_vectors = 0;
1011 1012 1013 1014 1015 1016 1017 1018 1019
	return err;
}

static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
{
	int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;

	for (i = 0; i < q_vectors; i++) {
		struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1020 1021 1022 1023
		q_vector->rx.ring = NULL;
		q_vector->tx.ring = NULL;
		q_vector->rx.count = 0;
		q_vector->tx.count = 0;
1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053
	}
}

/**
 * ixgbevf_request_irq - initialize interrupts
 * @adapter: board private structure
 *
 * Attempts to configure interrupts using the best available
 * capabilities of the hardware and kernel.
 **/
static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
{
	int err = 0;

	err = ixgbevf_request_msix_irqs(adapter);

	if (err)
		hw_dbg(&adapter->hw,
		       "request_irq failed, Error %d\n", err);

	return err;
}

static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
{
	int i, q_vectors;

	q_vectors = adapter->num_msix_vectors;
	i = q_vectors - 1;

1054
	free_irq(adapter->msix_entries[i].vector, adapter);
1055 1056 1057
	i--;

	for (; i >= 0; i--) {
1058 1059 1060 1061 1062
		/* free only the irqs that were actually requested */
		if (!adapter->q_vector[i]->rx.ring &&
		    !adapter->q_vector[i]->tx.ring)
			continue;

1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076
		free_irq(adapter->msix_entries[i].vector,
			 adapter->q_vector[i]);
	}

	ixgbevf_reset_q_vectors(adapter);
}

/**
 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
 * @adapter: board private structure
 **/
static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
{
	struct ixgbe_hw *hw = &adapter->hw;
1077
	int i;
1078

1079
	IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
1080
	IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1081
	IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092

	IXGBE_WRITE_FLUSH(hw);

	for (i = 0; i < adapter->num_msix_vectors; i++)
		synchronize_irq(adapter->msix_entries[i].vector);
}

/**
 * ixgbevf_irq_enable - Enable default interrupt generation settings
 * @adapter: board private structure
 **/
1093
static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
1094 1095 1096
{
	struct ixgbe_hw *hw = &adapter->hw;

1097 1098 1099
	IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
	IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
	IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
1100 1101
}

1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165
/**
 * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
 * @adapter: board private structure
 * @ring: structure containing ring specific data
 *
 * Configure the Tx descriptor ring after a reset.
 **/
static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
				      struct ixgbevf_ring *ring)
{
	struct ixgbe_hw *hw = &adapter->hw;
	u64 tdba = ring->dma;
	int wait_loop = 10;
	u32 txdctl = IXGBE_TXDCTL_ENABLE;
	u8 reg_idx = ring->reg_idx;

	/* disable queue to avoid issues while updating state */
	IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
	IXGBE_WRITE_FLUSH(hw);

	IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
	IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
	IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
			ring->count * sizeof(union ixgbe_adv_tx_desc));

	/* disable head writeback */
	IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
	IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);

	/* enable relaxed ordering */
	IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
			(IXGBE_DCA_TXCTRL_DESC_RRO_EN |
			 IXGBE_DCA_TXCTRL_DATA_RRO_EN));

	/* reset head and tail pointers */
	IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
	IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
	ring->tail = hw->hw_addr + IXGBE_VFTDT(reg_idx);

	/* reset ntu and ntc to place SW in sync with hardwdare */
	ring->next_to_clean = 0;
	ring->next_to_use = 0;

	/* In order to avoid issues WTHRESH + PTHRESH should always be equal
	 * to or less than the number of on chip descriptors, which is
	 * currently 40.
	 */
	txdctl |= (8 << 16);    /* WTHRESH = 8 */

	/* Setting PTHRESH to 32 both improves performance */
	txdctl |= (1 << 8) |    /* HTHRESH = 1 */
		  32;          /* PTHRESH = 32 */

	IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);

	/* poll to verify queue is enabled */
	do {
		usleep_range(1000, 2000);
		txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
	}  while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
	if (!wait_loop)
		pr_err("Could not enable Tx Queue %d\n", reg_idx);
}

1166 1167 1168 1169 1170 1171 1172 1173
/**
 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
 * @adapter: board private structure
 *
 * Configure the Tx unit of the MAC after a reset.
 **/
static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
{
1174
	u32 i;
1175 1176

	/* Setup the HW Tx Head and Tail descriptor pointers */
1177 1178
	for (i = 0; i < adapter->num_tx_queues; i++)
		ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
1179 1180 1181 1182 1183 1184 1185 1186 1187 1188
}

#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT	2

static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
{
	struct ixgbevf_ring *rx_ring;
	struct ixgbe_hw *hw = &adapter->hw;
	u32 srrctl;

1189
	rx_ring = adapter->rx_ring[index];
1190 1191 1192

	srrctl = IXGBE_SRRCTL_DROP_EN;

1193
	srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1194

1195 1196 1197
	srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
		  IXGBE_SRRCTL_BSIZEPKT_SHIFT;

1198 1199 1200
	IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
}

1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215
static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
{
	struct ixgbe_hw *hw = &adapter->hw;

	/* PSRTYPE must be initialized in 82599 */
	u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
		      IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
		      IXGBE_PSRTYPE_L2HDR;

	if (adapter->num_rx_queues > 1)
		psrtype |= 1 << 29;

	IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
}

1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230
static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter)
{
	struct ixgbe_hw *hw = &adapter->hw;
	struct net_device *netdev = adapter->netdev;
	int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
	int i;
	u16 rx_buf_len;

	/* notify the PF of our intent to use this size of frame */
	ixgbevf_rlpml_set_vf(hw, max_frame);

	/* PF will allow an extra 4 bytes past for vlan tagged frames */
	max_frame += VLAN_HLEN;

	/*
1231 1232
	 * Allocate buffer sizes that fit well into 32K and
	 * take into account max frame size of 9.5K
1233 1234 1235 1236
	 */
	if ((hw->mac.type == ixgbe_mac_X540_vf) &&
	    (max_frame <= MAXIMUM_ETHERNET_VLAN_SIZE))
		rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1237 1238 1239 1240 1241 1242
	else if (max_frame <= IXGBEVF_RXBUFFER_2K)
		rx_buf_len = IXGBEVF_RXBUFFER_2K;
	else if (max_frame <= IXGBEVF_RXBUFFER_4K)
		rx_buf_len = IXGBEVF_RXBUFFER_4K;
	else if (max_frame <= IXGBEVF_RXBUFFER_8K)
		rx_buf_len = IXGBEVF_RXBUFFER_8K;
1243
	else
1244
		rx_buf_len = IXGBEVF_RXBUFFER_10K;
1245 1246

	for (i = 0; i < adapter->num_rx_queues; i++)
1247
		adapter->rx_ring[i]->rx_buf_len = rx_buf_len;
1248 1249
}

1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332
#define IXGBEVF_MAX_RX_DESC_POLL 10
static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
				     struct ixgbevf_ring *ring)
{
	struct ixgbe_hw *hw = &adapter->hw;
	int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
	u32 rxdctl;
	u8 reg_idx = ring->reg_idx;

	rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
	rxdctl &= ~IXGBE_RXDCTL_ENABLE;

	/* write value back with RXDCTL.ENABLE bit cleared */
	IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);

	/* the hardware may take up to 100us to really disable the rx queue */
	do {
		udelay(10);
		rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
	} while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));

	if (!wait_loop)
		pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
		       reg_idx);
}

static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
					 struct ixgbevf_ring *ring)
{
	struct ixgbe_hw *hw = &adapter->hw;
	int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
	u32 rxdctl;
	u8 reg_idx = ring->reg_idx;

	do {
		usleep_range(1000, 2000);
		rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
	} while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));

	if (!wait_loop)
		pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
		       reg_idx);
}

static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
				      struct ixgbevf_ring *ring)
{
	struct ixgbe_hw *hw = &adapter->hw;
	u64 rdba = ring->dma;
	u32 rxdctl;
	u8 reg_idx = ring->reg_idx;

	/* disable queue to avoid issues while updating state */
	rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
	ixgbevf_disable_rx_queue(adapter, ring);

	IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
	IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
	IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
			ring->count * sizeof(union ixgbe_adv_rx_desc));

	/* enable relaxed ordering */
	IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
			IXGBE_DCA_RXCTRL_DESC_RRO_EN);

	/* reset head and tail pointers */
	IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
	IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
	ring->tail = hw->hw_addr + IXGBE_VFRDT(reg_idx);

	/* reset ntu and ntc to place SW in sync with hardwdare */
	ring->next_to_clean = 0;
	ring->next_to_use = 0;

	ixgbevf_configure_srrctl(adapter, reg_idx);

	/* prevent DMA from exceeding buffer space available */
	rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
	rxdctl |= ring->rx_buf_len | IXGBE_RXDCTL_RLPML_EN;
	rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
	IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);

	ixgbevf_rx_desc_queue_enable(adapter, ring);
1333
	ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
1334 1335
}

1336 1337 1338 1339 1340 1341 1342 1343
/**
 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
 * @adapter: board private structure
 *
 * Configure the Rx unit of the MAC after a reset.
 **/
static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
{
1344
	int i;
1345

1346
	ixgbevf_setup_psrtype(adapter);
1347 1348 1349

	/* set_rx_buffer_len must be called before ring initialization */
	ixgbevf_set_rx_buffer_len(adapter);
1350 1351 1352

	/* Setup the HW Rx Head and Tail Descriptor Pointers and
	 * the Base and Length of the Rx Descriptor Ring */
1353 1354
	for (i = 0; i < adapter->num_rx_queues; i++)
		ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]);
1355 1356
}

1357 1358
static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
				   __be16 proto, u16 vid)
1359 1360 1361
{
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
	struct ixgbe_hw *hw = &adapter->hw;
1362 1363
	int err;

1364
	spin_lock_bh(&adapter->mbx_lock);
1365

1366
	/* add VID to filter table */
1367
	err = hw->mac.ops.set_vfta(hw, vid, 0, true);
1368

1369
	spin_unlock_bh(&adapter->mbx_lock);
1370

1371 1372 1373 1374 1375 1376 1377
	/* translate error return types so error makes sense */
	if (err == IXGBE_ERR_MBX)
		return -EIO;

	if (err == IXGBE_ERR_INVALID_ARGUMENT)
		return -EACCES;

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Jiri Pirko 已提交
1378
	set_bit(vid, adapter->active_vlans);
1379

1380
	return err;
1381 1382
}

1383 1384
static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
				    __be16 proto, u16 vid)
1385 1386 1387
{
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
	struct ixgbe_hw *hw = &adapter->hw;
1388
	int err = -EOPNOTSUPP;
1389

1390
	spin_lock_bh(&adapter->mbx_lock);
1391

1392
	/* remove VID from filter table */
1393
	err = hw->mac.ops.set_vfta(hw, vid, 0, false);
1394

1395
	spin_unlock_bh(&adapter->mbx_lock);
1396

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Jiri Pirko 已提交
1397
	clear_bit(vid, adapter->active_vlans);
1398

1399
	return err;
1400 1401 1402 1403
}

static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
{
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Jiri Pirko 已提交
1404
	u16 vid;
1405

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Jiri Pirko 已提交
1406
	for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
1407 1408
		ixgbevf_vlan_rx_add_vid(adapter->netdev,
					htons(ETH_P_8021Q), vid);
1409 1410
}

1411 1412 1413 1414 1415 1416 1417
static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
{
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
	struct ixgbe_hw *hw = &adapter->hw;
	int count = 0;

	if ((netdev_uc_count(netdev)) > 10) {
1418
		pr_err("Too many unicast filters - No Space\n");
1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438
		return -ENOSPC;
	}

	if (!netdev_uc_empty(netdev)) {
		struct netdev_hw_addr *ha;
		netdev_for_each_uc_addr(ha, netdev) {
			hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
			udelay(200);
		}
	} else {
		/*
		 * If the list is empty then send message to PF driver to
		 * clear all macvlans on this VF.
		 */
		hw->mac.ops.set_uc_addr(hw, 0, NULL);
	}

	return count;
}

1439
/**
1440
 * ixgbevf_set_rx_mode - Multicast and unicast set
1441 1442 1443
 * @netdev: network interface device structure
 *
 * The set_rx_method entry point is called whenever the multicast address
1444 1445 1446
 * list, unicast address list or the network interface flags are updated.
 * This routine is responsible for configuring the hardware for proper
 * multicast mode and configuring requested unicast filters.
1447 1448 1449 1450 1451 1452
 **/
static void ixgbevf_set_rx_mode(struct net_device *netdev)
{
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
	struct ixgbe_hw *hw = &adapter->hw;

1453
	spin_lock_bh(&adapter->mbx_lock);
1454

1455
	/* reprogram multicast list */
1456
	hw->mac.ops.update_mc_addr_list(hw, netdev);
1457 1458

	ixgbevf_write_uc_addr_list(netdev);
1459

1460
	spin_unlock_bh(&adapter->mbx_lock);
1461 1462 1463 1464 1465 1466 1467 1468 1469 1470
}

static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
{
	int q_idx;
	struct ixgbevf_q_vector *q_vector;
	int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;

	for (q_idx = 0; q_idx < q_vectors; q_idx++) {
		q_vector = adapter->q_vector[q_idx];
1471 1472 1473
#ifdef CONFIG_NET_RX_BUSY_POLL
		ixgbevf_qv_init_lock(adapter->q_vector[q_idx]);
#endif
1474
		napi_enable(&q_vector->napi);
1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486
	}
}

static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
{
	int q_idx;
	struct ixgbevf_q_vector *q_vector;
	int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;

	for (q_idx = 0; q_idx < q_vectors; q_idx++) {
		q_vector = adapter->q_vector[q_idx];
		napi_disable(&q_vector->napi);
1487 1488 1489 1490 1491 1492
#ifdef CONFIG_NET_RX_BUSY_POLL
		while (!ixgbevf_qv_disable(adapter->q_vector[q_idx])) {
			pr_info("QV %d locked\n", q_idx);
			usleep_range(1000, 20000);
		}
#endif /* CONFIG_NET_RX_BUSY_POLL */
1493 1494 1495
	}
}

1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515
static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
{
	struct ixgbe_hw *hw = &adapter->hw;
	unsigned int def_q = 0;
	unsigned int num_tcs = 0;
	unsigned int num_rx_queues = 1;
	int err;

	spin_lock_bh(&adapter->mbx_lock);

	/* fetch queue configuration from the PF */
	err = ixgbevf_get_queues(hw, &num_tcs, &def_q);

	spin_unlock_bh(&adapter->mbx_lock);

	if (err)
		return err;

	if (num_tcs > 1) {
		/* update default Tx ring register index */
1516
		adapter->tx_ring[0]->reg_idx = def_q;
1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533

		/* we need as many queues as traffic classes */
		num_rx_queues = num_tcs;
	}

	/* if we have a bad config abort request queue reset */
	if (adapter->num_rx_queues != num_rx_queues) {
		/* force mailbox timeout to prevent further messages */
		hw->mbx.timeout = 0;

		/* wait for watchdog to come around and bail us out */
		adapter->flags |= IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
	}

	return 0;
}

1534 1535
static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
{
1536 1537
	ixgbevf_configure_dcb(adapter);

1538
	ixgbevf_set_rx_mode(adapter->netdev);
1539 1540 1541 1542 1543 1544 1545

	ixgbevf_restore_vlan(adapter);

	ixgbevf_configure_tx(adapter);
	ixgbevf_configure_rx(adapter);
}

1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583
static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
{
	/* Only save pre-reset stats if there are some */
	if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
		adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
			adapter->stats.base_vfgprc;
		adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
			adapter->stats.base_vfgptc;
		adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
			adapter->stats.base_vfgorc;
		adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
			adapter->stats.base_vfgotc;
		adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
			adapter->stats.base_vfmprc;
	}
}

static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
{
	struct ixgbe_hw *hw = &adapter->hw;

	adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
	adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
	adapter->stats.last_vfgorc |=
		(((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
	adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
	adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
	adapter->stats.last_vfgotc |=
		(((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
	adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);

	adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
	adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
	adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
	adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
	adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
}

1584 1585 1586
static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
{
	struct ixgbe_hw *hw = &adapter->hw;
1587 1588
	int api[] = { ixgbe_mbox_api_11,
		      ixgbe_mbox_api_10,
1589 1590 1591
		      ixgbe_mbox_api_unknown };
	int err = 0, idx = 0;

1592
	spin_lock_bh(&adapter->mbx_lock);
1593 1594 1595 1596 1597 1598 1599 1600

	while (api[idx] != ixgbe_mbox_api_unknown) {
		err = ixgbevf_negotiate_api_version(hw, api[idx]);
		if (!err)
			break;
		idx++;
	}

1601
	spin_unlock_bh(&adapter->mbx_lock);
1602 1603
}

1604
static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
1605 1606 1607 1608 1609 1610
{
	struct net_device *netdev = adapter->netdev;
	struct ixgbe_hw *hw = &adapter->hw;

	ixgbevf_configure_msix(adapter);

1611
	spin_lock_bh(&adapter->mbx_lock);
1612

1613 1614 1615 1616
	if (is_valid_ether_addr(hw->mac.addr))
		hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
	else
		hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1617

1618
	spin_unlock_bh(&adapter->mbx_lock);
1619

1620 1621 1622 1623 1624 1625
	clear_bit(__IXGBEVF_DOWN, &adapter->state);
	ixgbevf_napi_enable_all(adapter);

	/* enable transmits */
	netif_tx_start_all_queues(netdev);

1626 1627 1628
	ixgbevf_save_reset_stats(adapter);
	ixgbevf_init_last_counter_stats(adapter);

1629
	hw->mac.get_link_status = 1;
1630 1631 1632
	mod_timer(&adapter->watchdog_timer, jiffies);
}

1633
void ixgbevf_up(struct ixgbevf_adapter *adapter)
1634 1635 1636 1637 1638
{
	struct ixgbe_hw *hw = &adapter->hw;

	ixgbevf_configure(adapter);

1639
	ixgbevf_up_complete(adapter);
1640 1641 1642 1643

	/* clear any pending interrupts, may auto mask */
	IXGBE_READ_REG(hw, IXGBE_VTEICR);

1644
	ixgbevf_irq_enable(adapter);
1645 1646 1647 1648 1649 1650
}

/**
 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
 * @rx_ring: ring to free buffers from
 **/
1651
static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
1652 1653 1654 1655
{
	unsigned long size;
	unsigned int i;

G
Greg Rose 已提交
1656 1657
	if (!rx_ring->rx_buffer_info)
		return;
1658

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Greg Rose 已提交
1659
	/* Free all the Rx ring sk_buffs */
1660 1661 1662 1663 1664
	for (i = 0; i < rx_ring->count; i++) {
		struct ixgbevf_rx_buffer *rx_buffer_info;

		rx_buffer_info = &rx_ring->rx_buffer_info[i];
		if (rx_buffer_info->dma) {
1665
			dma_unmap_single(rx_ring->dev, rx_buffer_info->dma,
1666
					 rx_ring->rx_buf_len,
1667
					 DMA_FROM_DEVICE);
1668 1669 1670 1671 1672 1673 1674
			rx_buffer_info->dma = 0;
		}
		if (rx_buffer_info->skb) {
			struct sk_buff *skb = rx_buffer_info->skb;
			rx_buffer_info->skb = NULL;
			do {
				struct sk_buff *this = skb;
1675
				skb = IXGBE_CB(skb)->prev;
1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691
				dev_kfree_skb(this);
			} while (skb);
		}
	}

	size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
	memset(rx_ring->rx_buffer_info, 0, size);

	/* Zero out the descriptor ring */
	memset(rx_ring->desc, 0, rx_ring->size);
}

/**
 * ixgbevf_clean_tx_ring - Free Tx Buffers
 * @tx_ring: ring to be cleaned
 **/
1692
static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
1693 1694 1695 1696 1697
{
	struct ixgbevf_tx_buffer *tx_buffer_info;
	unsigned long size;
	unsigned int i;

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Greg Rose 已提交
1698 1699 1700
	if (!tx_ring->tx_buffer_info)
		return;

1701 1702 1703
	/* Free all the Tx ring sk_buffs */
	for (i = 0; i < tx_ring->count; i++) {
		tx_buffer_info = &tx_ring->tx_buffer_info[i];
1704
		ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721
	}

	size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
	memset(tx_ring->tx_buffer_info, 0, size);

	memset(tx_ring->desc, 0, tx_ring->size);
}

/**
 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
 * @adapter: board private structure
 **/
static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
{
	int i;

	for (i = 0; i < adapter->num_rx_queues; i++)
1722
		ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733
}

/**
 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
 * @adapter: board private structure
 **/
static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
{
	int i;

	for (i = 0; i < adapter->num_tx_queues; i++)
1734
		ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
1735 1736 1737 1738 1739 1740
}

void ixgbevf_down(struct ixgbevf_adapter *adapter)
{
	struct net_device *netdev = adapter->netdev;
	struct ixgbe_hw *hw = &adapter->hw;
1741
	int i;
1742 1743 1744

	/* signal that we are down to the interrupt handler */
	set_bit(__IXGBEVF_DOWN, &adapter->state);
1745 1746 1747

	/* disable all enabled rx queues */
	for (i = 0; i < adapter->num_rx_queues; i++)
1748
		ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768

	netif_tx_disable(netdev);

	msleep(10);

	netif_tx_stop_all_queues(netdev);

	ixgbevf_irq_disable(adapter);

	ixgbevf_napi_disable_all(adapter);

	del_timer_sync(&adapter->watchdog_timer);
	/* can't call flush scheduled work here because it can deadlock
	 * if linkwatch_event tries to acquire the rtnl_lock which we are
	 * holding */
	while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
		msleep(1);

	/* disable transmits in the hardware now that interrupts are off */
	for (i = 0; i < adapter->num_tx_queues; i++) {
1769 1770 1771 1772
		u8 reg_idx = adapter->tx_ring[i]->reg_idx;

		IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
				IXGBE_TXDCTL_SWFLSH);
1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786
	}

	netif_carrier_off(netdev);

	if (!pci_channel_offline(adapter->pdev))
		ixgbevf_reset(adapter);

	ixgbevf_clean_all_tx_rings(adapter);
	ixgbevf_clean_all_rx_rings(adapter);
}

void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
{
	WARN_ON(in_interrupt());
G
Greg Rose 已提交
1787

1788 1789 1790
	while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
		msleep(1);

1791 1792
	ixgbevf_down(adapter);
	ixgbevf_up(adapter);
1793 1794 1795 1796 1797 1798 1799 1800 1801

	clear_bit(__IXGBEVF_RESETTING, &adapter->state);
}

void ixgbevf_reset(struct ixgbevf_adapter *adapter)
{
	struct ixgbe_hw *hw = &adapter->hw;
	struct net_device *netdev = adapter->netdev;

D
Don Skidmore 已提交
1802
	if (hw->mac.ops.reset_hw(hw)) {
1803
		hw_dbg(hw, "PF still resetting\n");
D
Don Skidmore 已提交
1804
	} else {
1805
		hw->mac.ops.init_hw(hw);
D
Don Skidmore 已提交
1806 1807
		ixgbevf_negotiate_api(adapter);
	}
1808 1809 1810 1811 1812 1813 1814 1815 1816

	if (is_valid_ether_addr(adapter->hw.mac.addr)) {
		memcpy(netdev->dev_addr, adapter->hw.mac.addr,
		       netdev->addr_len);
		memcpy(netdev->perm_addr, adapter->hw.mac.addr,
		       netdev->addr_len);
	}
}

1817 1818
static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
					int vectors)
1819
{
1820 1821
	int err = 0;
	int vector_threshold;
1822

1823 1824 1825
	/* We'll want at least 2 (vector_threshold):
	 * 1) TxQ[0] + RxQ[0] handler
	 * 2) Other (Link Status Change, etc.)
1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836
	 */
	vector_threshold = MIN_MSIX_COUNT;

	/* The more we get, the more we will assign to Tx/Rx Cleanup
	 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
	 * Right now, we simply care about how many we'll get; we'll
	 * set them up later while requesting irq's.
	 */
	while (vectors >= vector_threshold) {
		err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
				      vectors);
1837
		if (!err || err < 0) /* Success or a nasty failure. */
1838 1839 1840 1841 1842
			break;
		else /* err == number of vectors we should try again with */
			vectors = err;
	}

1843 1844 1845 1846 1847 1848
	if (vectors < vector_threshold)
		err = -ENOMEM;

	if (err) {
		dev_err(&adapter->pdev->dev,
			"Unable to allocate MSI-X interrupts\n");
1849 1850 1851 1852 1853 1854 1855 1856 1857 1858
		kfree(adapter->msix_entries);
		adapter->msix_entries = NULL;
	} else {
		/*
		 * Adjust for only the vectors we'll use, which is minimum
		 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
		 * vectors we were allocated.
		 */
		adapter->num_msix_vectors = vectors;
	}
1859

1860
	return err;
1861 1862
}

1863 1864
/**
 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875
 * @adapter: board private structure to initialize
 *
 * This is the top level queue allocation routine.  The order here is very
 * important, starting with the "most" number of features turned on at once,
 * and ending with the smallest set of features.  This way large combinations
 * can be allocated if they're turned on, and smaller combinations are the
 * fallthrough conditions.
 *
 **/
static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
{
1876 1877 1878 1879 1880
	struct ixgbe_hw *hw = &adapter->hw;
	unsigned int def_q = 0;
	unsigned int num_tcs = 0;
	int err;

1881 1882 1883
	/* Start with base case */
	adapter->num_rx_queues = 1;
	adapter->num_tx_queues = 1;
1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897

	spin_lock_bh(&adapter->mbx_lock);

	/* fetch queue configuration from the PF */
	err = ixgbevf_get_queues(hw, &num_tcs, &def_q);

	spin_unlock_bh(&adapter->mbx_lock);

	if (err)
		return;

	/* we need as many queues as traffic classes */
	if (num_tcs > 1)
		adapter->num_rx_queues = num_tcs;
1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909
}

/**
 * ixgbevf_alloc_queues - Allocate memory for all rings
 * @adapter: board private structure to initialize
 *
 * We allocate one ring per queue at run-time since we don't know the
 * number of queues at compile-time.  The polling_netdev array is
 * intended for Multiqueue, but should work fine with a single queue.
 **/
static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
{
1910 1911
	struct ixgbevf_ring *ring;
	int rx = 0, tx = 0;
1912

1913 1914 1915 1916
	for (; tx < adapter->num_tx_queues; tx++) {
		ring = kzalloc(sizeof(*ring), GFP_KERNEL);
		if (!ring)
			goto err_allocation;
1917

1918 1919 1920 1921 1922
		ring->dev = &adapter->pdev->dev;
		ring->netdev = adapter->netdev;
		ring->count = adapter->tx_ring_count;
		ring->queue_index = tx;
		ring->reg_idx = tx;
1923

1924
		adapter->tx_ring[tx] = ring;
1925 1926
	}

1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939
	for (; rx < adapter->num_rx_queues; rx++) {
		ring = kzalloc(sizeof(*ring), GFP_KERNEL);
		if (!ring)
			goto err_allocation;

		ring->dev = &adapter->pdev->dev;
		ring->netdev = adapter->netdev;

		ring->count = adapter->rx_ring_count;
		ring->queue_index = rx;
		ring->reg_idx = rx;

		adapter->rx_ring[rx] = ring;
1940 1941 1942 1943
	}

	return 0;

1944 1945 1946 1947 1948 1949 1950 1951 1952 1953
err_allocation:
	while (tx) {
		kfree(adapter->tx_ring[--tx]);
		adapter->tx_ring[tx] = NULL;
	}

	while (rx) {
		kfree(adapter->rx_ring[--rx]);
		adapter->rx_ring[rx] = NULL;
	}
1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965
	return -ENOMEM;
}

/**
 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
 * @adapter: board private structure to initialize
 *
 * Attempt to configure the interrupts using the best available
 * capabilities of the hardware and the kernel.
 **/
static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
{
1966
	struct net_device *netdev = adapter->netdev;
1967 1968 1969 1970 1971 1972 1973
	int err = 0;
	int vector, v_budget;

	/*
	 * It's easy to be greedy for MSI-X vectors, but it really
	 * doesn't do us much good if we have a lot more vectors
	 * than CPU's.  So let's be conservative and only ask for
1974 1975
	 * (roughly) the same number of vectors as there are CPU's.
	 * The default is to use pairs of vectors.
1976
	 */
1977 1978 1979
	v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
	v_budget = min_t(int, v_budget, num_online_cpus());
	v_budget += NON_Q_VECTORS;
1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992

	/* A failure in MSI-X entry allocation isn't fatal, but it does
	 * mean we disable MSI-X capabilities of the adapter. */
	adapter->msix_entries = kcalloc(v_budget,
					sizeof(struct msix_entry), GFP_KERNEL);
	if (!adapter->msix_entries) {
		err = -ENOMEM;
		goto out;
	}

	for (vector = 0; vector < v_budget; vector++)
		adapter->msix_entries[vector].entry = vector;

1993 1994 1995
	err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
	if (err)
		goto out;
1996

1997 1998 1999 2000 2001 2002
	err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
	if (err)
		goto out;

	err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);

2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026
out:
	return err;
}

/**
 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
 * @adapter: board private structure to initialize
 *
 * We allocate one q_vector per queue interrupt.  If allocation fails we
 * return -ENOMEM.
 **/
static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
{
	int q_idx, num_q_vectors;
	struct ixgbevf_q_vector *q_vector;

	num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;

	for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
		q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
		if (!q_vector)
			goto err_out;
		q_vector->adapter = adapter;
		q_vector->v_idx = q_idx;
2027 2028
		netif_napi_add(adapter->netdev, &q_vector->napi,
			       ixgbevf_poll, 64);
2029 2030 2031
#ifdef CONFIG_NET_RX_BUSY_POLL
		napi_hash_add(&q_vector->napi);
#endif
2032 2033 2034 2035 2036 2037 2038 2039 2040
		adapter->q_vector[q_idx] = q_vector;
	}

	return 0;

err_out:
	while (q_idx) {
		q_idx--;
		q_vector = adapter->q_vector[q_idx];
2041 2042 2043
#ifdef CONFIG_NET_RX_BUSY_POLL
		napi_hash_del(&q_vector->napi);
#endif
2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060
		netif_napi_del(&q_vector->napi);
		kfree(q_vector);
		adapter->q_vector[q_idx] = NULL;
	}
	return -ENOMEM;
}

/**
 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
 * @adapter: board private structure to initialize
 *
 * This function frees the memory allocated to the q_vectors.  In addition if
 * NAPI is enabled it will delete any references to the NAPI struct prior
 * to freeing the q_vector.
 **/
static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
{
2061
	int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2062 2063 2064 2065 2066

	for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
		struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];

		adapter->q_vector[q_idx] = NULL;
2067 2068 2069
#ifdef CONFIG_NET_RX_BUSY_POLL
		napi_hash_del(&q_vector->napi);
#endif
2070
		netif_napi_del(&q_vector->napi);
2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114
		kfree(q_vector);
	}
}

/**
 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
 * @adapter: board private structure
 *
 **/
static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
{
	pci_disable_msix(adapter->pdev);
	kfree(adapter->msix_entries);
	adapter->msix_entries = NULL;
}

/**
 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
 * @adapter: board private structure to initialize
 *
 **/
static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
{
	int err;

	/* Number of supported queues */
	ixgbevf_set_num_queues(adapter);

	err = ixgbevf_set_interrupt_capability(adapter);
	if (err) {
		hw_dbg(&adapter->hw,
		       "Unable to setup interrupt capabilities\n");
		goto err_set_interrupt;
	}

	err = ixgbevf_alloc_q_vectors(adapter);
	if (err) {
		hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
		       "vectors\n");
		goto err_alloc_q_vectors;
	}

	err = ixgbevf_alloc_queues(adapter);
	if (err) {
2115
		pr_err("Unable to allocate memory for queues\n");
2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134
		goto err_alloc_queues;
	}

	hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
	       "Tx Queue count = %u\n",
	       (adapter->num_rx_queues > 1) ? "Enabled" :
	       "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);

	set_bit(__IXGBEVF_DOWN, &adapter->state);

	return 0;
err_alloc_queues:
	ixgbevf_free_q_vectors(adapter);
err_alloc_q_vectors:
	ixgbevf_reset_interrupt_capability(adapter);
err_set_interrupt:
	return err;
}

2135 2136 2137 2138 2139 2140 2141 2142 2143
/**
 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
 * @adapter: board private structure to clear interrupt scheme on
 *
 * We go through and clear interrupt specific resources and reset the structure
 * to pre-load conditions
 **/
static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
{
2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154
	int i;

	for (i = 0; i < adapter->num_tx_queues; i++) {
		kfree(adapter->tx_ring[i]);
		adapter->tx_ring[i] = NULL;
	}
	for (i = 0; i < adapter->num_rx_queues; i++) {
		kfree(adapter->rx_ring[i]);
		adapter->rx_ring[i] = NULL;
	}

2155 2156 2157 2158 2159 2160 2161
	adapter->num_tx_queues = 0;
	adapter->num_rx_queues = 0;

	ixgbevf_free_q_vectors(adapter);
	ixgbevf_reset_interrupt_capability(adapter);
}

2162 2163 2164 2165 2166 2167 2168 2169 2170
/**
 * ixgbevf_sw_init - Initialize general software structures
 * (struct ixgbevf_adapter)
 * @adapter: board private structure to initialize
 *
 * ixgbevf_sw_init initializes the Adapter private data structure.
 * Fields are initialized based on PCI device information and
 * OS network device settings (MTU size).
 **/
2171
static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2172 2173 2174
{
	struct ixgbe_hw *hw = &adapter->hw;
	struct pci_dev *pdev = adapter->pdev;
2175
	struct net_device *netdev = adapter->netdev;
2176 2177 2178 2179 2180 2181
	int err;

	/* PCI config space info */

	hw->vendor_id = pdev->vendor;
	hw->device_id = pdev->device;
2182
	hw->revision_id = pdev->revision;
2183 2184 2185 2186
	hw->subsystem_vendor_id = pdev->subsystem_vendor;
	hw->subsystem_device_id = pdev->subsystem_device;

	hw->mbx.ops.init_params(hw);
2187 2188 2189 2190 2191

	/* assume legacy case in which PF would only give VF 2 queues */
	hw->mac.max_tx_queues = 2;
	hw->mac.max_rx_queues = 2;

D
Don Skidmore 已提交
2192 2193 2194
	/* lock to protect mailbox accesses */
	spin_lock_init(&adapter->mbx_lock);

2195 2196 2197
	err = hw->mac.ops.reset_hw(hw);
	if (err) {
		dev_info(&pdev->dev,
2198
			 "PF still in reset state.  Is the PF interface up?\n");
2199 2200 2201
	} else {
		err = hw->mac.ops.init_hw(hw);
		if (err) {
2202
			pr_err("init_shared_code failed: %d\n", err);
2203 2204
			goto out;
		}
D
Don Skidmore 已提交
2205
		ixgbevf_negotiate_api(adapter);
2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218
		err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
		if (err)
			dev_info(&pdev->dev, "Error reading MAC address\n");
		else if (is_zero_ether_addr(adapter->hw.mac.addr))
			dev_info(&pdev->dev,
				 "MAC address not assigned by administrator.\n");
		memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
	}

	if (!is_valid_ether_addr(netdev->dev_addr)) {
		dev_info(&pdev->dev, "Assigning random MAC address\n");
		eth_hw_addr_random(netdev);
		memcpy(hw->mac.addr, netdev->dev_addr, netdev->addr_len);
2219 2220 2221
	}

	/* Enable dynamic interrupt throttling rates */
2222 2223
	adapter->rx_itr_setting = 1;
	adapter->tx_itr_setting = 1;
2224 2225 2226 2227 2228 2229

	/* set default ring sizes */
	adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
	adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;

	set_bit(__IXGBEVF_DOWN, &adapter->state);
2230
	return 0;
2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264

out:
	return err;
}

#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter)	\
	{							\
		u32 current_counter = IXGBE_READ_REG(hw, reg);	\
		if (current_counter < last_counter)		\
			counter += 0x100000000LL;		\
		last_counter = current_counter;			\
		counter &= 0xFFFFFFFF00000000LL;		\
		counter |= current_counter;			\
	}

#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
	{								 \
		u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb);	 \
		u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb);	 \
		u64 current_counter = (current_counter_msb << 32) |      \
			current_counter_lsb;                             \
		if (current_counter < last_counter)			 \
			counter += 0x1000000000LL;			 \
		last_counter = current_counter;				 \
		counter &= 0xFFFFFFF000000000LL;			 \
		counter |= current_counter;				 \
	}
/**
 * ixgbevf_update_stats - Update the board statistics counters.
 * @adapter: board private structure
 **/
void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
{
	struct ixgbe_hw *hw = &adapter->hw;
2265
	int i;
2266

G
Greg Rose 已提交
2267 2268 2269
	if (!adapter->link_up)
		return;

2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281
	UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
				adapter->stats.vfgprc);
	UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
				adapter->stats.vfgptc);
	UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
				adapter->stats.last_vfgorc,
				adapter->stats.vfgorc);
	UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
				adapter->stats.last_vfgotc,
				adapter->stats.vfgotc);
	UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
				adapter->stats.vfmprc);
2282 2283 2284

	for (i = 0;  i  < adapter->num_rx_queues;  i++) {
		adapter->hw_csum_rx_error +=
2285 2286
			adapter->rx_ring[i]->hw_csum_rx_error;
		adapter->rx_ring[i]->hw_csum_rx_error = 0;
2287
	}
2288 2289 2290 2291 2292 2293 2294 2295 2296 2297
}

/**
 * ixgbevf_watchdog - Timer Call-back
 * @data: pointer to adapter cast into an unsigned long
 **/
static void ixgbevf_watchdog(unsigned long data)
{
	struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
	struct ixgbe_hw *hw = &adapter->hw;
2298
	u32 eics = 0;
2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311
	int i;

	/*
	 * Do the watchdog outside of interrupt context due to the lovely
	 * delays that some of the newer hardware requires
	 */

	if (test_bit(__IXGBEVF_DOWN, &adapter->state))
		goto watchdog_short_circuit;

	/* get one bit for every active tx/rx interrupt vector */
	for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
		struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2312
		if (qv->rx.ring || qv->tx.ring)
2313
			eics |= 1 << i;
2314 2315
	}

2316
	IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361

watchdog_short_circuit:
	schedule_work(&adapter->watchdog_task);
}

/**
 * ixgbevf_tx_timeout - Respond to a Tx Hang
 * @netdev: network interface device structure
 **/
static void ixgbevf_tx_timeout(struct net_device *netdev)
{
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);

	/* Do the reset outside of interrupt context */
	schedule_work(&adapter->reset_task);
}

static void ixgbevf_reset_task(struct work_struct *work)
{
	struct ixgbevf_adapter *adapter;
	adapter = container_of(work, struct ixgbevf_adapter, reset_task);

	/* If we're already down or resetting, just bail */
	if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
	    test_bit(__IXGBEVF_RESETTING, &adapter->state))
		return;

	adapter->tx_timeout_count++;

	ixgbevf_reinit_locked(adapter);
}

/**
 * ixgbevf_watchdog_task - worker thread to bring link up
 * @work: pointer to work_struct containing our data
 **/
static void ixgbevf_watchdog_task(struct work_struct *work)
{
	struct ixgbevf_adapter *adapter = container_of(work,
						       struct ixgbevf_adapter,
						       watchdog_task);
	struct net_device *netdev = adapter->netdev;
	struct ixgbe_hw *hw = &adapter->hw;
	u32 link_speed = adapter->link_speed;
	bool link_up = adapter->link_up;
2362
	s32 need_reset;
2363

2364 2365
	ixgbevf_queue_reset_subtask(adapter);

2366 2367 2368 2369 2370 2371
	adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;

	/*
	 * Always check the link on the watchdog because we have
	 * no LSC interrupt
	 */
2372
	spin_lock_bh(&adapter->mbx_lock);
2373

2374
	need_reset = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
2375

2376
	spin_unlock_bh(&adapter->mbx_lock);
2377

2378 2379 2380 2381 2382 2383 2384
	if (need_reset) {
		adapter->link_up = link_up;
		adapter->link_speed = link_speed;
		netif_carrier_off(netdev);
		netif_tx_stop_all_queues(netdev);
		schedule_work(&adapter->reset_task);
		goto pf_has_reset;
2385 2386 2387 2388 2389 2390
	}
	adapter->link_up = link_up;
	adapter->link_speed = link_speed;

	if (link_up) {
		if (!netif_carrier_ok(netdev)) {
2391 2392 2393 2394 2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405
			char *link_speed_string;
			switch (link_speed) {
			case IXGBE_LINK_SPEED_10GB_FULL:
				link_speed_string = "10 Gbps";
				break;
			case IXGBE_LINK_SPEED_1GB_FULL:
				link_speed_string = "1 Gbps";
				break;
			case IXGBE_LINK_SPEED_100_FULL:
				link_speed_string = "100 Mbps";
				break;
			default:
				link_speed_string = "unknown speed";
				break;
			}
G
Greg Rose 已提交
2406
			dev_info(&adapter->pdev->dev,
2407
				"NIC Link is Up, %s\n", link_speed_string);
2408 2409 2410 2411 2412 2413 2414
			netif_carrier_on(netdev);
			netif_tx_wake_all_queues(netdev);
		}
	} else {
		adapter->link_up = false;
		adapter->link_speed = 0;
		if (netif_carrier_ok(netdev)) {
G
Greg Rose 已提交
2415
			dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2416 2417 2418 2419 2420 2421 2422
			netif_carrier_off(netdev);
			netif_tx_stop_all_queues(netdev);
		}
	}

	ixgbevf_update_stats(adapter);

2423
pf_has_reset:
2424 2425 2426 2427 2428 2429 2430 2431 2432 2433 2434 2435 2436 2437
	/* Reset the timer */
	if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
		mod_timer(&adapter->watchdog_timer,
			  round_jiffies(jiffies + (2 * HZ)));

	adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
}

/**
 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
 * @tx_ring: Tx descriptor ring for a specific queue
 *
 * Free all transmit software resources
 **/
2438
void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
2439
{
2440
	ixgbevf_clean_tx_ring(tx_ring);
2441 2442 2443 2444

	vfree(tx_ring->tx_buffer_info);
	tx_ring->tx_buffer_info = NULL;

2445 2446 2447 2448
	/* if not set, then don't free */
	if (!tx_ring->desc)
		return;

2449
	dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
2450
			  tx_ring->dma);
2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465

	tx_ring->desc = NULL;
}

/**
 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
 * @adapter: board private structure
 *
 * Free all transmit software resources
 **/
static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
{
	int i;

	for (i = 0; i < adapter->num_tx_queues; i++)
2466
		if (adapter->tx_ring[i]->desc)
2467
			ixgbevf_free_tx_resources(adapter->tx_ring[i]);
2468 2469 2470 2471 2472 2473 2474 2475
}

/**
 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
 * @tx_ring:    tx descriptor ring (for a specific queue) to setup
 *
 * Return 0 on success, negative on failure
 **/
2476
int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
2477 2478 2479 2480
{
	int size;

	size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
E
Eric Dumazet 已提交
2481
	tx_ring->tx_buffer_info = vzalloc(size);
2482 2483 2484 2485 2486 2487 2488
	if (!tx_ring->tx_buffer_info)
		goto err;

	/* round up to nearest 4K */
	tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
	tx_ring->size = ALIGN(tx_ring->size, 4096);

2489
	tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
2490
					   &tx_ring->dma, GFP_KERNEL);
2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518
	if (!tx_ring->desc)
		goto err;

	return 0;

err:
	vfree(tx_ring->tx_buffer_info);
	tx_ring->tx_buffer_info = NULL;
	hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
	       "descriptor ring\n");
	return -ENOMEM;
}

/**
 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
 * @adapter: board private structure
 *
 * If this function returns with an error, then it's possible one or
 * more of the rings is populated (while the rest are not).  It is the
 * callers duty to clean those orphaned rings.
 *
 * Return 0 on success, negative on failure
 **/
static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
{
	int i, err = 0;

	for (i = 0; i < adapter->num_tx_queues; i++) {
2519
		err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
2520 2521 2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535
		if (!err)
			continue;
		hw_dbg(&adapter->hw,
		       "Allocation for Tx Queue %u failed\n", i);
		break;
	}

	return err;
}

/**
 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
 * @rx_ring:    rx descriptor ring (for a specific queue) to setup
 *
 * Returns 0 on success, negative on failure
 **/
2536
int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring)
2537 2538 2539 2540
{
	int size;

	size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
E
Eric Dumazet 已提交
2541
	rx_ring->rx_buffer_info = vzalloc(size);
2542
	if (!rx_ring->rx_buffer_info)
2543
		goto err;
2544 2545 2546 2547 2548

	/* Round up to nearest 4K */
	rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
	rx_ring->size = ALIGN(rx_ring->size, 4096);

2549
	rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
2550
					   &rx_ring->dma, GFP_KERNEL);
2551

2552 2553
	if (!rx_ring->desc)
		goto err;
2554 2555

	return 0;
2556 2557 2558 2559
err:
	vfree(rx_ring->rx_buffer_info);
	rx_ring->rx_buffer_info = NULL;
	dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577
	return -ENOMEM;
}

/**
 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
 * @adapter: board private structure
 *
 * If this function returns with an error, then it's possible one or
 * more of the rings is populated (while the rest are not).  It is the
 * callers duty to clean those orphaned rings.
 *
 * Return 0 on success, negative on failure
 **/
static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
{
	int i, err = 0;

	for (i = 0; i < adapter->num_rx_queues; i++) {
2578
		err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]);
2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593
		if (!err)
			continue;
		hw_dbg(&adapter->hw,
		       "Allocation for Rx Queue %u failed\n", i);
		break;
	}
	return err;
}

/**
 * ixgbevf_free_rx_resources - Free Rx Resources
 * @rx_ring: ring to clean the resources from
 *
 * Free all receive software resources
 **/
2594
void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
2595
{
2596
	ixgbevf_clean_rx_ring(rx_ring);
2597 2598 2599 2600

	vfree(rx_ring->rx_buffer_info);
	rx_ring->rx_buffer_info = NULL;

2601
	dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
2602
			  rx_ring->dma);
2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617

	rx_ring->desc = NULL;
}

/**
 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
 * @adapter: board private structure
 *
 * Free all receive software resources
 **/
static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
{
	int i;

	for (i = 0; i < adapter->num_rx_queues; i++)
2618
		if (adapter->rx_ring[i]->desc)
2619
			ixgbevf_free_rx_resources(adapter->rx_ring[i]);
2620 2621 2622 2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639
}

/**
 * ixgbevf_open - Called when a network interface is made active
 * @netdev: network interface device structure
 *
 * Returns 0 on success, negative value on failure
 *
 * The open entry point is called when a network interface is made
 * active by the system (IFF_UP).  At this point all resources needed
 * for transmit and receive operations are allocated, the interrupt
 * handler is registered with the OS, the watchdog timer is started,
 * and the stack is notified that the interface is ready.
 **/
static int ixgbevf_open(struct net_device *netdev)
{
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
	struct ixgbe_hw *hw = &adapter->hw;
	int err;

2640 2641 2642 2643 2644 2645 2646 2647 2648
	/* A previous failure to open the device because of a lack of
	 * available MSIX vector resources may have reset the number
	 * of msix vectors variable to zero.  The only way to recover
	 * is to unload/reload the driver and hope that the system has
	 * been able to recover some MSIX vector resources.
	 */
	if (!adapter->num_msix_vectors)
		return -ENOMEM;

2649 2650 2651 2652 2653 2654 2655 2656 2657 2658
	/* disallow open during test */
	if (test_bit(__IXGBEVF_TESTING, &adapter->state))
		return -EBUSY;

	if (hw->adapter_stopped) {
		ixgbevf_reset(adapter);
		/* if adapter is still stopped then PF isn't up and
		 * the vf can't start. */
		if (hw->adapter_stopped) {
			err = IXGBE_ERR_MBX;
2659 2660
			pr_err("Unable to start - perhaps the PF Driver isn't "
			       "up yet\n");
2661 2662 2663 2664 2665 2666 2667 2668 2669 2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680 2681 2682 2683
			goto err_setup_reset;
		}
	}

	/* allocate transmit descriptors */
	err = ixgbevf_setup_all_tx_resources(adapter);
	if (err)
		goto err_setup_tx;

	/* allocate receive descriptors */
	err = ixgbevf_setup_all_rx_resources(adapter);
	if (err)
		goto err_setup_rx;

	ixgbevf_configure(adapter);

	/*
	 * Map the Tx/Rx rings to the vectors we were allotted.
	 * if request_irq will be called in this function map_rings
	 * must be called *before* up_complete
	 */
	ixgbevf_map_rings_to_vectors(adapter);

2684
	ixgbevf_up_complete(adapter);
2685 2686 2687 2688 2689 2690 2691

	/* clear any pending interrupts, may auto mask */
	IXGBE_READ_REG(hw, IXGBE_VTEICR);
	err = ixgbevf_request_irq(adapter);
	if (err)
		goto err_req_irq;

2692
	ixgbevf_irq_enable(adapter);
2693 2694 2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707 2708 2709 2710 2711 2712 2713 2714 2715 2716 2717 2718 2719 2720 2721 2722 2723 2724 2725 2726 2727 2728 2729 2730 2731 2732

	return 0;

err_req_irq:
	ixgbevf_down(adapter);
err_setup_rx:
	ixgbevf_free_all_rx_resources(adapter);
err_setup_tx:
	ixgbevf_free_all_tx_resources(adapter);
	ixgbevf_reset(adapter);

err_setup_reset:

	return err;
}

/**
 * ixgbevf_close - Disables a network interface
 * @netdev: network interface device structure
 *
 * Returns 0, this is not allowed to fail
 *
 * The close entry point is called when an interface is de-activated
 * by the OS.  The hardware is still under the drivers control, but
 * needs to be disabled.  A global MAC reset is issued to stop the
 * hardware, and all transmit and receive resources are freed.
 **/
static int ixgbevf_close(struct net_device *netdev)
{
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);

	ixgbevf_down(adapter);
	ixgbevf_free_irq(adapter);

	ixgbevf_free_all_tx_resources(adapter);
	ixgbevf_free_all_rx_resources(adapter);

	return 0;
}

2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756 2757 2758 2759 2760
static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
{
	struct net_device *dev = adapter->netdev;

	if (!(adapter->flags & IXGBEVF_FLAG_QUEUE_RESET_REQUESTED))
		return;

	adapter->flags &= ~IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;

	/* if interface is down do nothing */
	if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
	    test_bit(__IXGBEVF_RESETTING, &adapter->state))
		return;

	/* Hardware has to reinitialize queues and interrupts to
	 * match packet buffer alignment. Unfortunately, the
	 * hardware is not flexible enough to do this dynamically.
	 */
	if (netif_running(dev))
		ixgbevf_close(dev);

	ixgbevf_clear_interrupt_scheme(adapter);
	ixgbevf_init_interrupt_scheme(adapter);

	if (netif_running(dev))
		ixgbevf_open(dev);
}

2761 2762 2763
static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
				u32 vlan_macip_lens, u32 type_tucmd,
				u32 mss_l4len_idx)
2764 2765
{
	struct ixgbe_adv_tx_context_desc *context_desc;
2766
	u16 i = tx_ring->next_to_use;
2767

2768
	context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
2769

2770 2771
	i++;
	tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2772

2773 2774
	/* set bits to identify this as an advanced context descriptor */
	type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
2775

2776 2777 2778 2779 2780 2781 2782
	context_desc->vlan_macip_lens	= cpu_to_le32(vlan_macip_lens);
	context_desc->seqnum_seed	= 0;
	context_desc->type_tucmd_mlhl	= cpu_to_le32(type_tucmd);
	context_desc->mss_l4len_idx	= cpu_to_le32(mss_l4len_idx);
}

static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
2783 2784
		       struct ixgbevf_tx_buffer *first,
		       u8 *hdr_len)
2785
{
2786
	struct sk_buff *skb = first->skb;
2787 2788 2789 2790 2791
	u32 vlan_macip_lens, type_tucmd;
	u32 mss_l4len_idx, l4len;

	if (!skb_is_gso(skb))
		return 0;
2792

2793 2794 2795 2796
	if (skb_header_cloned(skb)) {
		int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
		if (err)
			return err;
2797 2798
	}

2799 2800 2801 2802 2803 2804 2805 2806 2807 2808 2809 2810
	/* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
	type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;

	if (skb->protocol == htons(ETH_P_IP)) {
		struct iphdr *iph = ip_hdr(skb);
		iph->tot_len = 0;
		iph->check = 0;
		tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
							 iph->daddr, 0,
							 IPPROTO_TCP,
							 0);
		type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
2811 2812 2813
		first->tx_flags |= IXGBE_TX_FLAGS_TSO |
				   IXGBE_TX_FLAGS_CSUM |
				   IXGBE_TX_FLAGS_IPV4;
2814 2815 2816 2817 2818 2819
	} else if (skb_is_gso_v6(skb)) {
		ipv6_hdr(skb)->payload_len = 0;
		tcp_hdr(skb)->check =
		    ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
				     &ipv6_hdr(skb)->daddr,
				     0, IPPROTO_TCP, 0);
2820 2821
		first->tx_flags |= IXGBE_TX_FLAGS_TSO |
				   IXGBE_TX_FLAGS_CSUM;
2822 2823 2824 2825 2826 2827 2828
	}

	/* compute header lengths */
	l4len = tcp_hdrlen(skb);
	*hdr_len += l4len;
	*hdr_len = skb_transport_offset(skb) + l4len;

2829 2830 2831 2832
	/* update gso size and bytecount with header size */
	first->gso_segs = skb_shinfo(skb)->gso_segs;
	first->bytecount += (first->gso_segs - 1) * *hdr_len;

2833 2834 2835 2836 2837 2838 2839 2840
	/* mss_l4len_id: use 1 as index for TSO */
	mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
	mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
	mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;

	/* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
	vlan_macip_lens = skb_network_header_len(skb);
	vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
2841
	vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
2842 2843 2844 2845 2846

	ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
			    type_tucmd, mss_l4len_idx);

	return 1;
2847 2848
}

2849 2850
static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
			    struct ixgbevf_tx_buffer *first)
2851
{
2852
	struct sk_buff *skb = first->skb;
2853 2854 2855
	u32 vlan_macip_lens = 0;
	u32 mss_l4len_idx = 0;
	u32 type_tucmd = 0;
2856

2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872
	if (skb->ip_summed == CHECKSUM_PARTIAL) {
		u8 l4_hdr = 0;
		switch (skb->protocol) {
		case __constant_htons(ETH_P_IP):
			vlan_macip_lens |= skb_network_header_len(skb);
			type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
			l4_hdr = ip_hdr(skb)->protocol;
			break;
		case __constant_htons(ETH_P_IPV6):
			vlan_macip_lens |= skb_network_header_len(skb);
			l4_hdr = ipv6_hdr(skb)->nexthdr;
			break;
		default:
			if (unlikely(net_ratelimit())) {
				dev_warn(tx_ring->dev,
				 "partial checksum but proto=%x!\n",
2873
				 first->protocol);
2874 2875 2876
			}
			break;
		}
2877

2878 2879 2880 2881 2882 2883 2884 2885 2886 2887 2888 2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900
		switch (l4_hdr) {
		case IPPROTO_TCP:
			type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
			mss_l4len_idx = tcp_hdrlen(skb) <<
					IXGBE_ADVTXD_L4LEN_SHIFT;
			break;
		case IPPROTO_SCTP:
			type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
			mss_l4len_idx = sizeof(struct sctphdr) <<
					IXGBE_ADVTXD_L4LEN_SHIFT;
			break;
		case IPPROTO_UDP:
			mss_l4len_idx = sizeof(struct udphdr) <<
					IXGBE_ADVTXD_L4LEN_SHIFT;
			break;
		default:
			if (unlikely(net_ratelimit())) {
				dev_warn(tx_ring->dev,
				 "partial checksum but l4 proto=%x!\n",
				 l4_hdr);
			}
			break;
		}
2901 2902 2903

		/* update TX checksum flag */
		first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
2904 2905
	}

2906 2907
	/* vlan_macip_lens: MACLEN, VLAN tag */
	vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
2908
	vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
2909 2910 2911

	ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
			    type_tucmd, mss_l4len_idx);
2912 2913
}

2914
static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
2915
{
2916 2917 2918 2919
	/* set type for advanced descriptor with frame checksum insertion */
	__le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
				      IXGBE_ADVTXD_DCMD_IFCS |
				      IXGBE_ADVTXD_DCMD_DEXT);
2920

2921 2922 2923
	/* set HW vlan bit if vlan is present */
	if (tx_flags & IXGBE_TX_FLAGS_VLAN)
		cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
2924

2925 2926 2927
	/* set segmentation enable bits for TSO/FSO */
	if (tx_flags & IXGBE_TX_FLAGS_TSO)
		cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
2928

2929 2930
	return cmd_type;
}
2931

2932 2933 2934 2935
static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
				     u32 tx_flags, unsigned int paylen)
{
	__le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
2936

2937 2938 2939
	/* enable L4 checksum for TSO and TX checksum offload */
	if (tx_flags & IXGBE_TX_FLAGS_CSUM)
		olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
2940

2941 2942 2943
	/* enble IPv4 checksum for TSO */
	if (tx_flags & IXGBE_TX_FLAGS_IPV4)
		olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
2944

2945 2946 2947
	/* use index 1 context for TSO/FSO/FCOE */
	if (tx_flags & IXGBE_TX_FLAGS_TSO)
		olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
2948

2949 2950 2951 2952
	/* Check Context must be set if Tx switch is enabled, which it
	 * always is for case where virtual functions are running
	 */
	olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
2953

2954 2955
	tx_desc->read.olinfo_status = olinfo_status;
}
2956

2957 2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971
static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
			   struct ixgbevf_tx_buffer *first,
			   const u8 hdr_len)
{
	dma_addr_t dma;
	struct sk_buff *skb = first->skb;
	struct ixgbevf_tx_buffer *tx_buffer;
	union ixgbe_adv_tx_desc *tx_desc;
	struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
	unsigned int data_len = skb->data_len;
	unsigned int size = skb_headlen(skb);
	unsigned int paylen = skb->len - hdr_len;
	u32 tx_flags = first->tx_flags;
	__le32 cmd_type;
	u16 i = tx_ring->next_to_use;
2972

2973
	tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
2974

2975 2976
	ixgbevf_tx_olinfo_status(tx_desc, tx_flags, paylen);
	cmd_type = ixgbevf_tx_cmd_type(tx_flags);
2977

2978 2979 2980
	dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
	if (dma_mapping_error(tx_ring->dev, dma))
		goto dma_error;
2981

2982 2983 2984
	/* record length, and DMA address */
	dma_unmap_len_set(first, len, size);
	dma_unmap_addr_set(first, dma, dma);
2985

2986
	tx_desc->read.buffer_addr = cpu_to_le64(dma);
2987

2988 2989 2990 2991
	for (;;) {
		while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
			tx_desc->read.cmd_type_len =
				cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
2992

2993 2994 2995 2996 2997 2998
			i++;
			tx_desc++;
			if (i == tx_ring->count) {
				tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
				i = 0;
			}
2999

3000 3001
			dma += IXGBE_MAX_DATA_PER_TXD;
			size -= IXGBE_MAX_DATA_PER_TXD;
3002

3003 3004 3005
			tx_desc->read.buffer_addr = cpu_to_le64(dma);
			tx_desc->read.olinfo_status = 0;
		}
3006

3007 3008
		if (likely(!data_len))
			break;
3009

3010
		tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
3011

3012 3013 3014 3015 3016 3017
		i++;
		tx_desc++;
		if (i == tx_ring->count) {
			tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
			i = 0;
		}
3018

3019 3020
		size = skb_frag_size(frag);
		data_len -= size;
3021

3022 3023 3024 3025
		dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
				       DMA_TO_DEVICE);
		if (dma_mapping_error(tx_ring->dev, dma))
			goto dma_error;
3026

3027 3028 3029
		tx_buffer = &tx_ring->tx_buffer_info[i];
		dma_unmap_len_set(tx_buffer, len, size);
		dma_unmap_addr_set(tx_buffer, dma, dma);
3030

3031 3032 3033 3034
		tx_desc->read.buffer_addr = cpu_to_le64(dma);
		tx_desc->read.olinfo_status = 0;

		frag++;
3035
	}
3036

3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049
	/* write last descriptor with RS and EOP bits */
	cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
	tx_desc->read.cmd_type_len = cmd_type;

	/* set the timestamp */
	first->time_stamp = jiffies;

	/* Force memory writes to complete before letting h/w know there
	 * are new descriptors to fetch.  (Only applicable for weak-ordered
	 * memory model archs, such as IA-64).
	 *
	 * We also need this memory barrier (wmb) to make certain all of the
	 * status bits have been updated before next_to_watch is written.
3050
	 */
3051
	wmb();
3052

3053 3054
	/* set next_to_watch value indicating a packet is present */
	first->next_to_watch = tx_desc;
3055

3056 3057 3058
	i++;
	if (i == tx_ring->count)
		i = 0;
3059

3060
	tx_ring->next_to_use = i;
3061

3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075 3076 3077 3078
	/* notify HW of packet */
	writel(i, tx_ring->tail);

	return;
dma_error:
	dev_err(tx_ring->dev, "TX DMA map failed\n");

	/* clear dma mappings for failed tx_buffer_info map */
	for (;;) {
		tx_buffer = &tx_ring->tx_buffer_info[i];
		ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer);
		if (tx_buffer == first)
			break;
		if (i == 0)
			i = tx_ring->count;
		i--;
	}
3079 3080 3081 3082

	tx_ring->next_to_use = i;
}

3083
static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
3084
{
3085
	netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
3086 3087 3088 3089 3090 3091 3092
	/* Herbert's original patch had:
	 *  smp_mb__after_netif_stop_queue();
	 * but since that doesn't exist yet, just open code it. */
	smp_mb();

	/* We need to check again in a case another CPU has just
	 * made room available. */
D
Don Skidmore 已提交
3093
	if (likely(ixgbevf_desc_unused(tx_ring) < size))
3094 3095 3096
		return -EBUSY;

	/* A reprieve! - use start_queue because it doesn't call schedule */
3097
	netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
3098 3099
	++tx_ring->tx_stats.restart_queue;

3100 3101 3102
	return 0;
}

3103
static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
3104
{
D
Don Skidmore 已提交
3105
	if (likely(ixgbevf_desc_unused(tx_ring) >= size))
3106
		return 0;
3107
	return __ixgbevf_maybe_stop_tx(tx_ring, size);
3108 3109 3110 3111 3112
}

static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
{
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3113
	struct ixgbevf_tx_buffer *first;
3114
	struct ixgbevf_ring *tx_ring;
3115 3116
	int tso;
	u32 tx_flags = 0;
3117 3118 3119 3120
	u16 count = TXD_USE_COUNT(skb_headlen(skb));
#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
	unsigned short f;
#endif
3121
	u8 hdr_len = 0;
3122
	u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
3123

3124
	if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
3125 3126 3127
		dev_kfree_skb(skb);
		return NETDEV_TX_OK;
	}
3128

3129
	tx_ring = adapter->tx_ring[skb->queue_mapping];
3130

3131 3132 3133 3134 3135 3136 3137 3138 3139 3140 3141 3142 3143
	/*
	 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
	 *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
	 *       + 2 desc gap to keep tail from touching head,
	 *       + 1 desc for context descriptor,
	 * otherwise try next time
	 */
#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
	for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
		count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
#else
	count += skb_shinfo(skb)->nr_frags;
#endif
3144
	if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
3145
		tx_ring->tx_stats.tx_busy++;
3146 3147 3148
		return NETDEV_TX_BUSY;
	}

3149 3150 3151 3152 3153 3154
	/* record the location of the first descriptor for this packet */
	first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
	first->skb = skb;
	first->bytecount = skb->len;
	first->gso_segs = 1;

3155
	if (vlan_tx_tag_present(skb)) {
3156 3157 3158 3159 3160
		tx_flags |= vlan_tx_tag_get(skb);
		tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
		tx_flags |= IXGBE_TX_FLAGS_VLAN;
	}

3161 3162 3163
	/* record initial flags and protocol */
	first->tx_flags = tx_flags;
	first->protocol = vlan_get_protocol(skb);
3164

3165 3166 3167 3168 3169
	tso = ixgbevf_tso(tx_ring, first, &hdr_len);
	if (tso < 0)
		goto out_drop;
	else
		ixgbevf_tx_csum(tx_ring, first);
3170

3171
	ixgbevf_tx_map(tx_ring, first, hdr_len);
3172

3173
	ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
3174

3175 3176 3177 3178 3179 3180
	return NETDEV_TX_OK;

out_drop:
	dev_kfree_skb_any(first->skb);
	first->skb = NULL;

3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202
	return NETDEV_TX_OK;
}

/**
 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
 * @netdev: network interface device structure
 * @p: pointer to an address structure
 *
 * Returns 0 on success, negative on failure
 **/
static int ixgbevf_set_mac(struct net_device *netdev, void *p)
{
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
	struct ixgbe_hw *hw = &adapter->hw;
	struct sockaddr *addr = p;

	if (!is_valid_ether_addr(addr->sa_data))
		return -EADDRNOTAVAIL;

	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
	memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);

3203
	spin_lock_bh(&adapter->mbx_lock);
3204

3205
	hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
3206

3207
	spin_unlock_bh(&adapter->mbx_lock);
3208

3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222
	return 0;
}

/**
 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
 * @netdev: network interface device structure
 * @new_mtu: new value for maximum frame size
 *
 * Returns 0 on success, negative on failure
 **/
static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
{
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
	int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3223 3224
	int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;

3225 3226
	switch (adapter->hw.api_version) {
	case ixgbe_mbox_api_11:
3227
		max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
3228 3229 3230 3231 3232 3233
		break;
	default:
		if (adapter->hw.mac.type == ixgbe_mac_X540_vf)
			max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
		break;
	}
3234 3235

	/* MTU < 68 is an error and causes problems on some kernels */
3236
	if ((new_mtu < 68) || (max_frame > max_possible_frame))
3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249
		return -EINVAL;

	hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
	       netdev->mtu, new_mtu);
	/* must set new MTU before calling down or up */
	netdev->mtu = new_mtu;

	if (netif_running(netdev))
		ixgbevf_reinit_locked(adapter);

	return 0;
}

3250
static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
3251 3252 3253
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3254 3255 3256
#ifdef CONFIG_PM
	int retval = 0;
#endif
3257 3258 3259 3260

	netif_device_detach(netdev);

	if (netif_running(netdev)) {
3261
		rtnl_lock();
3262 3263 3264 3265
		ixgbevf_down(adapter);
		ixgbevf_free_irq(adapter);
		ixgbevf_free_all_tx_resources(adapter);
		ixgbevf_free_all_rx_resources(adapter);
3266
		rtnl_unlock();
3267 3268
	}

3269
	ixgbevf_clear_interrupt_scheme(adapter);
3270

3271 3272 3273 3274
#ifdef CONFIG_PM
	retval = pci_save_state(pdev);
	if (retval)
		return retval;
3275

3276
#endif
3277
	pci_disable_device(pdev);
3278 3279 3280 3281 3282 3283 3284

	return 0;
}

#ifdef CONFIG_PM
static int ixgbevf_resume(struct pci_dev *pdev)
{
3285 3286
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303
	u32 err;

	pci_set_power_state(pdev, PCI_D0);
	pci_restore_state(pdev);
	/*
	 * pci_restore_state clears dev->state_saved so call
	 * pci_save_state to restore it.
	 */
	pci_save_state(pdev);

	err = pci_enable_device_mem(pdev);
	if (err) {
		dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
		return err;
	}
	pci_set_master(pdev);

D
Don Skidmore 已提交
3304 3305
	ixgbevf_reset(adapter);

3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328
	rtnl_lock();
	err = ixgbevf_init_interrupt_scheme(adapter);
	rtnl_unlock();
	if (err) {
		dev_err(&pdev->dev, "Cannot initialize interrupts\n");
		return err;
	}

	if (netif_running(netdev)) {
		err = ixgbevf_open(netdev);
		if (err)
			return err;
	}

	netif_device_attach(netdev);

	return err;
}

#endif /* CONFIG_PM */
static void ixgbevf_shutdown(struct pci_dev *pdev)
{
	ixgbevf_suspend(pdev, PMSG_SUSPEND);
3329 3330
}

3331 3332 3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344
static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
						struct rtnl_link_stats64 *stats)
{
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
	unsigned int start;
	u64 bytes, packets;
	const struct ixgbevf_ring *ring;
	int i;

	ixgbevf_update_stats(adapter);

	stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;

	for (i = 0; i < adapter->num_rx_queues; i++) {
3345
		ring = adapter->rx_ring[i];
3346 3347
		do {
			start = u64_stats_fetch_begin_bh(&ring->syncp);
3348 3349
			bytes = ring->stats.bytes;
			packets = ring->stats.packets;
3350 3351 3352 3353 3354 3355
		} while (u64_stats_fetch_retry_bh(&ring->syncp, start));
		stats->rx_bytes += bytes;
		stats->rx_packets += packets;
	}

	for (i = 0; i < adapter->num_tx_queues; i++) {
3356
		ring = adapter->tx_ring[i];
3357 3358
		do {
			start = u64_stats_fetch_begin_bh(&ring->syncp);
3359 3360
			bytes = ring->stats.bytes;
			packets = ring->stats.packets;
3361 3362 3363 3364 3365 3366 3367 3368
		} while (u64_stats_fetch_retry_bh(&ring->syncp, start));
		stats->tx_bytes += bytes;
		stats->tx_packets += packets;
	}

	return stats;
}

3369
static const struct net_device_ops ixgbevf_netdev_ops = {
3370 3371 3372 3373
	.ndo_open		= ixgbevf_open,
	.ndo_stop		= ixgbevf_close,
	.ndo_start_xmit		= ixgbevf_xmit_frame,
	.ndo_set_rx_mode	= ixgbevf_set_rx_mode,
3374
	.ndo_get_stats64	= ixgbevf_get_stats,
3375
	.ndo_validate_addr	= eth_validate_addr,
3376 3377 3378 3379 3380
	.ndo_set_mac_address	= ixgbevf_set_mac,
	.ndo_change_mtu		= ixgbevf_change_mtu,
	.ndo_tx_timeout		= ixgbevf_tx_timeout,
	.ndo_vlan_rx_add_vid	= ixgbevf_vlan_rx_add_vid,
	.ndo_vlan_rx_kill_vid	= ixgbevf_vlan_rx_kill_vid,
3381 3382 3383
#ifdef CONFIG_NET_RX_BUSY_POLL
	.ndo_busy_poll		= ixgbevf_busy_poll_recv,
#endif
3384 3385 3386 3387
};

static void ixgbevf_assign_netdev_ops(struct net_device *dev)
{
3388
	dev->netdev_ops = &ixgbevf_netdev_ops;
3389 3390 3391 3392 3393 3394 3395 3396 3397 3398 3399 3400 3401 3402 3403
	ixgbevf_set_ethtool_ops(dev);
	dev->watchdog_timeo = 5 * HZ;
}

/**
 * ixgbevf_probe - Device Initialization Routine
 * @pdev: PCI device information struct
 * @ent: entry in ixgbevf_pci_tbl
 *
 * Returns 0 on success, negative on failure
 *
 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
 * The OS initialization, configuring of the adapter private structure,
 * and a hardware reset occur.
 **/
3404
static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3405 3406 3407 3408 3409 3410 3411 3412 3413 3414 3415 3416
{
	struct net_device *netdev;
	struct ixgbevf_adapter *adapter = NULL;
	struct ixgbe_hw *hw = NULL;
	const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
	static int cards_found;
	int err, pci_using_dac;

	err = pci_enable_device(pdev);
	if (err)
		return err;

3417
	if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
3418 3419
		pci_using_dac = 1;
	} else {
3420
		err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3421
		if (err) {
3422 3423 3424
			dev_err(&pdev->dev, "No usable DMA "
				"configuration, aborting\n");
			goto err_dma;
3425 3426 3427 3428 3429 3430 3431 3432 3433 3434 3435 3436 3437 3438 3439 3440 3441 3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452
		}
		pci_using_dac = 0;
	}

	err = pci_request_regions(pdev, ixgbevf_driver_name);
	if (err) {
		dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
		goto err_pci_reg;
	}

	pci_set_master(pdev);

	netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
				   MAX_TX_QUEUES);
	if (!netdev) {
		err = -ENOMEM;
		goto err_alloc_etherdev;
	}

	SET_NETDEV_DEV(netdev, &pdev->dev);

	pci_set_drvdata(pdev, netdev);
	adapter = netdev_priv(netdev);

	adapter->netdev = netdev;
	adapter->pdev = pdev;
	hw = &adapter->hw;
	hw->back = adapter;
3453
	adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3454 3455 3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466 3467 3468 3469 3470 3471 3472 3473 3474 3475 3476

	/*
	 * call save state here in standalone driver because it relies on
	 * adapter struct to exist, and needs to call netdev_priv
	 */
	pci_save_state(pdev);

	hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
			      pci_resource_len(pdev, 0));
	if (!hw->hw_addr) {
		err = -EIO;
		goto err_ioremap;
	}

	ixgbevf_assign_netdev_ops(netdev);

	adapter->bd_number = cards_found;

	/* Setup hw api */
	memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
	hw->mac.type  = ii->mac;

	memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
3477
	       sizeof(struct ixgbe_mbx_operations));
3478 3479 3480

	/* setup the private structure */
	err = ixgbevf_sw_init(adapter);
3481 3482 3483 3484 3485 3486 3487 3488 3489
	if (err)
		goto err_sw_init;

	/* The HW MAC address was set and/or determined in sw_init */
	if (!is_valid_ether_addr(netdev->dev_addr)) {
		pr_err("invalid MAC address\n");
		err = -EIO;
		goto err_sw_init;
	}
3490

3491
	netdev->hw_features = NETIF_F_SG |
3492
			   NETIF_F_IP_CSUM |
3493 3494 3495 3496 3497 3498
			   NETIF_F_IPV6_CSUM |
			   NETIF_F_TSO |
			   NETIF_F_TSO6 |
			   NETIF_F_RXCSUM;

	netdev->features = netdev->hw_features |
3499 3500 3501
			   NETIF_F_HW_VLAN_CTAG_TX |
			   NETIF_F_HW_VLAN_CTAG_RX |
			   NETIF_F_HW_VLAN_CTAG_FILTER;
3502 3503 3504 3505

	netdev->vlan_features |= NETIF_F_TSO;
	netdev->vlan_features |= NETIF_F_TSO6;
	netdev->vlan_features |= NETIF_F_IP_CSUM;
3506
	netdev->vlan_features |= NETIF_F_IPV6_CSUM;
3507 3508 3509 3510 3511
	netdev->vlan_features |= NETIF_F_SG;

	if (pci_using_dac)
		netdev->features |= NETIF_F_HIGHDMA;

3512 3513
	netdev->priv_flags |= IFF_UNICAST_FLT;

3514
	init_timer(&adapter->watchdog_timer);
3515
	adapter->watchdog_timer.function = ixgbevf_watchdog;
3516 3517 3518 3519 3520 3521 3522 3523 3524 3525 3526 3527 3528 3529 3530
	adapter->watchdog_timer.data = (unsigned long)adapter;

	INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
	INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);

	err = ixgbevf_init_interrupt_scheme(adapter);
	if (err)
		goto err_sw_init;

	strcpy(netdev->name, "eth%d");

	err = register_netdev(netdev);
	if (err)
		goto err_register;

G
Greg Rose 已提交
3531 3532
	netif_carrier_off(netdev);

3533 3534
	ixgbevf_init_last_counter_stats(adapter);

3535
	/* print the MAC address */
3536
	hw_dbg(hw, "%pM\n", netdev->dev_addr);
3537 3538 3539 3540 3541 3542 3543 3544

	hw_dbg(hw, "MAC: %d\n", hw->mac.type);

	hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
	cards_found++;
	return 0;

err_register:
3545
	ixgbevf_clear_interrupt_scheme(adapter);
3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 3567
err_sw_init:
	ixgbevf_reset_interrupt_capability(adapter);
	iounmap(hw->hw_addr);
err_ioremap:
	free_netdev(netdev);
err_alloc_etherdev:
	pci_release_regions(pdev);
err_pci_reg:
err_dma:
	pci_disable_device(pdev);
	return err;
}

/**
 * ixgbevf_remove - Device Removal Routine
 * @pdev: PCI device information struct
 *
 * ixgbevf_remove is called by the PCI subsystem to alert the driver
 * that it should release a PCI device.  The could be caused by a
 * Hot-Plug event, or because the driver is going to be removed from
 * memory.
 **/
3568
static void ixgbevf_remove(struct pci_dev *pdev)
3569 3570 3571 3572 3573 3574 3575 3576
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);

	set_bit(__IXGBEVF_DOWN, &adapter->state);

	del_timer_sync(&adapter->watchdog_timer);

3577
	cancel_work_sync(&adapter->reset_task);
3578 3579
	cancel_work_sync(&adapter->watchdog_task);

3580
	if (netdev->reg_state == NETREG_REGISTERED)
3581 3582
		unregister_netdev(netdev);

3583
	ixgbevf_clear_interrupt_scheme(adapter);
3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594 3595
	ixgbevf_reset_interrupt_capability(adapter);

	iounmap(adapter->hw.hw_addr);
	pci_release_regions(pdev);

	hw_dbg(&adapter->hw, "Remove complete\n");

	free_netdev(netdev);

	pci_disable_device(pdev);
}

3596 3597 3598 3599 3600 3601 3602 3603 3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 3617 3618 3619 3620 3621 3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 3641 3642 3643 3644 3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668
/**
 * ixgbevf_io_error_detected - called when PCI error is detected
 * @pdev: Pointer to PCI device
 * @state: The current pci connection state
 *
 * This function is called after a PCI bus error affecting
 * this device has been detected.
 */
static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
						  pci_channel_state_t state)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);

	netif_device_detach(netdev);

	if (state == pci_channel_io_perm_failure)
		return PCI_ERS_RESULT_DISCONNECT;

	if (netif_running(netdev))
		ixgbevf_down(adapter);

	pci_disable_device(pdev);

	/* Request a slot slot reset. */
	return PCI_ERS_RESULT_NEED_RESET;
}

/**
 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
 * @pdev: Pointer to PCI device
 *
 * Restart the card from scratch, as if from a cold-boot. Implementation
 * resembles the first-half of the ixgbevf_resume routine.
 */
static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);

	if (pci_enable_device_mem(pdev)) {
		dev_err(&pdev->dev,
			"Cannot re-enable PCI device after reset.\n");
		return PCI_ERS_RESULT_DISCONNECT;
	}

	pci_set_master(pdev);

	ixgbevf_reset(adapter);

	return PCI_ERS_RESULT_RECOVERED;
}

/**
 * ixgbevf_io_resume - called when traffic can start flowing again.
 * @pdev: Pointer to PCI device
 *
 * This callback is called when the error recovery driver tells us that
 * its OK to resume normal operation. Implementation resembles the
 * second-half of the ixgbevf_resume routine.
 */
static void ixgbevf_io_resume(struct pci_dev *pdev)
{
	struct net_device *netdev = pci_get_drvdata(pdev);
	struct ixgbevf_adapter *adapter = netdev_priv(netdev);

	if (netif_running(netdev))
		ixgbevf_up(adapter);

	netif_device_attach(netdev);
}

/* PCI Error Recovery (ERS) */
3669
static const struct pci_error_handlers ixgbevf_err_handler = {
3670 3671 3672 3673 3674
	.error_detected = ixgbevf_io_error_detected,
	.slot_reset = ixgbevf_io_slot_reset,
	.resume = ixgbevf_io_resume,
};

3675 3676 3677 3678
static struct pci_driver ixgbevf_driver = {
	.name     = ixgbevf_driver_name,
	.id_table = ixgbevf_pci_tbl,
	.probe    = ixgbevf_probe,
3679
	.remove   = ixgbevf_remove,
3680 3681 3682 3683 3684
#ifdef CONFIG_PM
	/* Power Management Hooks */
	.suspend  = ixgbevf_suspend,
	.resume   = ixgbevf_resume,
#endif
3685
	.shutdown = ixgbevf_shutdown,
3686
	.err_handler = &ixgbevf_err_handler
3687 3688 3689
};

/**
3690
 * ixgbevf_init_module - Driver Registration Routine
3691
 *
3692
 * ixgbevf_init_module is the first routine called when the driver is
3693 3694 3695 3696 3697
 * loaded. All it does is register with the PCI subsystem.
 **/
static int __init ixgbevf_init_module(void)
{
	int ret;
3698 3699
	pr_info("%s - version %s\n", ixgbevf_driver_string,
		ixgbevf_driver_version);
3700

3701
	pr_info("%s\n", ixgbevf_copyright);
3702 3703 3704 3705 3706 3707 3708 3709

	ret = pci_register_driver(&ixgbevf_driver);
	return ret;
}

module_init(ixgbevf_init_module);

/**
3710
 * ixgbevf_exit_module - Driver Exit Cleanup Routine
3711
 *
3712
 * ixgbevf_exit_module is called just before the driver is removed
3713 3714 3715 3716 3717 3718 3719 3720 3721
 * from memory.
 **/
static void __exit ixgbevf_exit_module(void)
{
	pci_unregister_driver(&ixgbevf_driver);
}

#ifdef DEBUG
/**
3722
 * ixgbevf_get_hw_dev_name - return device name string
3723 3724 3725 3726 3727 3728 3729 3730 3731 3732 3733 3734
 * used by hardware layer to print debugging information
 **/
char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
{
	struct ixgbevf_adapter *adapter = hw->back;
	return adapter->netdev->name;
}

#endif
module_exit(ixgbevf_exit_module);

/* ixgbevf_main.c */