disp.c 67.5 KB
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/*
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 * Copyright 2011 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */
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#include "disp.h"
#include "atom.h"
#include "core.h"
#include "head.h"
#include "wndw.h"
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#include <linux/dma-mapping.h>
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#include <linux/hdmi.h>
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#include <linux/component.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_dp_helper.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_plane_helper.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_scdc_helper.h>
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#include <drm/drm_vblank.h>
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#include <nvif/class.h>
#include <nvif/cl0002.h>
#include <nvif/cl5070.h>
#include <nvif/cl507d.h>
#include <nvif/event.h>
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#include "nouveau_drv.h"
#include "nouveau_dma.h"
#include "nouveau_gem.h"
#include "nouveau_connector.h"
#include "nouveau_encoder.h"
#include "nouveau_fence.h"
#include "nouveau_fbcon.h"
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#include <subdev/bios/dp.h>

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/******************************************************************************
 * Atomic state
 *****************************************************************************/
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struct nv50_outp_atom {
	struct list_head head;
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	struct drm_encoder *encoder;
	bool flush_disable;
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	union nv50_outp_atom_mask {
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		struct {
			bool ctrl:1;
		};
		u8 mask;
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	} set, clr;
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};
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/******************************************************************************
 * EVO channel
 *****************************************************************************/
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static int
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nv50_chan_create(struct nvif_device *device, struct nvif_object *disp,
		 const s32 *oclass, u8 head, void *data, u32 size,
		 struct nv50_chan *chan)
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{
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	struct nvif_sclass *sclass;
	int ret, i, n;
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	chan->device = device;
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	ret = n = nvif_object_sclass_get(disp, &sclass);
	if (ret < 0)
		return ret;
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	while (oclass[0]) {
		for (i = 0; i < n; i++) {
			if (sclass[i].oclass == oclass[0]) {
				ret = nvif_object_init(disp, 0, oclass[0],
						       data, size, &chan->user);
				if (ret == 0)
					nvif_object_map(&chan->user, NULL, 0);
				nvif_object_sclass_put(&sclass);
				return ret;
			}
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		}
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		oclass++;
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	}

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	nvif_object_sclass_put(&sclass);
	return -ENOSYS;
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}

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static void
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nv50_chan_destroy(struct nv50_chan *chan)
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{
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	nvif_object_fini(&chan->user);
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}

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/******************************************************************************
 * DMA EVO channel
 *****************************************************************************/
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void
nv50_dmac_destroy(struct nv50_dmac *dmac)
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{
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	nvif_object_fini(&dmac->vram);
	nvif_object_fini(&dmac->sync);
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	nv50_chan_destroy(&dmac->base);
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	nvif_mem_fini(&dmac->push);
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}

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int
nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
		 const s32 *oclass, u8 head, void *data, u32 size, u64 syncbuf,
		 struct nv50_dmac *dmac)
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{
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	struct nouveau_cli *cli = (void *)device->object.client;
	struct nv50_disp_core_channel_dma_v0 *args = data;
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	u8 type = NVIF_MEM_COHERENT;
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	int ret;
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	mutex_init(&dmac->lock);
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	/* Pascal added support for 47-bit physical addresses, but some
	 * parts of EVO still only accept 40-bit PAs.
	 *
	 * To avoid issues on systems with large amounts of RAM, and on
	 * systems where an IOMMU maps pages at a high address, we need
	 * to allocate push buffers in VRAM instead.
	 *
	 * This appears to match NVIDIA's behaviour on Pascal.
	 */
	if (device->info.family == NV_DEVICE_INFO_V0_PASCAL)
		type |= NVIF_MEM_VRAM;

	ret = nvif_mem_init_map(&cli->mmu, type, 0x1000, &dmac->push);
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	if (ret)
		return ret;
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	dmac->ptr = dmac->push.object.map.ptr;
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	args->pushbuf = nvif_handle(&dmac->push.object);
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	ret = nv50_chan_create(device, disp, oclass, head, data, size,
			       &dmac->base);
	if (ret)
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		return ret;

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	if (!syncbuf)
		return 0;

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	ret = nvif_object_init(&dmac->base.user, 0xf0000000, NV_DMA_IN_MEMORY,
			       &(struct nv_dma_v0) {
					.target = NV_DMA_V0_TARGET_VRAM,
					.access = NV_DMA_V0_ACCESS_RDWR,
					.start = syncbuf + 0x0000,
					.limit = syncbuf + 0x0fff,
			       }, sizeof(struct nv_dma_v0),
			       &dmac->sync);
	if (ret)
		return ret;
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	ret = nvif_object_init(&dmac->base.user, 0xf0000001, NV_DMA_IN_MEMORY,
			       &(struct nv_dma_v0) {
					.target = NV_DMA_V0_TARGET_VRAM,
					.access = NV_DMA_V0_ACCESS_RDWR,
					.start = 0,
					.limit = device->info.ram_user - 1,
			       }, sizeof(struct nv_dma_v0),
			       &dmac->vram);
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	if (ret)
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		return ret;

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	return ret;
}

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/******************************************************************************
 * EVO channel helpers
 *****************************************************************************/
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static void
evo_flush(struct nv50_dmac *dmac)
{
	/* Push buffer fetches are not coherent with BAR1, we need to ensure
	 * writes have been flushed right through to VRAM before writing PUT.
	 */
	if (dmac->push.type & NVIF_MEM_VRAM) {
		struct nvif_device *device = dmac->base.device;
		nvif_wr32(&device->object, 0x070000, 0x00000001);
		nvif_msec(device, 2000,
			if (!(nvif_rd32(&device->object, 0x070000) & 0x00000002))
				break;
		);
	}
}

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u32 *
evo_wait(struct nv50_dmac *evoc, int nr)
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{
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	struct nv50_dmac *dmac = evoc;
	struct nvif_device *device = dmac->base.device;
	u32 put = nvif_rd32(&dmac->base.user, 0x0000) / 4;
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	mutex_lock(&dmac->lock);
	if (put + nr >= (PAGE_SIZE / 4) - 8) {
		dmac->ptr[put] = 0x20000000;
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		evo_flush(dmac);
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		nvif_wr32(&dmac->base.user, 0x0000, 0x00000000);
		if (nvif_msec(device, 2000,
			if (!nvif_rd32(&dmac->base.user, 0x0004))
				break;
		) < 0) {
			mutex_unlock(&dmac->lock);
			pr_err("nouveau: evo channel stalled\n");
			return NULL;
		}
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		put = 0;
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	}

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	return dmac->ptr + put;
}

void
evo_kick(u32 *push, struct nv50_dmac *evoc)
{
	struct nv50_dmac *dmac = evoc;
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	evo_flush(dmac);
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	nvif_wr32(&dmac->base.user, 0x0000, (push - dmac->ptr) << 2);
	mutex_unlock(&dmac->lock);
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}

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/******************************************************************************
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 * Output path helpers
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 *****************************************************************************/
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static void
nv50_outp_release(struct nouveau_encoder *nv_encoder)
{
	struct nv50_disp *disp = nv50_disp(nv_encoder->base.base.dev);
	struct {
		struct nv50_disp_mthd_v1 base;
	} args = {
		.base.version = 1,
		.base.method = NV50_DISP_MTHD_V1_RELEASE,
		.base.hasht  = nv_encoder->dcb->hasht,
		.base.hashm  = nv_encoder->dcb->hashm,
	};

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	nvif_mthd(&disp->disp->object, 0, &args, sizeof(args));
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	nv_encoder->or = -1;
	nv_encoder->link = 0;
}

static int
nv50_outp_acquire(struct nouveau_encoder *nv_encoder)
{
	struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
	struct nv50_disp *disp = nv50_disp(drm->dev);
	struct {
		struct nv50_disp_mthd_v1 base;
		struct nv50_disp_acquire_v0 info;
	} args = {
		.base.version = 1,
		.base.method = NV50_DISP_MTHD_V1_ACQUIRE,
		.base.hasht  = nv_encoder->dcb->hasht,
		.base.hashm  = nv_encoder->dcb->hashm,
	};
	int ret;

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	ret = nvif_mthd(&disp->disp->object, 0, &args, sizeof(args));
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	if (ret) {
		NV_ERROR(drm, "error acquiring output path: %d\n", ret);
		return ret;
	}

	nv_encoder->or = args.info.or;
	nv_encoder->link = args.info.link;
	return 0;
}

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static int
nv50_outp_atomic_check_view(struct drm_encoder *encoder,
			    struct drm_crtc_state *crtc_state,
			    struct drm_connector_state *conn_state,
			    struct drm_display_mode *native_mode)
{
	struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
	struct drm_display_mode *mode = &crtc_state->mode;
	struct drm_connector *connector = conn_state->connector;
	struct nouveau_conn_atom *asyc = nouveau_conn_atom(conn_state);
	struct nouveau_drm *drm = nouveau_drm(encoder->dev);

	NV_ATOMIC(drm, "%s atomic_check\n", encoder->name);
	asyc->scaler.full = false;
	if (!native_mode)
		return 0;

	if (asyc->scaler.mode == DRM_MODE_SCALE_NONE) {
		switch (connector->connector_type) {
		case DRM_MODE_CONNECTOR_LVDS:
		case DRM_MODE_CONNECTOR_eDP:
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			/* Don't force scaler for EDID modes with
			 * same size as the native one (e.g. different
			 * refresh rate)
			 */
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			if (mode->hdisplay == native_mode->hdisplay &&
			    mode->vdisplay == native_mode->vdisplay &&
			    mode->type & DRM_MODE_TYPE_DRIVER)
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				break;
			mode = native_mode;
			asyc->scaler.full = true;
			break;
		default:
			break;
		}
	} else {
		mode = native_mode;
	}

	if (!drm_mode_equal(adjusted_mode, mode)) {
		drm_mode_copy(adjusted_mode, mode);
		crtc_state->mode_changed = true;
	}

	return 0;
}

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static int
nv50_outp_atomic_check(struct drm_encoder *encoder,
		       struct drm_crtc_state *crtc_state,
		       struct drm_connector_state *conn_state)
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{
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	struct drm_connector *connector = conn_state->connector;
	struct nouveau_connector *nv_connector = nouveau_connector(connector);
	struct nv50_head_atom *asyh = nv50_head_atom(crtc_state);
	int ret;

	ret = nv50_outp_atomic_check_view(encoder, crtc_state, conn_state,
					  nv_connector->native_mode);
	if (ret)
		return ret;

	if (crtc_state->mode_changed || crtc_state->connectors_changed)
		asyh->or.bpc = connector->display_info.bpc;

	return 0;
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}

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/******************************************************************************
 * DAC
 *****************************************************************************/
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static void
nv50_dac_disable(struct drm_encoder *encoder)
{
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	struct nv50_core *core = nv50_disp(encoder->dev)->core;
	if (nv_encoder->crtc)
		core->func->dac->ctrl(core, nv_encoder->or, 0x00000000, NULL);
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	nv_encoder->crtc = NULL;
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	nv50_outp_release(nv_encoder);
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}

static void
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nv50_dac_enable(struct drm_encoder *encoder)
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{
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
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	struct nv50_head_atom *asyh = nv50_head_atom(nv_crtc->base.state);
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	struct nv50_core *core = nv50_disp(encoder->dev)->core;
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	nv50_outp_acquire(nv_encoder);

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	core->func->dac->ctrl(core, nv_encoder->or, 1 << nv_crtc->index, asyh);
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	asyh->or.depth = 0;
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	nv_encoder->crtc = encoder->crtc;
}

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static enum drm_connector_status
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nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
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{
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	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
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	struct nv50_disp *disp = nv50_disp(encoder->dev);
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	struct {
		struct nv50_disp_mthd_v1 base;
		struct nv50_disp_dac_load_v0 load;
	} args = {
		.base.version = 1,
		.base.method = NV50_DISP_MTHD_V1_DAC_LOAD,
		.base.hasht  = nv_encoder->dcb->hasht,
		.base.hashm  = nv_encoder->dcb->hashm,
	};
	int ret;

	args.load.data = nouveau_drm(encoder->dev)->vbios.dactestval;
	if (args.load.data == 0)
		args.load.data = 340;
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	ret = nvif_mthd(&disp->disp->object, 0, &args, sizeof(args));
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	if (ret || !args.load.load)
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		return connector_status_disconnected;
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	return connector_status_connected;
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}

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static const struct drm_encoder_helper_funcs
nv50_dac_help = {
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	.atomic_check = nv50_outp_atomic_check,
	.enable = nv50_dac_enable,
	.disable = nv50_dac_disable,
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	.detect = nv50_dac_detect
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};

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static void
nv50_dac_destroy(struct drm_encoder *encoder)
{
	drm_encoder_cleanup(encoder);
	kfree(encoder);
}

static const struct drm_encoder_funcs
nv50_dac_func = {
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	.destroy = nv50_dac_destroy,
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};

static int
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nv50_dac_create(struct drm_connector *connector, struct dcb_output *dcbe)
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{
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	struct nouveau_drm *drm = nouveau_drm(connector->dev);
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	struct nvkm_i2c *i2c = nvxx_i2c(&drm->client.device);
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	struct nvkm_i2c_bus *bus;
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	struct nouveau_encoder *nv_encoder;
	struct drm_encoder *encoder;
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	int type = DRM_MODE_ENCODER_DAC;
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	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
	if (!nv_encoder)
		return -ENOMEM;
	nv_encoder->dcb = dcbe;
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	bus = nvkm_i2c_bus_find(i2c, dcbe->i2c_index);
	if (bus)
		nv_encoder->i2c = &bus->i2c;
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	encoder = to_drm_encoder(nv_encoder);
	encoder->possible_crtcs = dcbe->heads;
	encoder->possible_clones = 0;
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	drm_encoder_init(connector->dev, encoder, &nv50_dac_func, type,
			 "dac-%04x-%04x", dcbe->hasht, dcbe->hashm);
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	drm_encoder_helper_add(encoder, &nv50_dac_help);
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	drm_connector_attach_encoder(connector, encoder);
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	return 0;
}
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/*
 * audio component binding for ELD notification
 */
static void
nv50_audio_component_eld_notify(struct drm_audio_component *acomp, int port)
{
	if (acomp && acomp->audio_ops && acomp->audio_ops->pin_eld_notify)
		acomp->audio_ops->pin_eld_notify(acomp->audio_ops->audio_ptr,
						 port, -1);
}

static int
nv50_audio_component_get_eld(struct device *kdev, int port, int pipe,
			     bool *enabled, unsigned char *buf, int max_bytes)
{
	struct drm_device *drm_dev = dev_get_drvdata(kdev);
	struct nouveau_drm *drm = nouveau_drm(drm_dev);
	struct drm_encoder *encoder;
	struct nouveau_encoder *nv_encoder;
	struct nouveau_connector *nv_connector;
	struct nouveau_crtc *nv_crtc;
	int ret = 0;

	*enabled = false;
	drm_for_each_encoder(encoder, drm->dev) {
		nv_encoder = nouveau_encoder(encoder);
		nv_connector = nouveau_encoder_connector_get(nv_encoder);
		nv_crtc = nouveau_crtc(encoder->crtc);
		if (!nv_connector || !nv_crtc || nv_crtc->index != port)
			continue;
		*enabled = drm_detect_monitor_audio(nv_connector->edid);
		if (*enabled) {
			ret = drm_eld_size(nv_connector->base.eld);
			memcpy(buf, nv_connector->base.eld,
			       min(max_bytes, ret));
		}
		break;
	}
	return ret;
}

static const struct drm_audio_component_ops nv50_audio_component_ops = {
	.get_eld = nv50_audio_component_get_eld,
};

static int
nv50_audio_component_bind(struct device *kdev, struct device *hda_kdev,
			  void *data)
{
	struct drm_device *drm_dev = dev_get_drvdata(kdev);
	struct nouveau_drm *drm = nouveau_drm(drm_dev);
	struct drm_audio_component *acomp = data;

	if (WARN_ON(!device_link_add(hda_kdev, kdev, DL_FLAG_STATELESS)))
		return -ENOMEM;

	drm_modeset_lock_all(drm_dev);
	acomp->ops = &nv50_audio_component_ops;
	acomp->dev = kdev;
	drm->audio.component = acomp;
	drm_modeset_unlock_all(drm_dev);
	return 0;
}

static void
nv50_audio_component_unbind(struct device *kdev, struct device *hda_kdev,
			    void *data)
{
	struct drm_device *drm_dev = dev_get_drvdata(kdev);
	struct nouveau_drm *drm = nouveau_drm(drm_dev);
	struct drm_audio_component *acomp = data;

	drm_modeset_lock_all(drm_dev);
	drm->audio.component = NULL;
	acomp->ops = NULL;
	acomp->dev = NULL;
	drm_modeset_unlock_all(drm_dev);
}

static const struct component_ops nv50_audio_component_bind_ops = {
	.bind   = nv50_audio_component_bind,
	.unbind = nv50_audio_component_unbind,
};

static void
nv50_audio_component_init(struct nouveau_drm *drm)
{
	if (!component_add(drm->dev->dev, &nv50_audio_component_bind_ops))
		drm->audio.component_registered = true;
}

static void
nv50_audio_component_fini(struct nouveau_drm *drm)
{
	if (drm->audio.component_registered) {
		component_del(drm->dev->dev, &nv50_audio_component_bind_ops);
		drm->audio.component_registered = false;
	}
}

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/******************************************************************************
 * Audio
 *****************************************************************************/
static void
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nv50_audio_disable(struct drm_encoder *encoder, struct nouveau_crtc *nv_crtc)
{
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	struct nouveau_drm *drm = nouveau_drm(encoder->dev);
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	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	struct nv50_disp *disp = nv50_disp(encoder->dev);
	struct {
		struct nv50_disp_mthd_v1 base;
		struct nv50_disp_sor_hda_eld_v0 eld;
	} args = {
		.base.version = 1,
		.base.method  = NV50_DISP_MTHD_V1_SOR_HDA_ELD,
		.base.hasht   = nv_encoder->dcb->hasht,
		.base.hashm   = (0xf0ff & nv_encoder->dcb->hashm) |
				(0x0100 << nv_crtc->index),
	};

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	nvif_mthd(&disp->disp->object, 0, &args, sizeof(args));
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	nv50_audio_component_eld_notify(drm->audio.component, nv_crtc->index);
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}

static void
nv50_audio_enable(struct drm_encoder *encoder, struct drm_display_mode *mode)
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{
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	struct nouveau_drm *drm = nouveau_drm(encoder->dev);
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	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
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	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
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	struct nouveau_connector *nv_connector;
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	struct nv50_disp *disp = nv50_disp(encoder->dev);
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	struct __packed {
		struct {
			struct nv50_disp_mthd_v1 mthd;
			struct nv50_disp_sor_hda_eld_v0 eld;
		} base;
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		u8 data[sizeof(nv_connector->base.eld)];
	} args = {
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		.base.mthd.version = 1,
		.base.mthd.method  = NV50_DISP_MTHD_V1_SOR_HDA_ELD,
		.base.mthd.hasht   = nv_encoder->dcb->hasht,
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		.base.mthd.hashm   = (0xf0ff & nv_encoder->dcb->hashm) |
				     (0x0100 << nv_crtc->index),
625
	};
626 627 628 629 630

	nv_connector = nouveau_encoder_connector_get(nv_encoder);
	if (!drm_detect_monitor_audio(nv_connector->edid))
		return;

631
	memcpy(args.data, nv_connector->base.eld, sizeof(args.data));
632

633
	nvif_mthd(&disp->disp->object, 0, &args,
634
		  sizeof(args.base) + drm_eld_size(args.data));
635 636

	nv50_audio_component_eld_notify(drm->audio.component, nv_crtc->index);
637 638
}

639 640 641
/******************************************************************************
 * HDMI
 *****************************************************************************/
642
static void
643
nv50_hdmi_disable(struct drm_encoder *encoder, struct nouveau_crtc *nv_crtc)
644 645
{
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
646
	struct nv50_disp *disp = nv50_disp(encoder->dev);
647 648
	struct {
		struct nv50_disp_mthd_v1 base;
649
		struct nv50_disp_sor_hdmi_pwr_v0 pwr;
650 651
	} args = {
		.base.version = 1,
652 653 654 655
		.base.method = NV50_DISP_MTHD_V1_SOR_HDMI_PWR,
		.base.hasht  = nv_encoder->dcb->hasht,
		.base.hashm  = (0xf0ff & nv_encoder->dcb->hashm) |
			       (0x0100 << nv_crtc->index),
656
	};
657

658
	nvif_mthd(&disp->disp->object, 0, &args, sizeof(args));
659 660 661
}

static void
662
nv50_hdmi_enable(struct drm_encoder *encoder, struct drm_display_mode *mode)
663
{
664
	struct nouveau_drm *drm = nouveau_drm(encoder->dev);
665 666
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
667
	struct nv50_disp *disp = nv50_disp(encoder->dev);
668 669 670
	struct {
		struct nv50_disp_mthd_v1 base;
		struct nv50_disp_sor_hdmi_pwr_v0 pwr;
671
		u8 infoframes[2 * 17]; /* two frames, up to 17 bytes each */
672 673 674 675 676 677 678 679 680 681
	} args = {
		.base.version = 1,
		.base.method = NV50_DISP_MTHD_V1_SOR_HDMI_PWR,
		.base.hasht  = nv_encoder->dcb->hasht,
		.base.hashm  = (0xf0ff & nv_encoder->dcb->hashm) |
			       (0x0100 << nv_crtc->index),
		.pwr.state = 1,
		.pwr.rekey = 56, /* binary driver, and tegra, constant */
	};
	struct nouveau_connector *nv_connector;
682
	struct drm_hdmi_info *hdmi;
683
	u32 max_ac_packet;
684 685
	union hdmi_infoframe avi_frame;
	union hdmi_infoframe vendor_frame;
686
	bool high_tmds_clock_ratio = false, scrambling = false;
687
	u8 config;
688 689
	int ret;
	int size;
690 691 692 693 694

	nv_connector = nouveau_encoder_connector_get(nv_encoder);
	if (!drm_detect_hdmi_monitor(nv_connector->edid))
		return;

695 696
	hdmi = &nv_connector->base.display_info.hdmi;

697 698
	ret = drm_hdmi_avi_infoframe_from_display_mode(&avi_frame.avi,
						       &nv_connector->base, mode);
699 700 701 702 703 704
	if (!ret) {
		/* We have an AVI InfoFrame, populate it to the display */
		args.pwr.avi_infoframe_length
			= hdmi_infoframe_pack(&avi_frame, args.infoframes, 17);
	}

705 706
	ret = drm_hdmi_vendor_infoframe_from_display_mode(&vendor_frame.vendor.hdmi,
							  &nv_connector->base, mode);
707 708 709 710 711 712 713 714 715
	if (!ret) {
		/* We have a Vendor InfoFrame, populate it to the display */
		args.pwr.vendor_infoframe_length
			= hdmi_infoframe_pack(&vendor_frame,
					      args.infoframes
					      + args.pwr.avi_infoframe_length,
					      17);
	}

716
	max_ac_packet  = mode->htotal - mode->hdisplay;
717
	max_ac_packet -= args.pwr.rekey;
718
	max_ac_packet -= 18; /* constant from tegra */
719
	args.pwr.max_ac_packet = max_ac_packet / 32;
B
Ben Skeggs 已提交
720

721 722 723 724 725 726 727 728 729 730
	if (hdmi->scdc.scrambling.supported) {
		high_tmds_clock_ratio = mode->clock > 340000;
		scrambling = high_tmds_clock_ratio ||
			hdmi->scdc.scrambling.low_rates;
	}

	args.pwr.scdc =
		NV50_DISP_SOR_HDMI_PWR_V0_SCDC_SCRAMBLE * scrambling |
		NV50_DISP_SOR_HDMI_PWR_V0_SCDC_DIV_BY_4 * high_tmds_clock_ratio;

731 732 733 734
	size = sizeof(args.base)
		+ sizeof(args.pwr)
		+ args.pwr.avi_infoframe_length
		+ args.pwr.vendor_infoframe_length;
735
	nvif_mthd(&disp->disp->object, 0, &args, size);
736

737
	nv50_audio_enable(encoder, mode);
738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756

	/* If SCDC is supported by the downstream monitor, update
	 * divider / scrambling settings to what we programmed above.
	 */
	if (!hdmi->scdc.scrambling.supported)
		return;

	ret = drm_scdc_readb(nv_encoder->i2c, SCDC_TMDS_CONFIG, &config);
	if (ret < 0) {
		NV_ERROR(drm, "Failure to read SCDC_TMDS_CONFIG: %d\n", ret);
		return;
	}
	config &= ~(SCDC_TMDS_BIT_CLOCK_RATIO_BY_40 | SCDC_SCRAMBLING_ENABLE);
	config |= SCDC_TMDS_BIT_CLOCK_RATIO_BY_40 * high_tmds_clock_ratio;
	config |= SCDC_SCRAMBLING_ENABLE * scrambling;
	ret = drm_scdc_writeb(nv_encoder->i2c, SCDC_TMDS_CONFIG, config);
	if (ret < 0)
		NV_ERROR(drm, "Failure to write SCDC_TMDS_CONFIG = 0x%02x: %d\n",
			 config, ret);
757 758
}

759 760 761
/******************************************************************************
 * MST
 *****************************************************************************/
762 763 764 765
#define nv50_mstm(p) container_of((p), struct nv50_mstm, mgr)
#define nv50_mstc(p) container_of((p), struct nv50_mstc, connector)
#define nv50_msto(p) container_of((p), struct nv50_msto, encoder)

766 767 768 769
struct nv50_mstm {
	struct nouveau_encoder *outp;

	struct drm_dp_mst_topology_mgr mgr;
770 771

	bool modified;
772 773
	bool disabled;
	int links;
774 775 776 777 778 779 780 781 782
};

struct nv50_mstc {
	struct nv50_mstm *mstm;
	struct drm_dp_mst_port *port;
	struct drm_connector connector;

	struct drm_display_mode *native;
	struct edid *edid;
783 784
};

785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800
struct nv50_msto {
	struct drm_encoder encoder;

	struct nv50_head *head;
	struct nv50_mstc *mstc;
	bool disabled;
};

static struct drm_dp_payload *
nv50_msto_payload(struct nv50_msto *msto)
{
	struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev);
	struct nv50_mstc *mstc = msto->mstc;
	struct nv50_mstm *mstm = mstc->mstm;
	int vcpi = mstc->port->vcpi.vcpi, i;

801 802
	WARN_ON(!mutex_is_locked(&mstm->mgr.payload_lock));

803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826
	NV_ATOMIC(drm, "%s: vcpi %d\n", msto->encoder.name, vcpi);
	for (i = 0; i < mstm->mgr.max_payloads; i++) {
		struct drm_dp_payload *payload = &mstm->mgr.payloads[i];
		NV_ATOMIC(drm, "%s: %d: vcpi %d start 0x%02x slots 0x%02x\n",
			  mstm->outp->base.base.name, i, payload->vcpi,
			  payload->start_slot, payload->num_slots);
	}

	for (i = 0; i < mstm->mgr.max_payloads; i++) {
		struct drm_dp_payload *payload = &mstm->mgr.payloads[i];
		if (payload->vcpi == vcpi)
			return payload;
	}

	return NULL;
}

static void
nv50_msto_cleanup(struct nv50_msto *msto)
{
	struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev);
	struct nv50_mstc *mstc = msto->mstc;
	struct nv50_mstm *mstm = mstc->mstm;

827 828 829
	if (!msto->disabled)
		return;

830
	NV_ATOMIC(drm, "%s: msto cleanup\n", msto->encoder.name);
831

832
	drm_dp_mst_deallocate_vcpi(&mstm->mgr, mstc->port);
833 834 835

	msto->mstc = NULL;
	msto->disabled = false;
836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854
}

static void
nv50_msto_prepare(struct nv50_msto *msto)
{
	struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev);
	struct nv50_mstc *mstc = msto->mstc;
	struct nv50_mstm *mstm = mstc->mstm;
	struct {
		struct nv50_disp_mthd_v1 base;
		struct nv50_disp_sor_dp_mst_vcpi_v0 vcpi;
	} args = {
		.base.version = 1,
		.base.method = NV50_DISP_MTHD_V1_SOR_DP_MST_VCPI,
		.base.hasht  = mstm->outp->dcb->hasht,
		.base.hashm  = (0xf0ff & mstm->outp->dcb->hashm) |
			       (0x0100 << msto->head->base.index),
	};

855 856
	mutex_lock(&mstm->mgr.payload_lock);

857
	NV_ATOMIC(drm, "%s: msto prepare\n", msto->encoder.name);
858
	if (mstc->port->vcpi.vcpi > 0) {
859 860 861 862 863 864 865 866 867 868 869 870 871
		struct drm_dp_payload *payload = nv50_msto_payload(msto);
		if (payload) {
			args.vcpi.start_slot = payload->start_slot;
			args.vcpi.num_slots = payload->num_slots;
			args.vcpi.pbn = mstc->port->vcpi.pbn;
			args.vcpi.aligned_pbn = mstc->port->vcpi.aligned_pbn;
		}
	}

	NV_ATOMIC(drm, "%s: %s: %02x %02x %04x %04x\n",
		  msto->encoder.name, msto->head->base.base.name,
		  args.vcpi.start_slot, args.vcpi.num_slots,
		  args.vcpi.pbn, args.vcpi.aligned_pbn);
872

873
	nvif_mthd(&drm->display->disp.object, 0, &args, sizeof(args));
874
	mutex_unlock(&mstm->mgr.payload_lock);
875 876 877 878 879 880 881
}

static int
nv50_msto_atomic_check(struct drm_encoder *encoder,
		       struct drm_crtc_state *crtc_state,
		       struct drm_connector_state *conn_state)
{
882 883 884
	struct drm_atomic_state *state = crtc_state->state;
	struct drm_connector *connector = conn_state->connector;
	struct nv50_mstc *mstc = nv50_mstc(connector);
885
	struct nv50_mstm *mstm = mstc->mstm;
886
	struct nv50_head_atom *asyh = nv50_head_atom(crtc_state);
887
	int slots;
888
	int ret;
889

890 891 892 893
	ret = nv50_outp_atomic_check_view(encoder, crtc_state, conn_state,
					  mstc->native);
	if (ret)
		return ret;
894

895 896
	if (!crtc_state->mode_changed && !crtc_state->connectors_changed)
		return 0;
897

898 899 900 901 902 903 904 905
	/*
	 * When restoring duplicated states, we need to make sure that the bw
	 * remains the same and avoid recalculating it, as the connector's bpc
	 * may have changed after the state was duplicated
	 */
	if (!state->duplicated) {
		const int clock = crtc_state->adjusted_mode.clock;

906 907 908 909 910 911 912 913
		/*
		 * XXX: Since we don't use HDR in userspace quite yet, limit
		 * the bpc to 8 to save bandwidth on the topology. In the
		 * future, we'll want to properly fix this by dynamically
		 * selecting the highest possible bpc that would fit in the
		 * topology
		 */
		asyh->or.bpc = min(connector->display_info.bpc, 8U);
914
		asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, asyh->or.bpc * 3, false);
915
	}
916

917
	slots = drm_dp_atomic_find_vcpi_slots(state, &mstm->mgr, mstc->port,
918
					      asyh->dp.pbn, 0);
919 920 921 922 923 924
	if (slots < 0)
		return slots;

	asyh->dp.tu = slots;

	return 0;
925 926
}

927 928 929 930 931 932 933 934 935 936 937
static u8
nv50_dp_bpc_to_depth(unsigned int bpc)
{
	switch (bpc) {
	case  6: return 0x2;
	case  8: return 0x5;
	case 10: /* fall-through */
	default: return 0x6;
	}
}

938 939 940 941
static void
nv50_msto_enable(struct drm_encoder *encoder)
{
	struct nv50_head *head = nv50_head(encoder->crtc);
942
	struct nv50_head_atom *armh = nv50_head_atom(head->base.base.state);
943 944 945 946
	struct nv50_msto *msto = nv50_msto(encoder);
	struct nv50_mstc *mstc = NULL;
	struct nv50_mstm *mstm = NULL;
	struct drm_connector *connector;
947
	struct drm_connector_list_iter conn_iter;
948
	u8 proto;
949 950
	bool r;

951 952
	drm_connector_list_iter_begin(encoder->dev, &conn_iter);
	drm_for_each_connector_iter(connector, &conn_iter) {
953 954 955 956 957 958
		if (connector->state->best_encoder == &msto->encoder) {
			mstc = nv50_mstc(connector);
			mstm = mstc->mstm;
			break;
		}
	}
959
	drm_connector_list_iter_end(&conn_iter);
960 961 962 963

	if (WARN_ON(!mstc))
		return;

964 965
	r = drm_dp_mst_allocate_vcpi(&mstm->mgr, mstc->port, armh->dp.pbn,
				     armh->dp.tu);
966 967
	if (!r)
		DRM_DEBUG_KMS("Failed to allocate VCPI\n");
968

969 970 971 972
	if (!mstm->links++)
		nv50_outp_acquire(mstm->outp);

	if (mstm->outp->link & 1)
973 974 975 976
		proto = 0x8;
	else
		proto = 0x9;

977 978
	mstm->outp->update(mstm->outp, head->base.index, armh, proto,
			   nv50_dp_bpc_to_depth(armh->or.bpc));
979 980 981 982 983 984 985 986 987 988 989 990

	msto->mstc = mstc;
	mstm->modified = true;
}

static void
nv50_msto_disable(struct drm_encoder *encoder)
{
	struct nv50_msto *msto = nv50_msto(encoder);
	struct nv50_mstc *mstc = msto->mstc;
	struct nv50_mstm *mstm = mstc->mstm;

991
	drm_dp_mst_reset_vcpi_slots(&mstm->mgr, mstc->port);
992 993 994

	mstm->outp->update(mstm->outp, msto->head->base.index, NULL, 0, 0);
	mstm->modified = true;
995 996
	if (!--mstm->links)
		mstm->disabled = true;
997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019
	msto->disabled = true;
}

static const struct drm_encoder_helper_funcs
nv50_msto_help = {
	.disable = nv50_msto_disable,
	.enable = nv50_msto_enable,
	.atomic_check = nv50_msto_atomic_check,
};

static void
nv50_msto_destroy(struct drm_encoder *encoder)
{
	struct nv50_msto *msto = nv50_msto(encoder);
	drm_encoder_cleanup(&msto->encoder);
	kfree(msto);
}

static const struct drm_encoder_funcs
nv50_msto = {
	.destroy = nv50_msto_destroy,
};

1020 1021
static struct nv50_msto *
nv50_msto_new(struct drm_device *dev, struct nv50_head *head, int id)
1022 1023 1024 1025
{
	struct nv50_msto *msto;
	int ret;

1026 1027 1028
	msto = kzalloc(sizeof(*msto), GFP_KERNEL);
	if (!msto)
		return ERR_PTR(-ENOMEM);
1029 1030

	ret = drm_encoder_init(dev, &msto->encoder, &nv50_msto,
1031
			       DRM_MODE_ENCODER_DPMST, "mst-%d", id);
1032
	if (ret) {
1033 1034
		kfree(msto);
		return ERR_PTR(ret);
1035 1036 1037
	}

	drm_encoder_helper_add(&msto->encoder, &nv50_msto_help);
1038 1039 1040
	msto->encoder.possible_crtcs = drm_crtc_mask(&head->base.base);
	msto->head = head;
	return msto;
1041 1042 1043 1044 1045 1046 1047
}

static struct drm_encoder *
nv50_mstc_atomic_best_encoder(struct drm_connector *connector,
			      struct drm_connector_state *connector_state)
{
	struct nv50_mstc *mstc = nv50_mstc(connector);
1048
	struct drm_crtc *crtc = connector_state->crtc;
1049

1050 1051 1052 1053
	if (!(mstc->mstm->outp->dcb->heads & drm_crtc_mask(crtc)))
		return NULL;

	return &nv50_head(crtc)->msto->encoder;
1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069
}

static enum drm_mode_status
nv50_mstc_mode_valid(struct drm_connector *connector,
		     struct drm_display_mode *mode)
{
	return MODE_OK;
}

static int
nv50_mstc_get_modes(struct drm_connector *connector)
{
	struct nv50_mstc *mstc = nv50_mstc(connector);
	int ret = 0;

	mstc->edid = drm_dp_mst_get_edid(&mstc->connector, mstc->port->mgr, mstc->port);
1070
	drm_connector_update_edid_property(&mstc->connector, mstc->edid);
1071
	if (mstc->edid)
1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082
		ret = drm_add_edid_modes(&mstc->connector, mstc->edid);

	if (!mstc->connector.display_info.bpc)
		mstc->connector.display_info.bpc = 8;

	if (mstc->native)
		drm_mode_destroy(mstc->connector.dev, mstc->native);
	mstc->native = nouveau_conn_native_mode(&mstc->connector);
	return ret;
}

1083 1084
static int
nv50_mstc_atomic_check(struct drm_connector *connector,
1085
		       struct drm_atomic_state *state)
1086 1087 1088
{
	struct nv50_mstc *mstc = nv50_mstc(connector);
	struct drm_dp_mst_topology_mgr *mgr = &mstc->mstm->mgr;
1089 1090
	struct drm_connector_state *new_conn_state =
		drm_atomic_get_new_connector_state(state, connector);
1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113
	struct drm_connector_state *old_conn_state =
		drm_atomic_get_old_connector_state(state, connector);
	struct drm_crtc_state *crtc_state;
	struct drm_crtc *new_crtc = new_conn_state->crtc;

	if (!old_conn_state->crtc)
		return 0;

	/* We only want to free VCPI if this state disables the CRTC on this
	 * connector
	 */
	if (new_crtc) {
		crtc_state = drm_atomic_get_new_crtc_state(state, new_crtc);

		if (!crtc_state ||
		    !drm_atomic_crtc_needs_modeset(crtc_state) ||
		    crtc_state->enable)
			return 0;
	}

	return drm_dp_atomic_release_vcpi_slots(state, mgr, mstc->port);
}

1114 1115 1116
static int
nv50_mstc_detect(struct drm_connector *connector,
		 struct drm_modeset_acquire_ctx *ctx, bool force)
1117 1118
{
	struct nv50_mstc *mstc = nv50_mstc(connector);
1119 1120
	int ret;

1121
	if (drm_connector_is_unregistered(connector))
1122
		return connector_status_disconnected;
1123 1124 1125 1126 1127

	ret = pm_runtime_get_sync(connector->dev->dev);
	if (ret < 0 && ret != -EACCES)
		return connector_status_disconnected;

1128 1129
	ret = drm_dp_mst_detect_port(connector, ctx, mstc->port->mgr,
				     mstc->port);
1130 1131 1132

	pm_runtime_mark_last_busy(connector->dev->dev);
	pm_runtime_put_autosuspend(connector->dev->dev);
1133
	return ret;
1134 1135
}

1136 1137 1138 1139 1140 1141 1142 1143 1144
static const struct drm_connector_helper_funcs
nv50_mstc_help = {
	.get_modes = nv50_mstc_get_modes,
	.mode_valid = nv50_mstc_mode_valid,
	.atomic_best_encoder = nv50_mstc_atomic_best_encoder,
	.atomic_check = nv50_mstc_atomic_check,
	.detect_ctx = nv50_mstc_detect,
};

1145 1146 1147 1148
static void
nv50_mstc_destroy(struct drm_connector *connector)
{
	struct nv50_mstc *mstc = nv50_mstc(connector);
1149

1150
	drm_connector_cleanup(&mstc->connector);
1151
	drm_dp_mst_put_port_malloc(mstc->port);
1152

1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171
	kfree(mstc);
}

static const struct drm_connector_funcs
nv50_mstc = {
	.reset = nouveau_conn_reset,
	.fill_modes = drm_helper_probe_single_connector_modes,
	.destroy = nv50_mstc_destroy,
	.atomic_duplicate_state = nouveau_conn_atomic_duplicate_state,
	.atomic_destroy_state = nouveau_conn_atomic_destroy_state,
	.atomic_set_property = nouveau_conn_atomic_set_property,
	.atomic_get_property = nouveau_conn_atomic_get_property,
};

static int
nv50_mstc_new(struct nv50_mstm *mstm, struct drm_dp_mst_port *port,
	      const char *path, struct nv50_mstc **pmstc)
{
	struct drm_device *dev = mstm->outp->base.base.dev;
1172
	struct drm_crtc *crtc;
1173
	struct nv50_mstc *mstc;
1174
	int ret;
1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193

	if (!(mstc = *pmstc = kzalloc(sizeof(*mstc), GFP_KERNEL)))
		return -ENOMEM;
	mstc->mstm = mstm;
	mstc->port = port;

	ret = drm_connector_init(dev, &mstc->connector, &nv50_mstc,
				 DRM_MODE_CONNECTOR_DisplayPort);
	if (ret) {
		kfree(*pmstc);
		*pmstc = NULL;
		return ret;
	}

	drm_connector_helper_add(&mstc->connector, &nv50_mstc_help);

	mstc->connector.funcs->reset(&mstc->connector);
	nouveau_conn_attach_properties(&mstc->connector);

1194 1195 1196 1197 1198 1199 1200
	drm_for_each_crtc(crtc, dev) {
		if (!(mstm->outp->dcb->heads & drm_crtc_mask(crtc)))
			continue;

		drm_connector_attach_encoder(&mstc->connector,
					     &nv50_head(crtc)->msto->encoder);
	}
1201 1202 1203

	drm_object_attach_property(&mstc->connector.base, dev->mode_config.path_property, 0);
	drm_object_attach_property(&mstc->connector.base, dev->mode_config.tile_property, 0);
1204
	drm_connector_set_path_property(&mstc->connector, path);
1205
	drm_dp_mst_get_port_malloc(port);
1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250
	return 0;
}

static void
nv50_mstm_cleanup(struct nv50_mstm *mstm)
{
	struct nouveau_drm *drm = nouveau_drm(mstm->outp->base.base.dev);
	struct drm_encoder *encoder;
	int ret;

	NV_ATOMIC(drm, "%s: mstm cleanup\n", mstm->outp->base.base.name);
	ret = drm_dp_check_act_status(&mstm->mgr);

	ret = drm_dp_update_payload_part2(&mstm->mgr);

	drm_for_each_encoder(encoder, mstm->outp->base.base.dev) {
		if (encoder->encoder_type == DRM_MODE_ENCODER_DPMST) {
			struct nv50_msto *msto = nv50_msto(encoder);
			struct nv50_mstc *mstc = msto->mstc;
			if (mstc && mstc->mstm == mstm)
				nv50_msto_cleanup(msto);
		}
	}

	mstm->modified = false;
}

static void
nv50_mstm_prepare(struct nv50_mstm *mstm)
{
	struct nouveau_drm *drm = nouveau_drm(mstm->outp->base.base.dev);
	struct drm_encoder *encoder;
	int ret;

	NV_ATOMIC(drm, "%s: mstm prepare\n", mstm->outp->base.base.name);
	ret = drm_dp_update_payload_part1(&mstm->mgr);

	drm_for_each_encoder(encoder, mstm->outp->base.base.dev) {
		if (encoder->encoder_type == DRM_MODE_ENCODER_DPMST) {
			struct nv50_msto *msto = nv50_msto(encoder);
			struct nv50_mstc *mstc = msto->mstc;
			if (mstc && mstc->mstm == mstm)
				nv50_msto_prepare(msto);
		}
	}
1251 1252 1253 1254 1255 1256

	if (mstm->disabled) {
		if (!mstm->links)
			nv50_outp_release(mstm->outp);
		mstm->disabled = false;
	}
1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268
}

static void
nv50_mstm_destroy_connector(struct drm_dp_mst_topology_mgr *mgr,
			    struct drm_connector *connector)
{
	struct nouveau_drm *drm = nouveau_drm(connector->dev);
	struct nv50_mstc *mstc = nv50_mstc(connector);

	drm_connector_unregister(&mstc->connector);

	drm_fb_helper_remove_one_connector(&drm->fbcon->helper, &mstc->connector);
1269

1270
	drm_connector_put(&mstc->connector);
1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291
}

static void
nv50_mstm_register_connector(struct drm_connector *connector)
{
	struct nouveau_drm *drm = nouveau_drm(connector->dev);

	drm_fb_helper_add_one_connector(&drm->fbcon->helper, connector);

	drm_connector_register(connector);
}

static struct drm_connector *
nv50_mstm_add_connector(struct drm_dp_mst_topology_mgr *mgr,
			struct drm_dp_mst_port *port, const char *path)
{
	struct nv50_mstm *mstm = nv50_mstm(mgr);
	struct nv50_mstc *mstc;
	int ret;

	ret = nv50_mstc_new(mstm, port, path, &mstc);
1292
	if (ret)
1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307
		return NULL;

	return &mstc->connector;
}

static const struct drm_dp_mst_topology_cbs
nv50_mstm = {
	.add_connector = nv50_mstm_add_connector,
	.register_connector = nv50_mstm_register_connector,
	.destroy_connector = nv50_mstm_destroy_connector,
};

void
nv50_mstm_service(struct nv50_mstm *mstm)
{
1308
	struct drm_dp_aux *aux = mstm ? mstm->mgr.aux : NULL;
1309 1310 1311 1312
	bool handled = true;
	int ret;
	u8 esi[8] = {};

1313 1314 1315
	if (!aux)
		return;

1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337
	while (handled) {
		ret = drm_dp_dpcd_read(aux, DP_SINK_COUNT_ESI, esi, 8);
		if (ret != 8) {
			drm_dp_mst_topology_mgr_set_mst(&mstm->mgr, false);
			return;
		}

		drm_dp_mst_hpd_irq(&mstm->mgr, esi, &handled);
		if (!handled)
			break;

		drm_dp_dpcd_write(aux, DP_SINK_COUNT_ESI + 1, &esi[1], 3);
	}
}

void
nv50_mstm_remove(struct nv50_mstm *mstm)
{
	if (mstm)
		drm_dp_mst_topology_mgr_set_mst(&mstm->mgr, false);
}

1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352
static int
nv50_mstm_enable(struct nv50_mstm *mstm, u8 dpcd, int state)
{
	struct nouveau_encoder *outp = mstm->outp;
	struct {
		struct nv50_disp_mthd_v1 base;
		struct nv50_disp_sor_dp_mst_link_v0 mst;
	} args = {
		.base.version = 1,
		.base.method = NV50_DISP_MTHD_V1_SOR_DP_MST_LINK,
		.base.hasht = outp->dcb->hasht,
		.base.hashm = outp->dcb->hashm,
		.mst.state = state,
	};
	struct nouveau_drm *drm = nouveau_drm(outp->base.base.dev);
1353
	struct nvif_object *disp = &drm->display->disp.object;
1354 1355 1356
	int ret;

	if (dpcd >= 0x12) {
1357 1358 1359 1360 1361
		/* Even if we're enabling MST, start with disabling the
		 * branching unit to clear any sink-side MST topology state
		 * that wasn't set by us
		 */
		ret = drm_dp_dpcd_writeb(mstm->mgr.aux, DP_MSTM_CTRL, 0);
1362 1363 1364
		if (ret < 0)
			return ret;

1365 1366 1367 1368 1369 1370 1371
		if (state) {
			/* Now, start initializing */
			ret = drm_dp_dpcd_writeb(mstm->mgr.aux, DP_MSTM_CTRL,
						 DP_MST_EN);
			if (ret < 0)
				return ret;
		}
1372 1373 1374 1375 1376 1377 1378 1379
	}

	return nvif_mthd(disp, 0, &args, sizeof(args));
}

int
nv50_mstm_detect(struct nv50_mstm *mstm, u8 dpcd[8], int allow)
{
1380 1381 1382 1383
	struct drm_dp_aux *aux;
	int ret;
	bool old_state, new_state;
	u8 mstm_ctrl;
1384 1385 1386 1387

	if (!mstm)
		return 0;

1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402
	mutex_lock(&mstm->mgr.lock);

	old_state = mstm->mgr.mst_state;
	new_state = old_state;
	aux = mstm->mgr.aux;

	if (old_state) {
		/* Just check that the MST hub is still as we expect it */
		ret = drm_dp_dpcd_readb(aux, DP_MSTM_CTRL, &mstm_ctrl);
		if (ret < 0 || !(mstm_ctrl & DP_MST_EN)) {
			DRM_DEBUG_KMS("Hub gone, disabling MST topology\n");
			new_state = false;
		}
	} else if (dpcd[0] >= 0x12) {
		ret = drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &dpcd[1]);
1403
		if (ret < 0)
1404
			goto probe_error;
1405

1406 1407 1408
		if (!(dpcd[1] & DP_MST_CAP))
			dpcd[0] = 0x11;
		else
1409
			new_state = allow;
1410 1411
	}

1412 1413 1414 1415 1416 1417
	if (new_state == old_state) {
		mutex_unlock(&mstm->mgr.lock);
		return new_state;
	}

	ret = nv50_mstm_enable(mstm, dpcd[0], new_state);
1418
	if (ret)
1419 1420 1421
		goto probe_error;

	mutex_unlock(&mstm->mgr.lock);
1422

1423
	ret = drm_dp_mst_topology_mgr_set_mst(&mstm->mgr, new_state);
1424 1425 1426
	if (ret)
		return nv50_mstm_enable(mstm, dpcd[0], 0);

1427 1428 1429 1430 1431
	return new_state;

probe_error:
	mutex_unlock(&mstm->mgr.lock);
	return ret;
1432 1433
}

1434 1435 1436 1437 1438 1439 1440 1441
static void
nv50_mstm_fini(struct nv50_mstm *mstm)
{
	if (mstm && mstm->mgr.mst_state)
		drm_dp_mst_topology_mgr_suspend(&mstm->mgr);
}

static void
1442
nv50_mstm_init(struct nv50_mstm *mstm, bool runtime)
1443
{
1444 1445 1446 1447 1448
	int ret;

	if (!mstm || !mstm->mgr.mst_state)
		return;

1449
	ret = drm_dp_mst_topology_mgr_resume(&mstm->mgr, !runtime);
1450 1451 1452 1453
	if (ret == -1) {
		drm_dp_mst_topology_mgr_set_mst(&mstm->mgr, false);
		drm_kms_helper_hotplug_event(mstm->mgr.dev);
	}
1454 1455
}

1456 1457 1458 1459 1460
static void
nv50_mstm_del(struct nv50_mstm **pmstm)
{
	struct nv50_mstm *mstm = *pmstm;
	if (mstm) {
1461
		drm_dp_mst_topology_mgr_destroy(&mstm->mgr);
1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473
		kfree(*pmstm);
		*pmstm = NULL;
	}
}

static int
nv50_mstm_new(struct nouveau_encoder *outp, struct drm_dp_aux *aux, int aux_max,
	      int conn_base_id, struct nv50_mstm **pmstm)
{
	const int max_payloads = hweight8(outp->dcb->heads);
	struct drm_device *dev = outp->base.base.dev;
	struct nv50_mstm *mstm;
1474
	int ret;
1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485
	u8 dpcd;

	/* This is a workaround for some monitors not functioning
	 * correctly in MST mode on initial module load.  I think
	 * some bad interaction with the VBIOS may be responsible.
	 *
	 * A good ol' off and on again seems to work here ;)
	 */
	ret = drm_dp_dpcd_readb(aux, DP_DPCD_REV, &dpcd);
	if (ret >= 0 && dpcd >= 0x12)
		drm_dp_dpcd_writeb(aux, DP_MSTM_CTRL, 0);
1486 1487 1488 1489

	if (!(mstm = *pmstm = kzalloc(sizeof(*mstm), GFP_KERNEL)))
		return -ENOMEM;
	mstm->outp = outp;
1490
	mstm->mgr.cbs = &nv50_mstm;
1491

1492
	ret = drm_dp_mst_topology_mgr_init(&mstm->mgr, dev, aux, aux_max,
1493 1494 1495 1496 1497 1498 1499
					   max_payloads, conn_base_id);
	if (ret)
		return ret;

	return 0;
}

1500 1501 1502
/******************************************************************************
 * SOR
 *****************************************************************************/
1503
static void
1504
nv50_sor_update(struct nouveau_encoder *nv_encoder, u8 head,
1505
		struct nv50_head_atom *asyh, u8 proto, u8 depth)
1506
{
1507
	struct nv50_disp *disp = nv50_disp(nv_encoder->base.base.dev);
1508
	struct nv50_core *core = disp->core;
1509

1510
	if (!asyh) {
1511 1512 1513 1514 1515 1516
		nv_encoder->ctrl &= ~BIT(head);
		if (!(nv_encoder->ctrl & 0x0000000f))
			nv_encoder->ctrl = 0;
	} else {
		nv_encoder->ctrl |= proto << 8;
		nv_encoder->ctrl |= BIT(head);
1517
		asyh->or.depth = depth;
1518 1519
	}

1520
	core->func->sor->ctrl(core, nv_encoder->or, nv_encoder->ctrl, asyh);
1521 1522 1523
}

static void
1524
nv50_sor_disable(struct drm_encoder *encoder)
1525 1526 1527
{
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc);
1528 1529

	nv_encoder->crtc = NULL;
1530 1531

	if (nv_crtc) {
1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543
		struct nvkm_i2c_aux *aux = nv_encoder->aux;
		u8 pwr;

		if (aux) {
			int ret = nvkm_rdaux(aux, DP_SET_POWER, &pwr, 1);
			if (ret == 0) {
				pwr &= ~DP_SET_POWER_MASK;
				pwr |=  DP_SET_POWER_D3;
				nvkm_wraux(aux, DP_SET_POWER, &pwr, 1);
			}
		}

1544
		nv_encoder->update(nv_encoder, nv_crtc->index, NULL, 0, 0);
1545 1546
		nv50_audio_disable(encoder, nv_crtc);
		nv50_hdmi_disable(&nv_encoder->base.base, nv_crtc);
1547
		nv50_outp_release(nv_encoder);
1548
	}
1549 1550
}

1551
static void
1552
nv50_sor_enable(struct drm_encoder *encoder)
1553
{
1554 1555
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
1556 1557
	struct nv50_head_atom *asyh = nv50_head_atom(nv_crtc->base.state);
	struct drm_display_mode *mode = &asyh->state.adjusted_mode;
1558 1559 1560 1561 1562 1563 1564 1565 1566
	struct {
		struct nv50_disp_mthd_v1 base;
		struct nv50_disp_sor_lvds_script_v0 lvds;
	} lvds = {
		.base.version = 1,
		.base.method  = NV50_DISP_MTHD_V1_SOR_LVDS_SCRIPT,
		.base.hasht   = nv_encoder->dcb->hasht,
		.base.hashm   = nv_encoder->dcb->hashm,
	};
1567
	struct nv50_disp *disp = nv50_disp(encoder->dev);
1568
	struct drm_device *dev = encoder->dev;
1569
	struct nouveau_drm *drm = nouveau_drm(dev);
1570
	struct nouveau_connector *nv_connector;
1571
	struct nvbios *bios = &drm->vbios;
1572 1573
	u8 proto = 0xf;
	u8 depth = 0x0;
1574

1575
	nv_connector = nouveau_encoder_connector_get(nv_encoder);
1576
	nv_encoder->crtc = encoder->crtc;
1577
	nv50_outp_acquire(nv_encoder);
1578

1579
	switch (nv_encoder->dcb->type) {
1580
	case DCB_OUTPUT_TMDS:
1581
		if (nv_encoder->link & 1) {
1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592
			proto = 0x1;
			/* Only enable dual-link if:
			 *  - Need to (i.e. rate > 165MHz)
			 *  - DCB says we can
			 *  - Not an HDMI monitor, since there's no dual-link
			 *    on HDMI.
			 */
			if (mode->clock >= 165000 &&
			    nv_encoder->dcb->duallink_possible &&
			    !drm_detect_hdmi_monitor(nv_connector->edid))
				proto |= 0x4;
1593
		} else {
1594
			proto = 0x2;
1595 1596
		}

1597
		nv50_hdmi_enable(&nv_encoder->base.base, mode);
1598
		break;
1599
	case DCB_OUTPUT_LVDS:
1600 1601
		proto = 0x0;

1602 1603
		if (bios->fp_no_ddc) {
			if (bios->fp.dual_link)
1604
				lvds.lvds.script |= 0x0100;
1605
			if (bios->fp.if_is_24bit)
1606
				lvds.lvds.script |= 0x0200;
1607
		} else {
1608
			if (nv_connector->type == DCB_CONNECTOR_LVDS_SPWG) {
1609
				if (((u8 *)nv_connector->edid)[121] == 2)
1610
					lvds.lvds.script |= 0x0100;
1611 1612
			} else
			if (mode->clock >= bios->fp.duallink_transition_clk) {
1613
				lvds.lvds.script |= 0x0100;
1614
			}
1615

1616
			if (lvds.lvds.script & 0x0100) {
1617
				if (bios->fp.strapless_is_24bit & 2)
1618
					lvds.lvds.script |= 0x0200;
1619 1620
			} else {
				if (bios->fp.strapless_is_24bit & 1)
1621
					lvds.lvds.script |= 0x0200;
1622 1623
			}

1624
			if (asyh->or.bpc == 8)
1625
				lvds.lvds.script |= 0x0200;
1626
		}
1627

1628
		nvif_mthd(&disp->disp->object, 0, &lvds, sizeof(lvds));
1629
		break;
1630
	case DCB_OUTPUT_DP:
1631
		depth = nv50_dp_bpc_to_depth(asyh->or.bpc);
1632

1633
		if (nv_encoder->link & 1)
1634
			proto = 0x8;
1635
		else
1636
			proto = 0x9;
1637 1638

		nv50_audio_enable(encoder, mode);
1639
		break;
1640
	default:
B
Ben Skeggs 已提交
1641
		BUG();
1642 1643
		break;
	}
1644

1645
	nv_encoder->update(nv_encoder, nv_crtc->index, asyh, proto, depth);
1646 1647
}

1648 1649
static const struct drm_encoder_helper_funcs
nv50_sor_help = {
1650 1651 1652
	.atomic_check = nv50_outp_atomic_check,
	.enable = nv50_sor_enable,
	.disable = nv50_sor_disable,
1653 1654
};

1655
static void
1656
nv50_sor_destroy(struct drm_encoder *encoder)
1657
{
1658 1659
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	nv50_mstm_del(&nv_encoder->dp.mstm);
1660 1661 1662 1663
	drm_encoder_cleanup(encoder);
	kfree(encoder);
}

1664 1665
static const struct drm_encoder_funcs
nv50_sor_func = {
1666
	.destroy = nv50_sor_destroy,
1667 1668
};

1669 1670 1671 1672 1673 1674 1675 1676 1677 1678
static bool nv50_has_mst(struct nouveau_drm *drm)
{
	struct nvkm_bios *bios = nvxx_bios(&drm->client.device);
	u32 data;
	u8 ver, hdr, cnt, len;

	data = nvbios_dp_table(bios, &ver, &hdr, &cnt, &len);
	return data && ver >= 0x40 && (nvbios_rd08(bios, data + 0x08) & 0x04);
}

1679
static int
1680
nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe)
1681
{
1682
	struct nouveau_connector *nv_connector = nouveau_connector(connector);
1683
	struct nouveau_drm *drm = nouveau_drm(connector->dev);
1684
	struct nvkm_i2c *i2c = nvxx_i2c(&drm->client.device);
1685 1686
	struct nouveau_encoder *nv_encoder;
	struct drm_encoder *encoder;
1687
	int type, ret;
1688 1689 1690 1691 1692 1693 1694 1695 1696

	switch (dcbe->type) {
	case DCB_OUTPUT_LVDS: type = DRM_MODE_ENCODER_LVDS; break;
	case DCB_OUTPUT_TMDS:
	case DCB_OUTPUT_DP:
	default:
		type = DRM_MODE_ENCODER_TMDS;
		break;
	}
1697 1698 1699 1700 1701

	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
	if (!nv_encoder)
		return -ENOMEM;
	nv_encoder->dcb = dcbe;
1702
	nv_encoder->update = nv50_sor_update;
1703

1704 1705 1706
	encoder = to_drm_encoder(nv_encoder);
	encoder->possible_crtcs = dcbe->heads;
	encoder->possible_clones = 0;
1707 1708
	drm_encoder_init(connector->dev, encoder, &nv50_sor_func, type,
			 "sor-%04x-%04x", dcbe->hasht, dcbe->hashm);
1709
	drm_encoder_helper_add(encoder, &nv50_sor_help);
1710

1711
	drm_connector_attach_encoder(connector, encoder);
1712

1713
	if (dcbe->type == DCB_OUTPUT_DP) {
1714
		struct nv50_disp *disp = nv50_disp(encoder->dev);
1715 1716 1717
		struct nvkm_i2c_aux *aux =
			nvkm_i2c_aux_find(i2c, dcbe->i2c_index);
		if (aux) {
1718
			if (disp->disp->object.oclass < GF110_DISP) {
1719 1720 1721 1722 1723 1724 1725 1726
				/* HW has no support for address-only
				 * transactions, so we're required to
				 * use custom I2C-over-AUX code.
				 */
				nv_encoder->i2c = &aux->i2c;
			} else {
				nv_encoder->i2c = &nv_connector->aux.ddc;
			}
1727 1728
			nv_encoder->aux = aux;
		}
1729

1730
		if (nv_connector->type != DCB_CONNECTOR_eDP &&
1731 1732 1733
		    nv50_has_mst(drm)) {
			ret = nv50_mstm_new(nv_encoder, &nv_connector->aux,
					    16, nv_connector->base.base.id,
1734 1735 1736 1737
					    &nv_encoder->dp.mstm);
			if (ret)
				return ret;
		}
1738 1739 1740 1741 1742 1743 1744
	} else {
		struct nvkm_i2c_bus *bus =
			nvkm_i2c_bus_find(i2c, dcbe->i2c_index);
		if (bus)
			nv_encoder->i2c = &bus->i2c;
	}

1745 1746
	return 0;
}
1747

1748 1749 1750
/******************************************************************************
 * PIOR
 *****************************************************************************/
1751 1752 1753 1754
static int
nv50_pior_atomic_check(struct drm_encoder *encoder,
		       struct drm_crtc_state *crtc_state,
		       struct drm_connector_state *conn_state)
1755
{
1756 1757 1758 1759 1760
	int ret = nv50_outp_atomic_check(encoder, crtc_state, conn_state);
	if (ret)
		return ret;
	crtc_state->adjusted_mode.clock *= 2;
	return 0;
1761 1762 1763
}

static void
1764
nv50_pior_disable(struct drm_encoder *encoder)
1765
{
1766
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
1767 1768 1769
	struct nv50_core *core = nv50_disp(encoder->dev)->core;
	if (nv_encoder->crtc)
		core->func->pior->ctrl(core, nv_encoder->or, 0x00000000, NULL);
1770
	nv_encoder->crtc = NULL;
1771
	nv50_outp_release(nv_encoder);
1772 1773 1774
}

static void
1775
nv50_pior_enable(struct drm_encoder *encoder)
1776 1777 1778
{
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
1779
	struct nv50_head_atom *asyh = nv50_head_atom(nv_crtc->base.state);
1780
	struct nv50_core *core = nv50_disp(encoder->dev)->core;
1781
	u8 owner = 1 << nv_crtc->index;
1782
	u8 proto;
1783

1784 1785
	nv50_outp_acquire(nv_encoder);

1786
	switch (asyh->or.bpc) {
1787 1788 1789 1790
	case 10: asyh->or.depth = 0x6; break;
	case  8: asyh->or.depth = 0x5; break;
	case  6: asyh->or.depth = 0x2; break;
	default: asyh->or.depth = 0x0; break;
1791 1792 1793 1794 1795 1796 1797 1798
	}

	switch (nv_encoder->dcb->type) {
	case DCB_OUTPUT_TMDS:
	case DCB_OUTPUT_DP:
		proto = 0x0;
		break;
	default:
B
Ben Skeggs 已提交
1799
		BUG();
1800 1801 1802
		break;
	}

1803
	core->func->pior->ctrl(core, nv_encoder->or, (proto << 8) | owner, asyh);
1804 1805 1806
	nv_encoder->crtc = encoder->crtc;
}

1807 1808
static const struct drm_encoder_helper_funcs
nv50_pior_help = {
1809 1810 1811
	.atomic_check = nv50_pior_atomic_check,
	.enable = nv50_pior_enable,
	.disable = nv50_pior_disable,
1812 1813
};

1814 1815 1816 1817 1818 1819 1820 1821 1822
static void
nv50_pior_destroy(struct drm_encoder *encoder)
{
	drm_encoder_cleanup(encoder);
	kfree(encoder);
}

static const struct drm_encoder_funcs
nv50_pior_func = {
1823 1824 1825 1826 1827 1828 1829
	.destroy = nv50_pior_destroy,
};

static int
nv50_pior_create(struct drm_connector *connector, struct dcb_output *dcbe)
{
	struct nouveau_drm *drm = nouveau_drm(connector->dev);
1830
	struct nvkm_i2c *i2c = nvxx_i2c(&drm->client.device);
1831 1832 1833
	struct nvkm_i2c_bus *bus = NULL;
	struct nvkm_i2c_aux *aux = NULL;
	struct i2c_adapter *ddc;
1834 1835 1836 1837 1838 1839
	struct nouveau_encoder *nv_encoder;
	struct drm_encoder *encoder;
	int type;

	switch (dcbe->type) {
	case DCB_OUTPUT_TMDS:
1840 1841
		bus  = nvkm_i2c_bus_find(i2c, NVKM_I2C_BUS_EXT(dcbe->extdev));
		ddc  = bus ? &bus->i2c : NULL;
1842 1843 1844
		type = DRM_MODE_ENCODER_TMDS;
		break;
	case DCB_OUTPUT_DP:
1845
		aux  = nvkm_i2c_aux_find(i2c, NVKM_I2C_AUX_EXT(dcbe->extdev));
1846
		ddc  = aux ? &aux->i2c : NULL;
1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857
		type = DRM_MODE_ENCODER_TMDS;
		break;
	default:
		return -ENODEV;
	}

	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
	if (!nv_encoder)
		return -ENOMEM;
	nv_encoder->dcb = dcbe;
	nv_encoder->i2c = ddc;
1858
	nv_encoder->aux = aux;
1859 1860 1861 1862

	encoder = to_drm_encoder(nv_encoder);
	encoder->possible_crtcs = dcbe->heads;
	encoder->possible_clones = 0;
1863 1864
	drm_encoder_init(connector->dev, encoder, &nv50_pior_func, type,
			 "pior-%04x-%04x", dcbe->hasht, dcbe->hashm);
1865
	drm_encoder_helper_add(encoder, &nv50_pior_help);
1866

1867
	drm_connector_attach_encoder(connector, encoder);
1868 1869 1870
	return 0;
}

1871 1872 1873 1874 1875
/******************************************************************************
 * Atomic
 *****************************************************************************/

static void
1876
nv50_disp_atomic_commit_core(struct drm_atomic_state *state, u32 *interlock)
1877
{
1878
	struct nouveau_drm *drm = nouveau_drm(state->dev);
1879
	struct nv50_disp *disp = nv50_disp(drm->dev);
1880
	struct nv50_core *core = disp->core;
1881 1882
	struct nv50_mstm *mstm;
	struct drm_encoder *encoder;
1883

1884
	NV_ATOMIC(drm, "commit core %08x\n", interlock[NV50_DISP_INTERLOCK_BASE]);
1885

1886 1887 1888 1889 1890 1891 1892 1893
	drm_for_each_encoder(encoder, drm->dev) {
		if (encoder->encoder_type != DRM_MODE_ENCODER_DPMST) {
			mstm = nouveau_encoder(encoder)->dp.mstm;
			if (mstm && mstm->modified)
				nv50_mstm_prepare(mstm);
		}
	}

1894 1895 1896 1897 1898
	core->func->ntfy_init(disp->sync, NV50_DISP_CORE_NTFY);
	core->func->update(core, interlock, true);
	if (core->func->ntfy_wait_done(disp->sync, NV50_DISP_CORE_NTFY,
				       disp->core->chan.base.device))
		NV_ERROR(drm, "core notifier timeout\n");
1899 1900 1901 1902 1903 1904 1905 1906

	drm_for_each_encoder(encoder, drm->dev) {
		if (encoder->encoder_type != DRM_MODE_ENCODER_DPMST) {
			mstm = nouveau_encoder(encoder)->dp.mstm;
			if (mstm && mstm->modified)
				nv50_mstm_cleanup(mstm);
		}
	}
1907 1908
}

1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924
static void
nv50_disp_atomic_commit_wndw(struct drm_atomic_state *state, u32 *interlock)
{
	struct drm_plane_state *new_plane_state;
	struct drm_plane *plane;
	int i;

	for_each_new_plane_in_state(state, plane, new_plane_state, i) {
		struct nv50_wndw *wndw = nv50_wndw(plane);
		if (interlock[wndw->interlock.type] & wndw->interlock.data) {
			if (wndw->func->update)
				wndw->func->update(wndw, interlock);
		}
	}
}

1925 1926 1927 1928
static void
nv50_disp_atomic_commit_tail(struct drm_atomic_state *state)
{
	struct drm_device *dev = state->dev;
1929
	struct drm_crtc_state *new_crtc_state, *old_crtc_state;
1930
	struct drm_crtc *crtc;
1931
	struct drm_plane_state *new_plane_state;
1932 1933 1934 1935
	struct drm_plane *plane;
	struct nouveau_drm *drm = nouveau_drm(dev);
	struct nv50_disp *disp = nv50_disp(dev);
	struct nv50_atom *atom = nv50_atom(state);
1936
	struct nv50_core *core = disp->core;
1937
	struct nv50_outp_atom *outp, *outt;
1938
	u32 interlock[NV50_DISP_INTERLOCK__SIZE] = {};
1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949
	int i;

	NV_ATOMIC(drm, "commit %d %d\n", atom->lock_core, atom->flush_disable);
	drm_atomic_helper_wait_for_fences(dev, state, false);
	drm_atomic_helper_wait_for_dependencies(state);
	drm_atomic_helper_update_legacy_modeset_state(dev, state);

	if (atom->lock_core)
		mutex_lock(&disp->mutex);

	/* Disable head(s). */
1950
	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
1951
		struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state);
1952 1953 1954 1955
		struct nv50_head *head = nv50_head(crtc);

		NV_ATOMIC(drm, "%s: clr %04x (set %04x)\n", crtc->name,
			  asyh->clr.mask, asyh->set.mask);
1956 1957 1958

		if (old_crtc_state->active && !new_crtc_state->active) {
			pm_runtime_put_noidle(dev->dev);
1959
			drm_crtc_vblank_off(crtc);
1960
		}
1961 1962 1963

		if (asyh->clr.mask) {
			nv50_head_flush_clr(head, asyh, atom->flush_disable);
1964
			interlock[NV50_DISP_INTERLOCK_CORE] |= 1;
1965 1966 1967 1968
		}
	}

	/* Disable plane(s). */
1969 1970
	for_each_new_plane_in_state(state, plane, new_plane_state, i) {
		struct nv50_wndw_atom *asyw = nv50_wndw_atom(new_plane_state);
1971 1972 1973 1974 1975 1976 1977
		struct nv50_wndw *wndw = nv50_wndw(plane);

		NV_ATOMIC(drm, "%s: clr %02x (set %02x)\n", plane->name,
			  asyw->clr.mask, asyw->set.mask);
		if (!asyw->clr.mask)
			continue;

1978
		nv50_wndw_flush_clr(wndw, interlock, atom->flush_disable, asyw);
1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993
	}

	/* Disable output path(s). */
	list_for_each_entry(outp, &atom->outp, head) {
		const struct drm_encoder_helper_funcs *help;
		struct drm_encoder *encoder;

		encoder = outp->encoder;
		help = encoder->helper_private;

		NV_ATOMIC(drm, "%s: clr %02x (set %02x)\n", encoder->name,
			  outp->clr.mask, outp->set.mask);

		if (outp->clr.mask) {
			help->disable(encoder);
1994
			interlock[NV50_DISP_INTERLOCK_CORE] |= 1;
1995
			if (outp->flush_disable) {
1996 1997
				nv50_disp_atomic_commit_wndw(state, interlock);
				nv50_disp_atomic_commit_core(state, interlock);
1998
				memset(interlock, 0x00, sizeof(interlock));
1999 2000 2001 2002 2003
			}
		}
	}

	/* Flush disable. */
2004
	if (interlock[NV50_DISP_INTERLOCK_CORE]) {
2005
		if (atom->flush_disable) {
2006 2007
			nv50_disp_atomic_commit_wndw(state, interlock);
			nv50_disp_atomic_commit_core(state, interlock);
2008
			memset(interlock, 0x00, sizeof(interlock));
2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024
		}
	}

	/* Update output path(s). */
	list_for_each_entry_safe(outp, outt, &atom->outp, head) {
		const struct drm_encoder_helper_funcs *help;
		struct drm_encoder *encoder;

		encoder = outp->encoder;
		help = encoder->helper_private;

		NV_ATOMIC(drm, "%s: set %02x (clr %02x)\n", encoder->name,
			  outp->set.mask, outp->clr.mask);

		if (outp->set.mask) {
			help->enable(encoder);
2025
			interlock[NV50_DISP_INTERLOCK_CORE] = 1;
2026 2027 2028 2029 2030 2031 2032
		}

		list_del(&outp->head);
		kfree(outp);
	}

	/* Update head(s). */
2033
	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
2034
		struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state);
2035 2036 2037 2038 2039 2040 2041
		struct nv50_head *head = nv50_head(crtc);

		NV_ATOMIC(drm, "%s: set %04x (clr %04x)\n", crtc->name,
			  asyh->set.mask, asyh->clr.mask);

		if (asyh->set.mask) {
			nv50_head_flush_set(head, asyh);
2042
			interlock[NV50_DISP_INTERLOCK_CORE] = 1;
2043 2044
		}

2045
		if (new_crtc_state->active) {
2046
			if (!old_crtc_state->active) {
2047
				drm_crtc_vblank_on(crtc);
2048 2049
				pm_runtime_get_noresume(dev->dev);
			}
2050
			if (new_crtc_state->event)
2051 2052
				drm_crtc_vblank_get(crtc);
		}
2053 2054
	}

2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069
	/* Update window->head assignment.
	 *
	 * This has to happen in an update that's not interlocked with
	 * any window channels to avoid hitting HW error checks.
	 *
	 *TODO: Proper handling of window ownership (Turing apparently
	 *      supports non-fixed mappings).
	 */
	if (core->assign_windows) {
		core->func->wndw.owner(core);
		core->func->update(core, interlock, false);
		core->assign_windows = false;
		interlock[NV50_DISP_INTERLOCK_CORE] = 0;
	}

2070
	/* Update plane(s). */
2071 2072
	for_each_new_plane_in_state(state, plane, new_plane_state, i) {
		struct nv50_wndw_atom *asyw = nv50_wndw_atom(new_plane_state);
2073 2074 2075 2076 2077 2078 2079 2080
		struct nv50_wndw *wndw = nv50_wndw(plane);

		NV_ATOMIC(drm, "%s: set %02x (clr %02x)\n", plane->name,
			  asyw->set.mask, asyw->clr.mask);
		if ( !asyw->set.mask &&
		    (!asyw->clr.mask || atom->flush_disable))
			continue;

2081
		nv50_wndw_flush_set(wndw, interlock, asyw);
2082 2083 2084
	}

	/* Flush update. */
2085
	nv50_disp_atomic_commit_wndw(state, interlock);
2086

2087 2088
	if (interlock[NV50_DISP_INTERLOCK_CORE]) {
		if (interlock[NV50_DISP_INTERLOCK_BASE] ||
2089 2090
		    interlock[NV50_DISP_INTERLOCK_OVLY] ||
		    interlock[NV50_DISP_INTERLOCK_WNDW] ||
2091
		    !atom->state.legacy_cursor_update)
2092
			nv50_disp_atomic_commit_core(state, interlock);
2093
		else
2094
			disp->core->func->update(disp->core, interlock, false);
2095 2096 2097 2098 2099 2100
	}

	if (atom->lock_core)
		mutex_unlock(&disp->mutex);

	/* Wait for HW to signal completion. */
2101 2102
	for_each_new_plane_in_state(state, plane, new_plane_state, i) {
		struct nv50_wndw_atom *asyw = nv50_wndw_atom(new_plane_state);
2103 2104 2105 2106 2107 2108
		struct nv50_wndw *wndw = nv50_wndw(plane);
		int ret = nv50_wndw_wait_armed(wndw, asyw);
		if (ret)
			NV_ERROR(drm, "%s: timeout\n", plane->name);
	}

2109 2110
	for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
		if (new_crtc_state->event) {
2111
			unsigned long flags;
2112
			/* Get correct count/ts if racing with vblank irq */
2113
			if (new_crtc_state->active)
2114
				drm_crtc_accurate_vblank_count(crtc);
2115
			spin_lock_irqsave(&crtc->dev->event_lock, flags);
2116
			drm_crtc_send_vblank_event(crtc, new_crtc_state->event);
2117
			spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
2118

2119
			new_crtc_state->event = NULL;
2120
			if (new_crtc_state->active)
2121
				drm_crtc_vblank_put(crtc);
2122 2123 2124 2125 2126 2127 2128
		}
	}

	drm_atomic_helper_commit_hw_done(state);
	drm_atomic_helper_cleanup_planes(dev, state);
	drm_atomic_helper_commit_cleanup_done(state);
	drm_atomic_state_put(state);
2129 2130 2131 2132

	/* Drop the RPM ref we got from nv50_disp_atomic_commit() */
	pm_runtime_mark_last_busy(dev->dev);
	pm_runtime_put_autosuspend(dev->dev);
2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146
}

static void
nv50_disp_atomic_commit_work(struct work_struct *work)
{
	struct drm_atomic_state *state =
		container_of(work, typeof(*state), commit_work);
	nv50_disp_atomic_commit_tail(state);
}

static int
nv50_disp_atomic_commit(struct drm_device *dev,
			struct drm_atomic_state *state, bool nonblock)
{
2147
	struct drm_plane_state *new_plane_state;
2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167
	struct drm_plane *plane;
	int ret, i;

	ret = pm_runtime_get_sync(dev->dev);
	if (ret < 0 && ret != -EACCES)
		return ret;

	ret = drm_atomic_helper_setup_commit(state, nonblock);
	if (ret)
		goto done;

	INIT_WORK(&state->commit_work, nv50_disp_atomic_commit_work);

	ret = drm_atomic_helper_prepare_planes(dev, state);
	if (ret)
		goto done;

	if (!nonblock) {
		ret = drm_atomic_helper_wait_for_fences(dev, state, true);
		if (ret)
2168
			goto err_cleanup;
2169 2170
	}

2171 2172 2173 2174
	ret = drm_atomic_helper_swap_state(state, true);
	if (ret)
		goto err_cleanup;

2175 2176
	for_each_new_plane_in_state(state, plane, new_plane_state, i) {
		struct nv50_wndw_atom *asyw = nv50_wndw_atom(new_plane_state);
2177
		struct nv50_wndw *wndw = nv50_wndw(plane);
2178

2179 2180
		if (asyw->set.image)
			nv50_wndw_ntfy_enable(wndw, asyw);
2181 2182 2183 2184
	}

	drm_atomic_state_get(state);

2185 2186 2187 2188 2189 2190
	/*
	 * Grab another RPM ref for the commit tail, which will release the
	 * ref when it's finished
	 */
	pm_runtime_get_noresume(dev->dev);

2191 2192 2193 2194 2195
	if (nonblock)
		queue_work(system_unbound_wq, &state->commit_work);
	else
		nv50_disp_atomic_commit_tail(state);

2196 2197 2198
err_cleanup:
	if (ret)
		drm_atomic_helper_cleanup_planes(dev, state);
2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224
done:
	pm_runtime_put_autosuspend(dev->dev);
	return ret;
}

static struct nv50_outp_atom *
nv50_disp_outp_atomic_add(struct nv50_atom *atom, struct drm_encoder *encoder)
{
	struct nv50_outp_atom *outp;

	list_for_each_entry(outp, &atom->outp, head) {
		if (outp->encoder == encoder)
			return outp;
	}

	outp = kzalloc(sizeof(*outp), GFP_KERNEL);
	if (!outp)
		return ERR_PTR(-ENOMEM);

	list_add(&outp->head, &atom->outp);
	outp->encoder = encoder;
	return outp;
}

static int
nv50_disp_outp_atomic_check_clr(struct nv50_atom *atom,
2225
				struct drm_connector_state *old_connector_state)
2226
{
2227 2228
	struct drm_encoder *encoder = old_connector_state->best_encoder;
	struct drm_crtc_state *old_crtc_state, *new_crtc_state;
2229 2230 2231
	struct drm_crtc *crtc;
	struct nv50_outp_atom *outp;

2232
	if (!(crtc = old_connector_state->crtc))
2233 2234
		return 0;

2235 2236 2237
	old_crtc_state = drm_atomic_get_old_crtc_state(&atom->state, crtc);
	new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc);
	if (old_crtc_state->active && drm_atomic_crtc_needs_modeset(new_crtc_state)) {
2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257
		outp = nv50_disp_outp_atomic_add(atom, encoder);
		if (IS_ERR(outp))
			return PTR_ERR(outp);

		if (outp->encoder->encoder_type == DRM_MODE_ENCODER_DPMST) {
			outp->flush_disable = true;
			atom->flush_disable = true;
		}
		outp->clr.ctrl = true;
		atom->lock_core = true;
	}

	return 0;
}

static int
nv50_disp_outp_atomic_check_set(struct nv50_atom *atom,
				struct drm_connector_state *connector_state)
{
	struct drm_encoder *encoder = connector_state->best_encoder;
2258
	struct drm_crtc_state *new_crtc_state;
2259 2260 2261 2262 2263 2264
	struct drm_crtc *crtc;
	struct nv50_outp_atom *outp;

	if (!(crtc = connector_state->crtc))
		return 0;

2265 2266
	new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc);
	if (new_crtc_state->active && drm_atomic_crtc_needs_modeset(new_crtc_state)) {
2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281
		outp = nv50_disp_outp_atomic_add(atom, encoder);
		if (IS_ERR(outp))
			return PTR_ERR(outp);

		outp->set.ctrl = true;
		atom->lock_core = true;
	}

	return 0;
}

static int
nv50_disp_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
{
	struct nv50_atom *atom = nv50_atom(state);
2282
	struct drm_connector_state *old_connector_state, *new_connector_state;
2283
	struct drm_connector *connector;
2284 2285
	struct drm_crtc_state *new_crtc_state;
	struct drm_crtc *crtc;
2286 2287
	int ret, i;

2288 2289 2290 2291 2292 2293 2294 2295 2296
	/* We need to handle colour management on a per-plane basis. */
	for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
		if (new_crtc_state->color_mgmt_changed) {
			ret = drm_atomic_add_affected_planes(state, crtc);
			if (ret)
				return ret;
		}
	}

2297 2298 2299 2300
	ret = drm_atomic_helper_check(dev, state);
	if (ret)
		return ret;

2301 2302
	for_each_oldnew_connector_in_state(state, connector, old_connector_state, new_connector_state, i) {
		ret = nv50_disp_outp_atomic_check_clr(atom, old_connector_state);
2303 2304 2305
		if (ret)
			return ret;

2306
		ret = nv50_disp_outp_atomic_check_set(atom, new_connector_state);
2307 2308 2309 2310
		if (ret)
			return ret;
	}

2311 2312 2313 2314
	ret = drm_dp_mst_atomic_check(state);
	if (ret)
		return ret;

2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355
	return 0;
}

static void
nv50_disp_atomic_state_clear(struct drm_atomic_state *state)
{
	struct nv50_atom *atom = nv50_atom(state);
	struct nv50_outp_atom *outp, *outt;

	list_for_each_entry_safe(outp, outt, &atom->outp, head) {
		list_del(&outp->head);
		kfree(outp);
	}

	drm_atomic_state_default_clear(state);
}

static void
nv50_disp_atomic_state_free(struct drm_atomic_state *state)
{
	struct nv50_atom *atom = nv50_atom(state);
	drm_atomic_state_default_release(&atom->state);
	kfree(atom);
}

static struct drm_atomic_state *
nv50_disp_atomic_state_alloc(struct drm_device *dev)
{
	struct nv50_atom *atom;
	if (!(atom = kzalloc(sizeof(*atom), GFP_KERNEL)) ||
	    drm_atomic_state_init(dev, &atom->state) < 0) {
		kfree(atom);
		return NULL;
	}
	INIT_LIST_HEAD(&atom->outp);
	return &atom->state;
}

static const struct drm_mode_config_funcs
nv50_disp_func = {
	.fb_create = nouveau_user_framebuffer_create,
2356
	.output_poll_changed = nouveau_fbcon_output_poll_changed,
2357 2358 2359 2360 2361 2362 2363
	.atomic_check = nv50_disp_atomic_check,
	.atomic_commit = nv50_disp_atomic_commit,
	.atomic_state_alloc = nv50_disp_atomic_state_alloc,
	.atomic_state_clear = nv50_disp_atomic_state_clear,
	.atomic_state_free = nv50_disp_atomic_state_free,
};

2364 2365 2366
/******************************************************************************
 * Init
 *****************************************************************************/
2367

2368
static void
2369
nv50_display_fini(struct drm_device *dev, bool suspend)
2370
{
2371 2372
	struct nouveau_encoder *nv_encoder;
	struct drm_encoder *encoder;
2373 2374 2375 2376 2377 2378 2379 2380
	struct drm_plane *plane;

	drm_for_each_plane(plane, dev) {
		struct nv50_wndw *wndw = nv50_wndw(plane);
		if (plane->funcs != &nv50_wndw)
			continue;
		nv50_wndw_fini(wndw);
	}
2381 2382 2383 2384 2385 2386 2387

	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
		if (encoder->encoder_type != DRM_MODE_ENCODER_DPMST) {
			nv_encoder = nouveau_encoder(encoder);
			nv50_mstm_fini(nv_encoder->dp.mstm);
		}
	}
2388 2389
}

2390
static int
2391
nv50_display_init(struct drm_device *dev, bool resume, bool runtime)
2392
{
2393
	struct nv50_core *core = nv50_disp(dev)->core;
2394
	struct drm_encoder *encoder;
2395
	struct drm_plane *plane;
2396

2397
	core->func->init(core);
2398

2399 2400
	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
		if (encoder->encoder_type != DRM_MODE_ENCODER_DPMST) {
2401 2402
			struct nouveau_encoder *nv_encoder =
				nouveau_encoder(encoder);
2403
			nv50_mstm_init(nv_encoder->dp.mstm, runtime);
2404 2405 2406
		}
	}

2407 2408 2409 2410 2411 2412 2413
	drm_for_each_plane(plane, dev) {
		struct nv50_wndw *wndw = nv50_wndw(plane);
		if (plane->funcs != &nv50_wndw)
			continue;
		nv50_wndw_init(wndw);
	}

2414
	return 0;
2415 2416
}

2417
static void
2418
nv50_display_destroy(struct drm_device *dev)
2419
{
2420
	struct nv50_disp *disp = nv50_disp(dev);
2421

2422 2423
	nv50_audio_component_fini(nouveau_drm(dev));

2424
	nv50_core_del(&disp->core);
2425

2426
	nouveau_bo_unmap(disp->sync);
2427 2428
	if (disp->sync)
		nouveau_bo_unpin(disp->sync);
2429
	nouveau_bo_ref(NULL, &disp->sync);
2430

2431
	nouveau_display(dev)->priv = NULL;
2432 2433 2434 2435
	kfree(disp);
}

int
2436
nv50_display_create(struct drm_device *dev)
2437
{
2438
	struct nvif_device *device = &nouveau_drm(dev)->client.device;
2439 2440
	struct nouveau_drm *drm = nouveau_drm(dev);
	struct dcb_table *dcb = &drm->vbios.dcb;
2441
	struct drm_connector *connector, *tmp;
2442
	struct nv50_disp *disp;
2443
	struct dcb_output *dcbe;
2444
	int crtcs, ret, i;
2445
	bool has_mst = nv50_has_mst(drm);
2446 2447 2448 2449

	disp = kzalloc(sizeof(*disp), GFP_KERNEL);
	if (!disp)
		return -ENOMEM;
2450

2451 2452
	mutex_init(&disp->mutex);

2453
	nouveau_display(dev)->priv = disp;
2454 2455 2456
	nouveau_display(dev)->dtor = nv50_display_destroy;
	nouveau_display(dev)->init = nv50_display_init;
	nouveau_display(dev)->fini = nv50_display_fini;
2457
	disp->disp = &nouveau_display(dev)->disp;
2458
	dev->mode_config.funcs = &nv50_disp_func;
2459
	dev->mode_config.quirk_addfb_prefer_xbgr_30bpp = true;
2460
	dev->mode_config.normalize_zpos = true;
2461

2462
	/* small shared memory area we use for notifiers and semaphores */
2463
	ret = nouveau_bo_new(&drm->client, 4096, 0x1000, TTM_PL_FLAG_VRAM,
2464
			     0, 0x0000, NULL, NULL, &disp->sync);
2465
	if (!ret) {
2466
		ret = nouveau_bo_pin(disp->sync, TTM_PL_FLAG_VRAM, true);
2467
		if (!ret) {
2468
			ret = nouveau_bo_map(disp->sync);
2469 2470 2471
			if (ret)
				nouveau_bo_unpin(disp->sync);
		}
2472 2473 2474 2475 2476 2477 2478 2479
		if (ret)
			nouveau_bo_ref(NULL, &disp->sync);
	}

	if (ret)
		goto out;

	/* allocate master evo channel */
2480
	ret = nv50_core_new(drm, &disp->core);
2481 2482 2483
	if (ret)
		goto out;

2484
	/* create crtc objects to represent the hw heads */
2485 2486 2487
	if (disp->disp->object.oclass >= GV100_DISP)
		crtcs = nvif_rd32(&device->object, 0x610060) & 0xff;
	else
2488
	if (disp->disp->object.oclass >= GF110_DISP)
2489
		crtcs = nvif_rd32(&device->object, 0x612004) & 0xf;
2490
	else
2491
		crtcs = 0x3;
2492

2493
	for (i = 0; i < fls(crtcs); i++) {
2494 2495
		struct nv50_head *head;

2496 2497
		if (!(crtcs & (1 << i)))
			continue;
2498 2499 2500 2501

		head = nv50_head_create(dev, i);
		if (IS_ERR(head)) {
			ret = PTR_ERR(head);
2502
			goto out;
2503 2504 2505 2506 2507 2508 2509 2510 2511
		}

		if (has_mst) {
			head->msto = nv50_msto_new(dev, head, i);
			if (IS_ERR(head->msto)) {
				ret = PTR_ERR(head->msto);
				head->msto = NULL;
				goto out;
			}
2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522 2523

			/*
			 * FIXME: This is a hack to workaround the following
			 * issues:
			 *
			 * https://gitlab.gnome.org/GNOME/mutter/issues/759
			 * https://gitlab.freedesktop.org/xorg/xserver/merge_requests/277
			 *
			 * Once these issues are closed, this should be
			 * removed
			 */
			head->msto->encoder.possible_crtcs = crtcs;
2524
		}
2525 2526
	}

2527 2528
	/* create encoder/connector objects based on VBIOS DCB table */
	for (i = 0, dcbe = &dcb->entry[0]; i < dcb->entries; i++, dcbe++) {
2529
		connector = nouveau_connector_create(dev, dcbe);
2530 2531 2532
		if (IS_ERR(connector))
			continue;

2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548
		if (dcbe->location == DCB_LOC_ON_CHIP) {
			switch (dcbe->type) {
			case DCB_OUTPUT_TMDS:
			case DCB_OUTPUT_LVDS:
			case DCB_OUTPUT_DP:
				ret = nv50_sor_create(connector, dcbe);
				break;
			case DCB_OUTPUT_ANALOG:
				ret = nv50_dac_create(connector, dcbe);
				break;
			default:
				ret = -ENODEV;
				break;
			}
		} else {
			ret = nv50_pior_create(connector, dcbe);
2549 2550
		}

2551 2552 2553 2554
		if (ret) {
			NV_WARN(drm, "failed to create encoder %d/%d/%d: %d\n",
				     dcbe->location, dcbe->type,
				     ffs(dcbe->or) - 1, ret);
2555
			ret = 0;
2556 2557 2558 2559 2560
		}
	}

	/* cull any connectors we created that don't have an encoder */
	list_for_each_entry_safe(connector, tmp, &dev->mode_config.connector_list, head) {
2561
		if (connector->possible_encoders)
2562 2563
			continue;

2564
		NV_WARN(drm, "%s has no encoders, removing\n",
2565
			connector->name);
2566 2567 2568
		connector->funcs->destroy(connector);
	}

2569 2570 2571
	/* Disable vblank irqs aggressively for power-saving, safe on nv50+ */
	dev->vblank_disable_immediate = true;

2572 2573
	nv50_audio_component_init(drm);

2574 2575
out:
	if (ret)
2576
		nv50_display_destroy(dev);
2577 2578
	return ret;
}