i915_dma.c 48.0 KB
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/* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
 */
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/*
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 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
 * All Rights Reserved.
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 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
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 */
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#include "drmP.h"
#include "drm.h"
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#include "drm_crtc_helper.h"
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#include "drm_fb_helper.h"
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#include "intel_drv.h"
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#include "i915_drm.h"
#include "i915_drv.h"
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#include "i915_trace.h"
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#include <linux/pci.h>
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#include <linux/vgaarb.h>
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#include <linux/acpi.h>
#include <linux/pnp.h>
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#include <linux/vga_switcheroo.h>
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#include <linux/slab.h>
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#include <acpi/video.h>
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#include <asm/pat.h>
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#define LP_RING(d) (&((struct drm_i915_private *)(d))->ring[RCS])

#define BEGIN_LP_RING(n) \
	intel_ring_begin(LP_RING(dev_priv), (n))

#define OUT_RING(x) \
	intel_ring_emit(LP_RING(dev_priv), x)

#define ADVANCE_LP_RING() \
	intel_ring_advance(LP_RING(dev_priv))

/**
 * Lock test for when it's just for synchronization of ring access.
 *
 * In that case, we don't need to do it when GEM is initialized as nobody else
 * has access to the ring.
 */
#define RING_LOCK_TEST_WITH_RETURN(dev, file) do {			\
	if (LP_RING(dev->dev_private)->obj == NULL)			\
		LOCK_TEST_WITH_RETURN(dev, file);			\
} while (0)

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static inline u32
intel_read_legacy_status_page(struct drm_i915_private *dev_priv, int reg)
{
	if (I915_NEED_GFX_HWS(dev_priv->dev))
		return ioread32(dev_priv->dri1.gfx_hws_cpu_addr + reg);
	else
		return intel_read_status_page(LP_RING(dev_priv), reg);
}

#define READ_HWSP(dev_priv, reg) intel_read_legacy_status_page(dev_priv, reg)
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#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX)
#define I915_BREADCRUMB_INDEX		0x21

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void i915_update_dri1_breadcrumb(struct drm_device *dev)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	struct drm_i915_master_private *master_priv;

	if (dev->primary->master) {
		master_priv = dev->primary->master->driver_priv;
		if (master_priv->sarea_priv)
			master_priv->sarea_priv->last_dispatch =
				READ_BREADCRUMB(dev_priv);
	}
}

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static void i915_write_hws_pga(struct drm_device *dev)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	u32 addr;

	addr = dev_priv->status_page_dmah->busaddr;
	if (INTEL_INFO(dev)->gen >= 4)
		addr |= (dev_priv->status_page_dmah->busaddr >> 28) & 0xf0;
	I915_WRITE(HWS_PGA, addr);
}

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/**
 * Sets up the hardware status page for devices that need a physical address
 * in the register.
 */
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static int i915_init_phys_hws(struct drm_device *dev)
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{
	drm_i915_private_t *dev_priv = dev->dev_private;
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	/* Program Hardware Status Page */
	dev_priv->status_page_dmah =
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		drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE);
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	if (!dev_priv->status_page_dmah) {
		DRM_ERROR("Can not allocate hardware status page\n");
		return -ENOMEM;
	}

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	memset_io((void __force __iomem *)dev_priv->status_page_dmah->vaddr,
		  0, PAGE_SIZE);
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	i915_write_hws_pga(dev);
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	DRM_DEBUG_DRIVER("Enabled hardware status page\n");
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	return 0;
}

/**
 * Frees the hardware status page, whether it's a physical address or a virtual
 * address set up by the X Server.
 */
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static void i915_free_hws(struct drm_device *dev)
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{
	drm_i915_private_t *dev_priv = dev->dev_private;
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	struct intel_ring_buffer *ring = LP_RING(dev_priv);

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	if (dev_priv->status_page_dmah) {
		drm_pci_free(dev, dev_priv->status_page_dmah);
		dev_priv->status_page_dmah = NULL;
	}

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	if (ring->status_page.gfx_addr) {
		ring->status_page.gfx_addr = 0;
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		iounmap(dev_priv->dri1.gfx_hws_cpu_addr);
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	}

	/* Need to rewrite hardware status page */
	I915_WRITE(HWS_PGA, 0x1ffff000);
}

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void i915_kernel_lost_context(struct drm_device * dev)
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{
	drm_i915_private_t *dev_priv = dev->dev_private;
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	struct drm_i915_master_private *master_priv;
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	struct intel_ring_buffer *ring = LP_RING(dev_priv);
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	/*
	 * We should never lose context on the ring with modesetting
	 * as we don't expose it to userspace
	 */
	if (drm_core_check_feature(dev, DRIVER_MODESET))
		return;

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	ring->head = I915_READ_HEAD(ring) & HEAD_ADDR;
	ring->tail = I915_READ_TAIL(ring) & TAIL_ADDR;
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	ring->space = ring->head - (ring->tail + 8);
	if (ring->space < 0)
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		ring->space += ring->size;
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	if (!dev->primary->master)
		return;

	master_priv = dev->primary->master->driver_priv;
	if (ring->head == ring->tail && master_priv->sarea_priv)
		master_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
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}

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static int i915_dma_cleanup(struct drm_device * dev)
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{
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	drm_i915_private_t *dev_priv = dev->dev_private;
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	int i;

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	/* Make sure interrupts are disabled here because the uninstall ioctl
	 * may not have been called from userspace and after dev_private
	 * is freed, it's too late.
	 */
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	if (dev->irq_enabled)
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		drm_irq_uninstall(dev);
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	mutex_lock(&dev->struct_mutex);
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	for (i = 0; i < I915_NUM_RINGS; i++)
		intel_cleanup_ring_buffer(&dev_priv->ring[i]);
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	mutex_unlock(&dev->struct_mutex);
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	/* Clear the HWS virtual address at teardown */
	if (I915_NEED_GFX_HWS(dev))
		i915_free_hws(dev);
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	return 0;
}

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static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
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{
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	drm_i915_private_t *dev_priv = dev->dev_private;
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	struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
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	int ret;
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	master_priv->sarea = drm_getsarea(dev);
	if (master_priv->sarea) {
		master_priv->sarea_priv = (drm_i915_sarea_t *)
			((u8 *)master_priv->sarea->handle + init->sarea_priv_offset);
	} else {
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		DRM_DEBUG_DRIVER("sarea not found assuming DRI2 userspace\n");
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	}

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	if (init->ring_size != 0) {
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		if (LP_RING(dev_priv)->obj != NULL) {
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			i915_dma_cleanup(dev);
			DRM_ERROR("Client tried to initialize ringbuffer in "
				  "GEM mode\n");
			return -EINVAL;
		}
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		ret = intel_render_ring_init_dri(dev,
						 init->ring_start,
						 init->ring_size);
		if (ret) {
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			i915_dma_cleanup(dev);
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			return ret;
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		}
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	}

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	dev_priv->cpp = init->cpp;
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	dev_priv->back_offset = init->back_offset;
	dev_priv->front_offset = init->front_offset;
	dev_priv->current_page = 0;
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	if (master_priv->sarea_priv)
		master_priv->sarea_priv->pf_current_page = 0;
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	/* Allow hardware batchbuffers unless told otherwise.
	 */
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	dev_priv->dri1.allow_batchbuffer = 1;
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	return 0;
}

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static int i915_dma_resume(struct drm_device * dev)
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{
	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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	struct intel_ring_buffer *ring = LP_RING(dev_priv);
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	DRM_DEBUG_DRIVER("%s\n", __func__);
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	if (ring->virtual_start == NULL) {
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		DRM_ERROR("can not ioremap virtual address for"
			  " ring buffer\n");
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		return -ENOMEM;
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	}

	/* Program Hardware Status Page */
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	if (!ring->status_page.page_addr) {
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		DRM_ERROR("Can not find hardware status page\n");
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		return -EINVAL;
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	}
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	DRM_DEBUG_DRIVER("hw status page @ %p\n",
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				ring->status_page.page_addr);
	if (ring->status_page.gfx_addr != 0)
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		intel_ring_setup_status_page(ring);
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	else
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		i915_write_hws_pga(dev);
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	DRM_DEBUG_DRIVER("Enabled hardware status page\n");
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	return 0;
}

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static int i915_dma_init(struct drm_device *dev, void *data,
			 struct drm_file *file_priv)
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{
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	drm_i915_init_t *init = data;
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	int retcode = 0;

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	if (drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

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	switch (init->func) {
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	case I915_INIT_DMA:
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		retcode = i915_initialize(dev, init);
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		break;
	case I915_CLEANUP_DMA:
		retcode = i915_dma_cleanup(dev);
		break;
	case I915_RESUME_DMA:
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		retcode = i915_dma_resume(dev);
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		break;
	default:
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		retcode = -EINVAL;
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		break;
	}

	return retcode;
}

/* Implement basically the same security restrictions as hardware does
 * for MI_BATCH_NON_SECURE.  These can be made stricter at any time.
 *
 * Most of the calculations below involve calculating the size of a
 * particular instruction.  It's important to get the size right as
 * that tells us where the next instruction to check is.  Any illegal
 * instruction detected will be given a size of zero, which is a
 * signal to abort the rest of the buffer.
 */
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static int validate_cmd(int cmd)
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{
	switch (((cmd >> 29) & 0x7)) {
	case 0x0:
		switch ((cmd >> 23) & 0x3f) {
		case 0x0:
			return 1;	/* MI_NOOP */
		case 0x4:
			return 1;	/* MI_FLUSH */
		default:
			return 0;	/* disallow everything else */
		}
		break;
	case 0x1:
		return 0;	/* reserved */
	case 0x2:
		return (cmd & 0xff) + 2;	/* 2d commands */
	case 0x3:
		if (((cmd >> 24) & 0x1f) <= 0x18)
			return 1;

		switch ((cmd >> 24) & 0x1f) {
		case 0x1c:
			return 1;
		case 0x1d:
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			switch ((cmd >> 16) & 0xff) {
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			case 0x3:
				return (cmd & 0x1f) + 2;
			case 0x4:
				return (cmd & 0xf) + 2;
			default:
				return (cmd & 0xffff) + 2;
			}
		case 0x1e:
			if (cmd & (1 << 23))
				return (cmd & 0xffff) + 1;
			else
				return 1;
		case 0x1f:
			if ((cmd & (1 << 23)) == 0)	/* inline vertices */
				return (cmd & 0x1ffff) + 2;
			else if (cmd & (1 << 17))	/* indirect random */
				if ((cmd & 0xffff) == 0)
					return 0;	/* unknown length, too hard */
				else
					return (((cmd & 0xffff) + 1) / 2) + 1;
			else
				return 2;	/* indirect sequential */
		default:
			return 0;
		}
	default:
		return 0;
	}

	return 0;
}

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static int i915_emit_cmds(struct drm_device * dev, int *buffer, int dwords)
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{
	drm_i915_private_t *dev_priv = dev->dev_private;
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	int i, ret;
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	if ((dwords+1) * sizeof(int) >= LP_RING(dev_priv)->size - 8)
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		return -EINVAL;
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	for (i = 0; i < dwords;) {
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		int sz = validate_cmd(buffer[i]);
		if (sz == 0 || i + sz > dwords)
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			return -EINVAL;
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		i += sz;
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	}

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	ret = BEGIN_LP_RING((dwords+1)&~1);
	if (ret)
		return ret;

	for (i = 0; i < dwords; i++)
		OUT_RING(buffer[i]);
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	if (dwords & 1)
		OUT_RING(0);

	ADVANCE_LP_RING();

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	return 0;
}

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int
i915_emit_box(struct drm_device *dev,
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	      struct drm_clip_rect *box,
	      int DR1, int DR4)
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{
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	struct drm_i915_private *dev_priv = dev->dev_private;
	int ret;
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	if (box->y2 <= box->y1 || box->x2 <= box->x1 ||
	    box->y2 <= 0 || box->x2 <= 0) {
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		DRM_ERROR("Bad box %d,%d..%d,%d\n",
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			  box->x1, box->y1, box->x2, box->y2);
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		return -EINVAL;
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	}

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	if (INTEL_INFO(dev)->gen >= 4) {
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		ret = BEGIN_LP_RING(4);
		if (ret)
			return ret;

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		OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
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		OUT_RING((box->x1 & 0xffff) | (box->y1 << 16));
		OUT_RING(((box->x2 - 1) & 0xffff) | ((box->y2 - 1) << 16));
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		OUT_RING(DR4);
	} else {
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		ret = BEGIN_LP_RING(6);
		if (ret)
			return ret;

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		OUT_RING(GFX_OP_DRAWRECT_INFO);
		OUT_RING(DR1);
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		OUT_RING((box->x1 & 0xffff) | (box->y1 << 16));
		OUT_RING(((box->x2 - 1) & 0xffff) | ((box->y2 - 1) << 16));
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		OUT_RING(DR4);
		OUT_RING(0);
	}
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	ADVANCE_LP_RING();
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	return 0;
}

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/* XXX: Emitting the counter should really be moved to part of the IRQ
 * emit. For now, do it in both places:
 */

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static void i915_emit_breadcrumb(struct drm_device *dev)
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{
	drm_i915_private_t *dev_priv = dev->dev_private;
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	struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
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	dev_priv->counter++;
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	if (dev_priv->counter > 0x7FFFFFFFUL)
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		dev_priv->counter = 0;
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	if (master_priv->sarea_priv)
		master_priv->sarea_priv->last_enqueue = dev_priv->counter;
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	if (BEGIN_LP_RING(4) == 0) {
		OUT_RING(MI_STORE_DWORD_INDEX);
		OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
		OUT_RING(dev_priv->counter);
		OUT_RING(0);
		ADVANCE_LP_RING();
	}
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}

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static int i915_dispatch_cmdbuffer(struct drm_device * dev,
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				   drm_i915_cmdbuffer_t *cmd,
				   struct drm_clip_rect *cliprects,
				   void *cmdbuf)
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{
	int nbox = cmd->num_cliprects;
	int i = 0, count, ret;

	if (cmd->sz & 0x3) {
		DRM_ERROR("alignment");
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		return -EINVAL;
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	}

	i915_kernel_lost_context(dev);

	count = nbox ? nbox : 1;

	for (i = 0; i < count; i++) {
		if (i < nbox) {
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			ret = i915_emit_box(dev, &cliprects[i],
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					    cmd->DR1, cmd->DR4);
			if (ret)
				return ret;
		}

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		ret = i915_emit_cmds(dev, cmdbuf, cmd->sz / 4);
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		if (ret)
			return ret;
	}

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	i915_emit_breadcrumb(dev);
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	return 0;
}

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static int i915_dispatch_batchbuffer(struct drm_device * dev,
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				     drm_i915_batchbuffer_t * batch,
				     struct drm_clip_rect *cliprects)
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{
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	struct drm_i915_private *dev_priv = dev->dev_private;
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	int nbox = batch->num_cliprects;
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	int i, count, ret;
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	if ((batch->start | batch->used) & 0x7) {
		DRM_ERROR("alignment");
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		return -EINVAL;
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	}

	i915_kernel_lost_context(dev);

	count = nbox ? nbox : 1;
	for (i = 0; i < count; i++) {
		if (i < nbox) {
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			ret = i915_emit_box(dev, &cliprects[i],
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					    batch->DR1, batch->DR4);
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			if (ret)
				return ret;
		}

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		if (!IS_I830(dev) && !IS_845G(dev)) {
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			ret = BEGIN_LP_RING(2);
			if (ret)
				return ret;

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			if (INTEL_INFO(dev)->gen >= 4) {
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				OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
				OUT_RING(batch->start);
			} else {
				OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
				OUT_RING(batch->start | MI_BATCH_NON_SECURE);
			}
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		} else {
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			ret = BEGIN_LP_RING(4);
			if (ret)
				return ret;

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			OUT_RING(MI_BATCH_BUFFER);
			OUT_RING(batch->start | MI_BATCH_NON_SECURE);
			OUT_RING(batch->start + batch->used - 4);
			OUT_RING(0);
		}
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		ADVANCE_LP_RING();
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	}

553

554
	if (IS_G4X(dev) || IS_GEN5(dev)) {
555 556 557 558 559
		if (BEGIN_LP_RING(2) == 0) {
			OUT_RING(MI_FLUSH | MI_NO_WRITE_FLUSH | MI_INVALIDATE_ISP);
			OUT_RING(MI_NOOP);
			ADVANCE_LP_RING();
		}
560
	}
L
Linus Torvalds 已提交
561

562
	i915_emit_breadcrumb(dev);
L
Linus Torvalds 已提交
563 564 565
	return 0;
}

566
static int i915_dispatch_flip(struct drm_device * dev)
L
Linus Torvalds 已提交
567 568
{
	drm_i915_private_t *dev_priv = dev->dev_private;
569 570
	struct drm_i915_master_private *master_priv =
		dev->primary->master->driver_priv;
571
	int ret;
L
Linus Torvalds 已提交
572

573
	if (!master_priv->sarea_priv)
574 575
		return -EINVAL;

576
	DRM_DEBUG_DRIVER("%s: page=%d pfCurrentPage=%d\n",
577 578 579
			  __func__,
			 dev_priv->current_page,
			 master_priv->sarea_priv->pf_current_page);
L
Linus Torvalds 已提交
580

581 582
	i915_kernel_lost_context(dev);

583 584 585 586
	ret = BEGIN_LP_RING(10);
	if (ret)
		return ret;

587
	OUT_RING(MI_FLUSH | MI_READ_FLUSH);
588
	OUT_RING(0);
L
Linus Torvalds 已提交
589

590 591 592 593 594
	OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
	OUT_RING(0);
	if (dev_priv->current_page == 0) {
		OUT_RING(dev_priv->back_offset);
		dev_priv->current_page = 1;
L
Linus Torvalds 已提交
595
	} else {
596 597
		OUT_RING(dev_priv->front_offset);
		dev_priv->current_page = 0;
L
Linus Torvalds 已提交
598
	}
599
	OUT_RING(0);
L
Linus Torvalds 已提交
600

601 602
	OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
	OUT_RING(0);
603

604
	ADVANCE_LP_RING();
L
Linus Torvalds 已提交
605

606
	master_priv->sarea_priv->last_enqueue = dev_priv->counter++;
L
Linus Torvalds 已提交
607

608 609 610 611 612 613 614
	if (BEGIN_LP_RING(4) == 0) {
		OUT_RING(MI_STORE_DWORD_INDEX);
		OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
		OUT_RING(dev_priv->counter);
		OUT_RING(0);
		ADVANCE_LP_RING();
	}
L
Linus Torvalds 已提交
615

616
	master_priv->sarea_priv->pf_current_page = dev_priv->current_page;
617
	return 0;
L
Linus Torvalds 已提交
618 619
}

620
static int i915_quiescent(struct drm_device *dev)
L
Linus Torvalds 已提交
621
{
622
	struct intel_ring_buffer *ring = LP_RING(dev->dev_private);
L
Linus Torvalds 已提交
623 624

	i915_kernel_lost_context(dev);
625
	return intel_wait_ring_idle(ring);
L
Linus Torvalds 已提交
626 627
}

628 629
static int i915_flush_ioctl(struct drm_device *dev, void *data,
			    struct drm_file *file_priv)
L
Linus Torvalds 已提交
630
{
631 632
	int ret;

633 634 635
	if (drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

636
	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
L
Linus Torvalds 已提交
637

638 639 640 641 642
	mutex_lock(&dev->struct_mutex);
	ret = i915_quiescent(dev);
	mutex_unlock(&dev->struct_mutex);

	return ret;
L
Linus Torvalds 已提交
643 644
}

645 646
static int i915_batchbuffer(struct drm_device *dev, void *data,
			    struct drm_file *file_priv)
L
Linus Torvalds 已提交
647 648
{
	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
649
	struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
L
Linus Torvalds 已提交
650
	drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
651
	    master_priv->sarea_priv;
652
	drm_i915_batchbuffer_t *batch = data;
L
Linus Torvalds 已提交
653
	int ret;
654
	struct drm_clip_rect *cliprects = NULL;
L
Linus Torvalds 已提交
655

656 657 658
	if (drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

659
	if (!dev_priv->dri1.allow_batchbuffer) {
L
Linus Torvalds 已提交
660
		DRM_ERROR("Batchbuffer ioctl disabled\n");
E
Eric Anholt 已提交
661
		return -EINVAL;
L
Linus Torvalds 已提交
662 663
	}

664
	DRM_DEBUG_DRIVER("i915 batchbuffer, start %x used %d cliprects %d\n",
665
			batch->start, batch->used, batch->num_cliprects);
L
Linus Torvalds 已提交
666

667
	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
L
Linus Torvalds 已提交
668

669 670 671 672
	if (batch->num_cliprects < 0)
		return -EINVAL;

	if (batch->num_cliprects) {
673 674 675
		cliprects = kcalloc(batch->num_cliprects,
				    sizeof(struct drm_clip_rect),
				    GFP_KERNEL);
676 677 678 679 680 681
		if (cliprects == NULL)
			return -ENOMEM;

		ret = copy_from_user(cliprects, batch->cliprects,
				     batch->num_cliprects *
				     sizeof(struct drm_clip_rect));
682 683
		if (ret != 0) {
			ret = -EFAULT;
684
			goto fail_free;
685
		}
686
	}
L
Linus Torvalds 已提交
687

688
	mutex_lock(&dev->struct_mutex);
689
	ret = i915_dispatch_batchbuffer(dev, batch, cliprects);
690
	mutex_unlock(&dev->struct_mutex);
L
Linus Torvalds 已提交
691

692
	if (sarea_priv)
693
		sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
694 695

fail_free:
696
	kfree(cliprects);
697

L
Linus Torvalds 已提交
698 699 700
	return ret;
}

701 702
static int i915_cmdbuffer(struct drm_device *dev, void *data,
			  struct drm_file *file_priv)
L
Linus Torvalds 已提交
703 704
{
	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
705
	struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
L
Linus Torvalds 已提交
706
	drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
707
	    master_priv->sarea_priv;
708
	drm_i915_cmdbuffer_t *cmdbuf = data;
709 710
	struct drm_clip_rect *cliprects = NULL;
	void *batch_data;
L
Linus Torvalds 已提交
711 712
	int ret;

713
	DRM_DEBUG_DRIVER("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
714
			cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
L
Linus Torvalds 已提交
715

716 717 718
	if (drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

719
	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
L
Linus Torvalds 已提交
720

721 722 723
	if (cmdbuf->num_cliprects < 0)
		return -EINVAL;

724
	batch_data = kmalloc(cmdbuf->sz, GFP_KERNEL);
725 726 727 728
	if (batch_data == NULL)
		return -ENOMEM;

	ret = copy_from_user(batch_data, cmdbuf->buf, cmdbuf->sz);
729 730
	if (ret != 0) {
		ret = -EFAULT;
731
		goto fail_batch_free;
732
	}
733 734

	if (cmdbuf->num_cliprects) {
735 736
		cliprects = kcalloc(cmdbuf->num_cliprects,
				    sizeof(struct drm_clip_rect), GFP_KERNEL);
737 738
		if (cliprects == NULL) {
			ret = -ENOMEM;
739
			goto fail_batch_free;
740
		}
741 742 743 744

		ret = copy_from_user(cliprects, cmdbuf->cliprects,
				     cmdbuf->num_cliprects *
				     sizeof(struct drm_clip_rect));
745 746
		if (ret != 0) {
			ret = -EFAULT;
747
			goto fail_clip_free;
748
		}
L
Linus Torvalds 已提交
749 750
	}

751
	mutex_lock(&dev->struct_mutex);
752
	ret = i915_dispatch_cmdbuffer(dev, cmdbuf, cliprects, batch_data);
753
	mutex_unlock(&dev->struct_mutex);
L
Linus Torvalds 已提交
754 755
	if (ret) {
		DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
756
		goto fail_clip_free;
L
Linus Torvalds 已提交
757 758
	}

759
	if (sarea_priv)
760
		sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
761 762

fail_clip_free:
763
	kfree(cliprects);
764
fail_batch_free:
765
	kfree(batch_data);
766 767

	return ret;
L
Linus Torvalds 已提交
768 769
}

770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879
static int i915_emit_irq(struct drm_device * dev)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;

	i915_kernel_lost_context(dev);

	DRM_DEBUG_DRIVER("\n");

	dev_priv->counter++;
	if (dev_priv->counter > 0x7FFFFFFFUL)
		dev_priv->counter = 1;
	if (master_priv->sarea_priv)
		master_priv->sarea_priv->last_enqueue = dev_priv->counter;

	if (BEGIN_LP_RING(4) == 0) {
		OUT_RING(MI_STORE_DWORD_INDEX);
		OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
		OUT_RING(dev_priv->counter);
		OUT_RING(MI_USER_INTERRUPT);
		ADVANCE_LP_RING();
	}

	return dev_priv->counter;
}

static int i915_wait_irq(struct drm_device * dev, int irq_nr)
{
	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
	struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
	int ret = 0;
	struct intel_ring_buffer *ring = LP_RING(dev_priv);

	DRM_DEBUG_DRIVER("irq_nr=%d breadcrumb=%d\n", irq_nr,
		  READ_BREADCRUMB(dev_priv));

	if (READ_BREADCRUMB(dev_priv) >= irq_nr) {
		if (master_priv->sarea_priv)
			master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
		return 0;
	}

	if (master_priv->sarea_priv)
		master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;

	if (ring->irq_get(ring)) {
		DRM_WAIT_ON(ret, ring->irq_queue, 3 * DRM_HZ,
			    READ_BREADCRUMB(dev_priv) >= irq_nr);
		ring->irq_put(ring);
	} else if (wait_for(READ_BREADCRUMB(dev_priv) >= irq_nr, 3000))
		ret = -EBUSY;

	if (ret == -EBUSY) {
		DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
			  READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
	}

	return ret;
}

/* Needs the lock as it touches the ring.
 */
static int i915_irq_emit(struct drm_device *dev, void *data,
			 struct drm_file *file_priv)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	drm_i915_irq_emit_t *emit = data;
	int result;

	if (drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

	if (!dev_priv || !LP_RING(dev_priv)->virtual_start) {
		DRM_ERROR("called with no initialization\n");
		return -EINVAL;
	}

	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);

	mutex_lock(&dev->struct_mutex);
	result = i915_emit_irq(dev);
	mutex_unlock(&dev->struct_mutex);

	if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
		DRM_ERROR("copy_to_user\n");
		return -EFAULT;
	}

	return 0;
}

/* Doesn't need the hardware lock.
 */
static int i915_irq_wait(struct drm_device *dev, void *data,
			 struct drm_file *file_priv)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	drm_i915_irq_wait_t *irqwait = data;

	if (drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

	if (!dev_priv) {
		DRM_ERROR("called with no initialization\n");
		return -EINVAL;
	}

	return i915_wait_irq(dev, irqwait->irq_seq);
}

880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921
static int i915_vblank_pipe_get(struct drm_device *dev, void *data,
			 struct drm_file *file_priv)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	drm_i915_vblank_pipe_t *pipe = data;

	if (drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

	if (!dev_priv) {
		DRM_ERROR("called with no initialization\n");
		return -EINVAL;
	}

	pipe->pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;

	return 0;
}

/**
 * Schedule buffer swap at given vertical blank.
 */
static int i915_vblank_swap(struct drm_device *dev, void *data,
		     struct drm_file *file_priv)
{
	/* The delayed swap mechanism was fundamentally racy, and has been
	 * removed.  The model was that the client requested a delayed flip/swap
	 * from the kernel, then waited for vblank before continuing to perform
	 * rendering.  The problem was that the kernel might wake the client
	 * up before it dispatched the vblank swap (since the lock has to be
	 * held while touching the ringbuffer), in which case the client would
	 * clear and start the next frame before the swap occurred, and
	 * flicker would occur in addition to likely missing the vblank.
	 *
	 * In the absence of this ioctl, userland falls back to a correct path
	 * of waiting for a vblank, then dispatching the swap on its own.
	 * Context switching to userland and back is plenty fast enough for
	 * meeting the requirements of vblank swapping.
	 */
	return -EINVAL;
}

922 923
static int i915_flip_bufs(struct drm_device *dev, void *data,
			  struct drm_file *file_priv)
L
Linus Torvalds 已提交
924
{
925 926
	int ret;

927 928 929
	if (drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

930
	DRM_DEBUG_DRIVER("%s\n", __func__);
L
Linus Torvalds 已提交
931

932
	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
L
Linus Torvalds 已提交
933

934 935 936 937 938
	mutex_lock(&dev->struct_mutex);
	ret = i915_dispatch_flip(dev);
	mutex_unlock(&dev->struct_mutex);

	return ret;
L
Linus Torvalds 已提交
939 940
}

941 942
static int i915_getparam(struct drm_device *dev, void *data,
			 struct drm_file *file_priv)
L
Linus Torvalds 已提交
943 944
{
	drm_i915_private_t *dev_priv = dev->dev_private;
945
	drm_i915_getparam_t *param = data;
L
Linus Torvalds 已提交
946 947 948
	int value;

	if (!dev_priv) {
949
		DRM_ERROR("called with no initialization\n");
E
Eric Anholt 已提交
950
		return -EINVAL;
L
Linus Torvalds 已提交
951 952
	}

953
	switch (param->param) {
L
Linus Torvalds 已提交
954
	case I915_PARAM_IRQ_ACTIVE:
955
		value = dev->pdev->irq ? 1 : 0;
L
Linus Torvalds 已提交
956 957
		break;
	case I915_PARAM_ALLOW_BATCHBUFFER:
958
		value = dev_priv->dri1.allow_batchbuffer ? 1 : 0;
L
Linus Torvalds 已提交
959
		break;
D
Dave Airlie 已提交
960 961 962
	case I915_PARAM_LAST_DISPATCH:
		value = READ_BREADCRUMB(dev_priv);
		break;
K
Kristian Høgsberg 已提交
963 964 965
	case I915_PARAM_CHIPSET_ID:
		value = dev->pci_device;
		break;
966
	case I915_PARAM_HAS_GEM:
967
		value = 1;
968
		break;
969 970 971
	case I915_PARAM_NUM_FENCES_AVAIL:
		value = dev_priv->num_fence_regs - dev_priv->fence_reg_start;
		break;
972 973 974
	case I915_PARAM_HAS_OVERLAY:
		value = dev_priv->overlay ? 1 : 0;
		break;
975 976 977
	case I915_PARAM_HAS_PAGEFLIPPING:
		value = 1;
		break;
J
Jesse Barnes 已提交
978 979
	case I915_PARAM_HAS_EXECBUF2:
		/* depends on GEM */
980
		value = 1;
J
Jesse Barnes 已提交
981
		break;
982
	case I915_PARAM_HAS_BSD:
983
		value = intel_ring_initialized(&dev_priv->ring[VCS]);
984
		break;
985
	case I915_PARAM_HAS_BLT:
986
		value = intel_ring_initialized(&dev_priv->ring[BCS]);
987
		break;
988 989 990
	case I915_PARAM_HAS_RELAXED_FENCING:
		value = 1;
		break;
991 992 993
	case I915_PARAM_HAS_COHERENT_RINGS:
		value = 1;
		break;
994 995 996
	case I915_PARAM_HAS_EXEC_CONSTANTS:
		value = INTEL_INFO(dev)->gen >= 4;
		break;
997 998 999
	case I915_PARAM_HAS_RELAXED_DELTA:
		value = 1;
		break;
1000 1001 1002
	case I915_PARAM_HAS_GEN7_SOL_RESET:
		value = 1;
		break;
1003 1004 1005
	case I915_PARAM_HAS_LLC:
		value = HAS_LLC(dev);
		break;
1006 1007 1008
	case I915_PARAM_HAS_ALIASING_PPGTT:
		value = dev_priv->mm.aliasing_ppgtt ? 1 : 0;
		break;
1009 1010 1011
	case I915_PARAM_HAS_WAIT_TIMEOUT:
		value = 1;
		break;
L
Linus Torvalds 已提交
1012
	default:
1013
		DRM_DEBUG_DRIVER("Unknown parameter %d\n",
J
Jesse Barnes 已提交
1014
				 param->param);
E
Eric Anholt 已提交
1015
		return -EINVAL;
L
Linus Torvalds 已提交
1016 1017
	}

1018
	if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
L
Linus Torvalds 已提交
1019
		DRM_ERROR("DRM_COPY_TO_USER failed\n");
E
Eric Anholt 已提交
1020
		return -EFAULT;
L
Linus Torvalds 已提交
1021 1022 1023 1024 1025
	}

	return 0;
}

1026 1027
static int i915_setparam(struct drm_device *dev, void *data,
			 struct drm_file *file_priv)
L
Linus Torvalds 已提交
1028 1029
{
	drm_i915_private_t *dev_priv = dev->dev_private;
1030
	drm_i915_setparam_t *param = data;
L
Linus Torvalds 已提交
1031 1032

	if (!dev_priv) {
1033
		DRM_ERROR("called with no initialization\n");
E
Eric Anholt 已提交
1034
		return -EINVAL;
L
Linus Torvalds 已提交
1035 1036
	}

1037
	switch (param->param) {
L
Linus Torvalds 已提交
1038 1039 1040 1041 1042
	case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
		break;
	case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
		break;
	case I915_SETPARAM_ALLOW_BATCHBUFFER:
1043
		dev_priv->dri1.allow_batchbuffer = param->value ? 1 : 0;
L
Linus Torvalds 已提交
1044
		break;
1045 1046 1047 1048 1049 1050 1051
	case I915_SETPARAM_NUM_USED_FENCES:
		if (param->value > dev_priv->num_fence_regs ||
		    param->value < 0)
			return -EINVAL;
		/* Userspace can use first N regs */
		dev_priv->fence_reg_start = param->value;
		break;
L
Linus Torvalds 已提交
1052
	default:
1053
		DRM_DEBUG_DRIVER("unknown parameter %d\n",
1054
					param->param);
E
Eric Anholt 已提交
1055
		return -EINVAL;
L
Linus Torvalds 已提交
1056 1057 1058 1059 1060
	}

	return 0;
}

1061 1062
static int i915_set_status_page(struct drm_device *dev, void *data,
				struct drm_file *file_priv)
1063 1064
{
	drm_i915_private_t *dev_priv = dev->dev_private;
1065
	drm_i915_hws_addr_t *hws = data;
1066
	struct intel_ring_buffer *ring = LP_RING(dev_priv);
1067

1068 1069 1070
	if (drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

1071 1072
	if (!I915_NEED_GFX_HWS(dev))
		return -EINVAL;
1073 1074

	if (!dev_priv) {
1075
		DRM_ERROR("called with no initialization\n");
E
Eric Anholt 已提交
1076
		return -EINVAL;
1077 1078
	}

J
Jesse Barnes 已提交
1079 1080 1081 1082 1083
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
		WARN(1, "tried to set status page when mode setting active\n");
		return 0;
	}

1084
	DRM_DEBUG_DRIVER("set status page addr 0x%08x\n", (u32)hws->addr);
1085

1086
	ring->status_page.gfx_addr = hws->addr & (0x1ffff<<12);
1087

1088 1089 1090
	dev_priv->dri1.gfx_hws_cpu_addr = ioremap_wc(dev->agp->base + hws->addr,
						     4096);
	if (dev_priv->dri1.gfx_hws_cpu_addr == NULL) {
1091
		i915_dma_cleanup(dev);
1092
		ring->status_page.gfx_addr = 0;
1093 1094
		DRM_ERROR("can not ioremap virtual address for"
				" G33 hw status page\n");
E
Eric Anholt 已提交
1095
		return -ENOMEM;
1096
	}
1097 1098

	memset_io(dev_priv->dri1.gfx_hws_cpu_addr, 0, PAGE_SIZE);
1099
	I915_WRITE(HWS_PGA, ring->status_page.gfx_addr);
1100

1101
	DRM_DEBUG_DRIVER("load hws HWS_PGA with gfx mem 0x%x\n",
1102
			 ring->status_page.gfx_addr);
1103
	DRM_DEBUG_DRIVER("load hws at %p\n",
1104
			 ring->status_page.page_addr);
1105 1106 1107
	return 0;
}

1108 1109 1110 1111
static int i915_get_bridge_dev(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

1112
	dev_priv->bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
1113 1114 1115 1116 1117 1118 1119
	if (!dev_priv->bridge_dev) {
		DRM_ERROR("bridge device not found\n");
		return -1;
	}
	return 0;
}

1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131
#define MCHBAR_I915 0x44
#define MCHBAR_I965 0x48
#define MCHBAR_SIZE (4*4096)

#define DEVEN_REG 0x54
#define   DEVEN_MCHBAR_EN (1 << 28)

/* Allocate space for the MCH regs if needed, return nonzero on error */
static int
intel_alloc_mchbar_resource(struct drm_device *dev)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
1132
	int reg = INTEL_INFO(dev)->gen >= 4 ? MCHBAR_I965 : MCHBAR_I915;
1133 1134
	u32 temp_lo, temp_hi = 0;
	u64 mchbar_addr;
1135
	int ret;
1136

1137
	if (INTEL_INFO(dev)->gen >= 4)
1138 1139 1140 1141 1142 1143 1144
		pci_read_config_dword(dev_priv->bridge_dev, reg + 4, &temp_hi);
	pci_read_config_dword(dev_priv->bridge_dev, reg, &temp_lo);
	mchbar_addr = ((u64)temp_hi << 32) | temp_lo;

	/* If ACPI doesn't have it, assume we need to allocate it ourselves */
#ifdef CONFIG_PNP
	if (mchbar_addr &&
1145 1146
	    pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE))
		return 0;
1147 1148 1149
#endif

	/* Get some space for it */
1150 1151 1152 1153
	dev_priv->mch_res.name = "i915 MCHBAR";
	dev_priv->mch_res.flags = IORESOURCE_MEM;
	ret = pci_bus_alloc_resource(dev_priv->bridge_dev->bus,
				     &dev_priv->mch_res,
1154 1155
				     MCHBAR_SIZE, MCHBAR_SIZE,
				     PCIBIOS_MIN_MEM,
1156
				     0, pcibios_align_resource,
1157 1158 1159 1160
				     dev_priv->bridge_dev);
	if (ret) {
		DRM_DEBUG_DRIVER("failed bus alloc: %d\n", ret);
		dev_priv->mch_res.start = 0;
1161
		return ret;
1162 1163
	}

1164
	if (INTEL_INFO(dev)->gen >= 4)
1165 1166 1167 1168 1169
		pci_write_config_dword(dev_priv->bridge_dev, reg + 4,
				       upper_32_bits(dev_priv->mch_res.start));

	pci_write_config_dword(dev_priv->bridge_dev, reg,
			       lower_32_bits(dev_priv->mch_res.start));
1170
	return 0;
1171 1172 1173 1174 1175 1176 1177
}

/* Setup MCHBAR if possible, return true if we should disable it again */
static void
intel_setup_mchbar(struct drm_device *dev)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
1178
	int mchbar_reg = INTEL_INFO(dev)->gen >= 4 ? MCHBAR_I965 : MCHBAR_I915;
1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214
	u32 temp;
	bool enabled;

	dev_priv->mchbar_need_disable = false;

	if (IS_I915G(dev) || IS_I915GM(dev)) {
		pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);
		enabled = !!(temp & DEVEN_MCHBAR_EN);
	} else {
		pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
		enabled = temp & 1;
	}

	/* If it's already enabled, don't have to do anything */
	if (enabled)
		return;

	if (intel_alloc_mchbar_resource(dev))
		return;

	dev_priv->mchbar_need_disable = true;

	/* Space is allocated or reserved, so enable it. */
	if (IS_I915G(dev) || IS_I915GM(dev)) {
		pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG,
				       temp | DEVEN_MCHBAR_EN);
	} else {
		pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
		pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp | 1);
	}
}

static void
intel_teardown_mchbar(struct drm_device *dev)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
1215
	int mchbar_reg = INTEL_INFO(dev)->gen >= 4 ? MCHBAR_I965 : MCHBAR_I915;
1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233
	u32 temp;

	if (dev_priv->mchbar_need_disable) {
		if (IS_I915G(dev) || IS_I915GM(dev)) {
			pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);
			temp &= ~DEVEN_MCHBAR_EN;
			pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG, temp);
		} else {
			pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
			temp &= ~1;
			pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp);
		}
	}

	if (dev_priv->mch_res.start)
		release_resource(&dev_priv->mch_res);
}

1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246
/* true = enable decode, false = disable decoder */
static unsigned int i915_vga_set_decode(void *cookie, bool state)
{
	struct drm_device *dev = cookie;

	intel_modeset_vga_set_state(dev, state);
	if (state)
		return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
		       VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
	else
		return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
}

1247 1248 1249 1250 1251
static void i915_switcheroo_set_state(struct pci_dev *pdev, enum vga_switcheroo_state state)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	pm_message_t pmm = { .event = PM_EVENT_SUSPEND };
	if (state == VGA_SWITCHEROO_ON) {
1252
		pr_info("switched on\n");
1253
		dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
1254 1255 1256
		/* i915 resume handler doesn't set to D0 */
		pci_set_power_state(dev->pdev, PCI_D0);
		i915_resume(dev);
1257
		dev->switch_power_state = DRM_SWITCH_POWER_ON;
1258
	} else {
1259
		pr_err("switched off\n");
1260
		dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
1261
		i915_suspend(dev, pmm);
1262
		dev->switch_power_state = DRM_SWITCH_POWER_OFF;
1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276
	}
}

static bool i915_switcheroo_can_switch(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	bool can_switch;

	spin_lock(&dev->count_lock);
	can_switch = (dev->open_count == 0);
	spin_unlock(&dev->count_lock);
	return can_switch;
}

1277 1278 1279 1280 1281 1282
static const struct vga_switcheroo_client_ops i915_switcheroo_ops = {
	.set_gpu_state = i915_switcheroo_set_state,
	.reprobe = NULL,
	.can_switch = i915_switcheroo_can_switch,
};

1283 1284 1285 1286
static int i915_load_modeset_init(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	int ret;
J
Jesse Barnes 已提交
1287

1288
	ret = intel_parse_bios(dev);
J
Jesse Barnes 已提交
1289 1290 1291
	if (ret)
		DRM_INFO("failed to find VBIOS tables\n");

1292 1293 1294 1295 1296 1297 1298
	/* If we have > 1 VGA cards, then we need to arbitrate access
	 * to the common VGA resources.
	 *
	 * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
	 * then we do not take part in VGA arbitration and the
	 * vga_client_register() fails with -ENODEV.
	 */
1299
	ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode);
1300
	if (ret && ret != -ENODEV)
1301
		goto out;
1302

J
Jesse Barnes 已提交
1303 1304
	intel_register_dsm_handler();

1305
	ret = vga_switcheroo_register_client(dev->pdev, &i915_switcheroo_ops);
1306
	if (ret)
1307
		goto cleanup_vga_client;
1308

1309 1310 1311 1312 1313 1314 1315
	/* Initialise stolen first so that we may reserve preallocated
	 * objects for the BIOS to KMS transition.
	 */
	ret = i915_gem_init_stolen(dev);
	if (ret)
		goto cleanup_vga_switcheroo;

1316 1317
	intel_modeset_init(dev);

1318
	ret = i915_gem_init(dev);
J
Jesse Barnes 已提交
1319
	if (ret)
1320
		goto cleanup_gem_stolen;
J
Jesse Barnes 已提交
1321

1322 1323 1324 1325 1326 1327
	intel_modeset_gem_init(dev);

	ret = drm_irq_install(dev);
	if (ret)
		goto cleanup_gem;

J
Jesse Barnes 已提交
1328 1329 1330 1331
	/* Always safe in the mode setting case. */
	/* FIXME: do pre/post-mode set stuff in core KMS code */
	dev->vblank_disable_allowed = 1;

1332 1333 1334 1335
	ret = intel_fbdev_init(dev);
	if (ret)
		goto cleanup_irq;

1336
	drm_kms_helper_poll_init(dev);
1337 1338 1339 1340

	/* We're off and running w/KMS */
	dev_priv->mm.suspended = 0;

J
Jesse Barnes 已提交
1341 1342
	return 0;

1343 1344
cleanup_irq:
	drm_irq_uninstall(dev);
1345 1346 1347 1348
cleanup_gem:
	mutex_lock(&dev->struct_mutex);
	i915_gem_cleanup_ringbuffer(dev);
	mutex_unlock(&dev->struct_mutex);
1349
	i915_gem_cleanup_aliasing_ppgtt(dev);
1350 1351
cleanup_gem_stolen:
	i915_gem_cleanup_stolen(dev);
1352 1353 1354 1355
cleanup_vga_switcheroo:
	vga_switcheroo_unregister_client(dev->pdev);
cleanup_vga_client:
	vga_client_register(dev->pdev, NULL, NULL, NULL);
J
Jesse Barnes 已提交
1356 1357 1358 1359
out:
	return ret;
}

1360 1361 1362 1363
int i915_master_create(struct drm_device *dev, struct drm_master *master)
{
	struct drm_i915_master_private *master_priv;

1364
	master_priv = kzalloc(sizeof(*master_priv), GFP_KERNEL);
1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378
	if (!master_priv)
		return -ENOMEM;

	master->driver_priv = master_priv;
	return 0;
}

void i915_master_destroy(struct drm_device *dev, struct drm_master *master)
{
	struct drm_i915_master_private *master_priv = master->driver_priv;

	if (!master_priv)
		return;

1379
	kfree(master_priv);
1380 1381 1382 1383

	master->driver_priv = NULL;
}

1384 1385 1386 1387
static void
i915_mtrr_setup(struct drm_i915_private *dev_priv, unsigned long base,
		unsigned long size)
{
1388 1389
	dev_priv->mm.gtt_mtrr = -1;

1390 1391 1392 1393 1394
#if defined(CONFIG_X86_PAT)
	if (cpu_has_pat)
		return;
#endif

1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406
	/* Set up a WC MTRR for non-PAT systems.  This is more common than
	 * one would think, because the kernel disables PAT on first
	 * generation Core chips because WC PAT gets overridden by a UC
	 * MTRR if present.  Even if a UC MTRR isn't present.
	 */
	dev_priv->mm.gtt_mtrr = mtrr_add(base, size, MTRR_TYPE_WRCOMB, 1);
	if (dev_priv->mm.gtt_mtrr < 0) {
		DRM_INFO("MTRR allocation failed.  Graphics "
			 "performance may suffer.\n");
	}
}

J
Jesse Barnes 已提交
1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417
/**
 * i915_driver_load - setup chip and create an initial config
 * @dev: DRM device
 * @flags: startup flags
 *
 * The driver load routine has to do several things:
 *   - drive output discovery via intel_modeset_init()
 *   - initialize the memory manager
 *   - allocate initial config memory
 *   - setup the DRM framebuffer with the allocated memory
 */
1418
int i915_driver_load(struct drm_device *dev, unsigned long flags)
1419
{
1420
	struct drm_i915_private *dev_priv;
1421
	struct intel_device_info *info;
1422
	int ret = 0, mmio_bar;
1423
	uint32_t aperture_size;
1424

1425 1426 1427 1428 1429 1430
	info = (struct intel_device_info *) flags;

	/* Refuse to load on gen6+ without kms enabled. */
	if (info->gen >= 6 && !drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

1431

1432 1433 1434 1435 1436 1437 1438
	/* i915 has 4 more counters */
	dev->counters += 4;
	dev->types[6] = _DRM_STAT_IRQ;
	dev->types[7] = _DRM_STAT_PRIMARY;
	dev->types[8] = _DRM_STAT_SECONDARY;
	dev->types[9] = _DRM_STAT_DMA;

1439
	dev_priv = kzalloc(sizeof(drm_i915_private_t), GFP_KERNEL);
J
Jesse Barnes 已提交
1440 1441 1442 1443
	if (dev_priv == NULL)
		return -ENOMEM;

	dev->dev_private = (void *)dev_priv;
1444
	dev_priv->dev = dev;
1445
	dev_priv->info = info;
J
Jesse Barnes 已提交
1446

1447 1448 1449 1450 1451
	if (i915_get_bridge_dev(dev)) {
		ret = -EIO;
		goto free_priv;
	}

1452 1453
	pci_set_master(dev->pdev);

1454 1455 1456 1457
	/* overlay on gen2 is broken and can't address above 1G */
	if (IS_GEN2(dev))
		dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(30));

1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468
	/* 965GM sometimes incorrectly writes to hardware status page (HWS)
	 * using 32bit addressing, overwriting memory if HWS is located
	 * above 4GB.
	 *
	 * The documentation also mentions an issue with undefined
	 * behaviour if any general state is accessed within a page above 4GB,
	 * which also needs to be handled carefully.
	 */
	if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))
		dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(32));

1469 1470 1471 1472 1473 1474 1475 1476
	mmio_bar = IS_GEN2(dev) ? 1 : 0;
	dev_priv->regs = pci_iomap(dev->pdev, mmio_bar, 0);
	if (!dev_priv->regs) {
		DRM_ERROR("failed to map registers\n");
		ret = -EIO;
		goto put_bridge;
	}

1477 1478 1479 1480
	dev_priv->mm.gtt = intel_gtt_get();
	if (!dev_priv->mm.gtt) {
		DRM_ERROR("Failed to initialize GTT\n");
		ret = -ENODEV;
1481
		goto out_rmmap;
1482 1483
	}

1484
	aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
1485

1486
	dev_priv->mm.gtt_mapping =
1487
		io_mapping_create_wc(dev->agp->base, aperture_size);
1488 1489 1490 1491 1492
	if (dev_priv->mm.gtt_mapping == NULL) {
		ret = -EIO;
		goto out_rmmap;
	}

1493
	i915_mtrr_setup(dev_priv, dev->agp->base, aperture_size);
1494

1495 1496 1497 1498 1499 1500 1501
	/* The i915 workqueue is primarily used for batched retirement of
	 * requests (and thus managing bo) once the task has been completed
	 * by the GPU. i915_gem_retire_requests() is called directly when we
	 * need high-priority retirement, such as waiting for an explicit
	 * bo.
	 *
	 * It is also used for periodic low-priority events, such as
1502
	 * idle-timers and recording error state.
1503 1504 1505 1506 1507 1508 1509 1510
	 *
	 * All tasks on the workqueue are expected to acquire the dev mutex
	 * so there is no point in running more than one instance of the
	 * workqueue at any time: max_active = 1 and NON_REENTRANT.
	 */
	dev_priv->wq = alloc_workqueue("i915",
				       WQ_UNBOUND | WQ_NON_REENTRANT,
				       1);
1511 1512 1513
	if (dev_priv->wq == NULL) {
		DRM_ERROR("Failed to create our workqueue.\n");
		ret = -ENOMEM;
1514
		goto out_mtrrfree;
1515 1516
	}

1517
	intel_irq_init(dev);
1518

1519 1520
	/* Try to make sure MCHBAR is enabled before poking at it */
	intel_setup_mchbar(dev);
1521
	intel_setup_gmbus(dev);
1522
	intel_opregion_setup(dev);
1523

1524 1525 1526
	/* Make sure the bios did its job and set up vital registers */
	intel_setup_bios(dev);

1527 1528
	i915_gem_load(dev);

1529 1530 1531
	/* Init HWS */
	if (!I915_NEED_GFX_HWS(dev)) {
		ret = i915_init_phys_hws(dev);
1532 1533
		if (ret)
			goto out_gem_unload;
1534
	}
1535 1536 1537 1538 1539 1540 1541

	/* On the 945G/GM, the chipset reports the MSI capability on the
	 * integrated graphics even though the support isn't actually there
	 * according to the published specs.  It doesn't appear to function
	 * correctly in testing on 945G.
	 * This may be a side effect of MSI having been made available for PEG
	 * and the registers being closely associated.
1542 1543
	 *
	 * According to chipset errata, on the 965GM, MSI interrupts may
1544 1545
	 * be lost or delayed, but we use them anyways to avoid
	 * stuck interrupts on some machines.
1546
	 */
1547
	if (!IS_I945G(dev) && !IS_I945GM(dev))
1548
		pci_enable_msi(dev->pdev);
1549

1550
	spin_lock_init(&dev_priv->gt_lock);
1551
	spin_lock_init(&dev_priv->irq_lock);
1552
	spin_lock_init(&dev_priv->error_lock);
1553
	spin_lock_init(&dev_priv->rps_lock);
1554

1555
	if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
J
Jesse Barnes 已提交
1556 1557
		dev_priv->num_pipe = 3;
	else if (IS_MOBILE(dev) || !IS_GEN2(dev))
1558 1559 1560 1561 1562
		dev_priv->num_pipe = 2;
	else
		dev_priv->num_pipe = 1;

	ret = drm_vblank_init(dev, dev_priv->num_pipe);
1563 1564
	if (ret)
		goto out_gem_unload;
1565

1566 1567 1568
	/* Start out suspended */
	dev_priv->mm.suspended = 1;

1569 1570
	intel_detect_pch(dev);

J
Jesse Barnes 已提交
1571
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
D
Daniel Vetter 已提交
1572
		ret = i915_load_modeset_init(dev);
J
Jesse Barnes 已提交
1573 1574
		if (ret < 0) {
			DRM_ERROR("failed to init modeset\n");
1575
			goto out_gem_unload;
J
Jesse Barnes 已提交
1576 1577 1578
		}
	}

B
Ben Widawsky 已提交
1579 1580
	i915_setup_sysfs(dev);

1581
	/* Must be done after probing outputs */
1582 1583
	intel_opregion_init(dev);
	acpi_video_register();
1584

B
Ben Gamari 已提交
1585 1586
	setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed,
		    (unsigned long) dev);
1587

1588 1589
	if (IS_GEN5(dev))
		intel_gpu_ips_init(dev_priv);
1590

J
Jesse Barnes 已提交
1591 1592
	return 0;

1593
out_gem_unload:
1594 1595 1596
	if (dev_priv->mm.inactive_shrinker.shrink)
		unregister_shrinker(&dev_priv->mm.inactive_shrinker);

1597 1598 1599 1600 1601
	if (dev->pdev->msi_enabled)
		pci_disable_msi(dev->pdev);

	intel_teardown_gmbus(dev);
	intel_teardown_mchbar(dev);
1602
	destroy_workqueue(dev_priv->wq);
1603 1604 1605 1606 1607 1608
out_mtrrfree:
	if (dev_priv->mm.gtt_mtrr >= 0) {
		mtrr_del(dev_priv->mm.gtt_mtrr, dev->agp->base,
			 dev->agp->agp_info.aper_size * 1024 * 1024);
		dev_priv->mm.gtt_mtrr = -1;
	}
1609
	io_mapping_free(dev_priv->mm.gtt_mapping);
J
Jesse Barnes 已提交
1610
out_rmmap:
1611
	pci_iounmap(dev->pdev, dev_priv->regs);
1612 1613
put_bridge:
	pci_dev_put(dev_priv->bridge_dev);
J
Jesse Barnes 已提交
1614
free_priv:
1615
	kfree(dev_priv);
J
Jesse Barnes 已提交
1616 1617 1618 1619 1620 1621
	return ret;
}

int i915_driver_unload(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
1622
	int ret;
J
Jesse Barnes 已提交
1623

1624
	intel_gpu_ips_teardown();
1625

B
Ben Widawsky 已提交
1626 1627
	i915_teardown_sysfs(dev);

1628 1629 1630
	if (dev_priv->mm.inactive_shrinker.shrink)
		unregister_shrinker(&dev_priv->mm.inactive_shrinker);

1631
	mutex_lock(&dev->struct_mutex);
1632
	ret = i915_gpu_idle(dev);
1633 1634
	if (ret)
		DRM_ERROR("failed to idle hardware: %d\n", ret);
1635
	i915_gem_retire_requests(dev);
1636 1637
	mutex_unlock(&dev->struct_mutex);

1638 1639 1640
	/* Cancel the retire work handler, which should be idle now. */
	cancel_delayed_work_sync(&dev_priv->mm.retire_work);

1641 1642 1643 1644 1645 1646 1647
	io_mapping_free(dev_priv->mm.gtt_mapping);
	if (dev_priv->mm.gtt_mtrr >= 0) {
		mtrr_del(dev_priv->mm.gtt_mtrr, dev->agp->base,
			 dev->agp->agp_info.aper_size * 1024 * 1024);
		dev_priv->mm.gtt_mtrr = -1;
	}

1648 1649
	acpi_video_unregister();

J
Jesse Barnes 已提交
1650
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1651
		intel_fbdev_fini(dev);
1652 1653
		intel_modeset_cleanup(dev);

Z
Zhao Yakui 已提交
1654 1655 1656 1657 1658 1659 1660 1661 1662
		/*
		 * free the memory space allocated for the child device
		 * config parsed from VBT
		 */
		if (dev_priv->child_dev && dev_priv->child_dev_num) {
			kfree(dev_priv->child_dev);
			dev_priv->child_dev = NULL;
			dev_priv->child_dev_num = 0;
		}
1663

1664
		vga_switcheroo_unregister_client(dev->pdev);
1665
		vga_client_register(dev->pdev, NULL, NULL, NULL);
J
Jesse Barnes 已提交
1666 1667
	}

1668
	/* Free error state after interrupts are fully disabled. */
1669 1670
	del_timer_sync(&dev_priv->hangcheck_timer);
	cancel_work_sync(&dev_priv->error_work);
1671
	i915_destroy_error_state(dev);
1672

1673 1674 1675
	if (dev->pdev->msi_enabled)
		pci_disable_msi(dev->pdev);

1676
	intel_opregion_fini(dev);
1677

J
Jesse Barnes 已提交
1678
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1679 1680 1681
		/* Flush any outstanding unpin_work. */
		flush_workqueue(dev_priv->wq);

J
Jesse Barnes 已提交
1682
		mutex_lock(&dev->struct_mutex);
1683
		i915_gem_free_all_phys_object(dev);
J
Jesse Barnes 已提交
1684 1685
		i915_gem_cleanup_ringbuffer(dev);
		mutex_unlock(&dev->struct_mutex);
1686
		i915_gem_cleanup_aliasing_ppgtt(dev);
1687
		i915_gem_cleanup_stolen(dev);
1688
		drm_mm_takedown(&dev_priv->mm.stolen);
1689 1690

		intel_cleanup_overlay(dev);
1691 1692 1693

		if (!I915_NEED_GFX_HWS(dev))
			i915_free_hws(dev);
J
Jesse Barnes 已提交
1694 1695
	}

D
Daniel Vetter 已提交
1696
	if (dev_priv->regs != NULL)
1697
		pci_iounmap(dev->pdev, dev_priv->regs);
D
Daniel Vetter 已提交
1698

1699
	intel_teardown_gmbus(dev);
1700 1701
	intel_teardown_mchbar(dev);

1702 1703
	destroy_workqueue(dev_priv->wq);

1704
	pci_dev_put(dev_priv->bridge_dev);
1705
	kfree(dev->dev_private);
J
Jesse Barnes 已提交
1706

1707 1708 1709
	return 0;
}

1710
int i915_driver_open(struct drm_device *dev, struct drm_file *file)
1711
{
1712
	struct drm_i915_file_private *file_priv;
1713

1714
	DRM_DEBUG_DRIVER("\n");
1715 1716
	file_priv = kmalloc(sizeof(*file_priv), GFP_KERNEL);
	if (!file_priv)
1717 1718
		return -ENOMEM;

1719
	file->driver_priv = file_priv;
1720

1721
	spin_lock_init(&file_priv->mm.lock);
1722
	INIT_LIST_HEAD(&file_priv->mm.request_list);
1723 1724 1725 1726

	return 0;
}

J
Jesse Barnes 已提交
1727 1728 1729 1730 1731 1732 1733 1734
/**
 * i915_driver_lastclose - clean up after all DRM clients have exited
 * @dev: DRM device
 *
 * Take care of cleaning up after all DRM clients have exited.  In the
 * mode setting case, we want to restore the kernel's initial mode (just
 * in case the last client left us in a bad state).
 *
1735
 * Additionally, in the non-mode setting case, we'll tear down the GTT
J
Jesse Barnes 已提交
1736 1737 1738
 * and DMA structures, since the kernel won't be using them, and clea
 * up any GEM state.
 */
1739
void i915_driver_lastclose(struct drm_device * dev)
L
Linus Torvalds 已提交
1740
{
J
Jesse Barnes 已提交
1741 1742
	drm_i915_private_t *dev_priv = dev->dev_private;

J
Jesse Barnes 已提交
1743
	if (!dev_priv || drm_core_check_feature(dev, DRIVER_MODESET)) {
1744
		intel_fb_restore_mode(dev);
1745
		vga_switcheroo_process_delayed_switch();
D
Dave Airlie 已提交
1746
		return;
J
Jesse Barnes 已提交
1747
	}
D
Dave Airlie 已提交
1748

1749 1750
	i915_gem_lastclose(dev);

D
Dave Airlie 已提交
1751
	i915_dma_cleanup(dev);
L
Linus Torvalds 已提交
1752 1753
}

1754
void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
L
Linus Torvalds 已提交
1755
{
1756
	i915_gem_release(dev, file_priv);
L
Linus Torvalds 已提交
1757 1758
}

1759
void i915_driver_postclose(struct drm_device *dev, struct drm_file *file)
1760
{
1761
	struct drm_i915_file_private *file_priv = file->driver_priv;
1762

1763
	kfree(file_priv);
1764 1765
}

1766
struct drm_ioctl_desc i915_ioctls[] = {
1767 1768 1769 1770 1771 1772 1773 1774
	DRM_IOCTL_DEF_DRV(I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF_DRV(I915_FLUSH, i915_flush_ioctl, DRM_AUTH),
	DRM_IOCTL_DEF_DRV(I915_FLIP, i915_flip_bufs, DRM_AUTH),
	DRM_IOCTL_DEF_DRV(I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH),
	DRM_IOCTL_DEF_DRV(I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH),
	DRM_IOCTL_DEF_DRV(I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH),
	DRM_IOCTL_DEF_DRV(I915_GETPARAM, i915_getparam, DRM_AUTH),
	DRM_IOCTL_DEF_DRV(I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
D
Daniel Vetter 已提交
1775 1776 1777
	DRM_IOCTL_DEF_DRV(I915_ALLOC, drm_noop, DRM_AUTH),
	DRM_IOCTL_DEF_DRV(I915_FREE, drm_noop, DRM_AUTH),
	DRM_IOCTL_DEF_DRV(I915_INIT_HEAP, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1778
	DRM_IOCTL_DEF_DRV(I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH),
D
Daniel Vetter 已提交
1779
	DRM_IOCTL_DEF_DRV(I915_DESTROY_HEAP,  drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1780
	DRM_IOCTL_DEF_DRV(I915_SET_VBLANK_PIPE,  drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806
	DRM_IOCTL_DEF_DRV(I915_GET_VBLANK_PIPE,  i915_vblank_pipe_get, DRM_AUTH),
	DRM_IOCTL_DEF_DRV(I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),
	DRM_IOCTL_DEF_DRV(I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF_DRV(I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH|DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH|DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_CREATE, i915_gem_create_ioctl, DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_SET_TILING, i915_gem_set_tiling, DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_GET_TILING, i915_gem_get_tiling, DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GEM_MADVISE, i915_gem_madvise_ioctl, DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
1807 1808
	DRM_IOCTL_DEF_DRV(I915_SET_SPRITE_COLORKEY, intel_sprite_set_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
	DRM_IOCTL_DEF_DRV(I915_GET_SPRITE_COLORKEY, intel_sprite_get_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
1809
	DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_AUTH|DRM_UNLOCKED),
D
Dave Airlie 已提交
1810 1811 1812
};

int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
1813

1814 1815 1816 1817
/*
 * This is really ugly: Because old userspace abused the linux agp interface to
 * manage the gtt, we need to claim that all intel devices are agp.  For
 * otherwise the drm core refuses to initialize the agp support code.
1818
 */
1819
int i915_driver_device_is_agp(struct drm_device * dev)
1820 1821 1822
{
	return 1;
}