anatop-regulator.c 7.3 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
/*
 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
 */

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.

 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.

 * You should have received a copy of the GNU General Public License along
 * with this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 */

#include <linux/slab.h>
#include <linux/device.h>
#include <linux/module.h>
24
#include <linux/mfd/syscon.h>
25 26 27 28 29
#include <linux/err.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_address.h>
30
#include <linux/regmap.h>
31 32 33
#include <linux/regulator/driver.h>
#include <linux/regulator/of_regulator.h>

34 35 36
#define LDO_RAMP_UP_UNIT_IN_CYCLES      64 /* 64 cycles per step */
#define LDO_RAMP_UP_FREQ_IN_MHZ         24 /* cycle based on 24M OSC */

37 38 39
struct anatop_regulator {
	const char *name;
	u32 control_reg;
40
	struct regmap *anatop;
41 42
	int vol_bit_shift;
	int vol_bit_width;
43 44 45
	u32 delay_reg;
	int delay_bit_shift;
	int delay_bit_width;
46 47 48 49 50 51 52
	int min_bit_val;
	int min_voltage;
	int max_voltage;
	struct regulator_desc rdesc;
	struct regulator_init_data *initdata;
};

53 54
static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg,
					unsigned selector)
55 56 57 58 59 60
{
	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);

	if (!anatop_reg->control_reg)
		return -ENOTSUPP;

61
	return regulator_set_voltage_sel_regmap(reg, selector);
62 63
}

64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82
static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg,
	unsigned int old_sel,
	unsigned int new_sel)
{
	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
	u32 val;
	int ret = 0;

	/* check whether need to care about LDO ramp up speed */
	if (anatop_reg->delay_bit_width && new_sel > old_sel) {
		/*
		 * the delay for LDO ramp up time is
		 * based on the register setting, we need
		 * to calculate how many steps LDO need to
		 * ramp up, and how much delay needed. (us)
		 */
		regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val);
		val = (val >> anatop_reg->delay_bit_shift) &
			((1 << anatop_reg->delay_bit_width) - 1);
83 84
		ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES <<
			val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1;
85 86 87 88 89
	}

	return ret;
}

90
static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg)
91 92 93 94 95 96
{
	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);

	if (!anatop_reg->control_reg)
		return -ENOTSUPP;

97
	return regulator_get_voltage_sel_regmap(reg);
98 99 100
}

static struct regulator_ops anatop_rops = {
101
	.set_voltage_sel = anatop_regmap_set_voltage_sel,
102
	.set_voltage_time_sel = anatop_regmap_set_voltage_time_sel,
103
	.get_voltage_sel = anatop_regmap_get_voltage_sel,
104 105
	.list_voltage = regulator_list_voltage_linear,
	.map_voltage = regulator_map_voltage_linear,
106 107
};

108
static int anatop_regulator_probe(struct platform_device *pdev)
109 110 111
{
	struct device *dev = &pdev->dev;
	struct device_node *np = dev->of_node;
112
	struct device_node *anatop_np;
113 114 115 116
	struct regulator_desc *rdesc;
	struct regulator_dev *rdev;
	struct anatop_regulator *sreg;
	struct regulator_init_data *initdata;
117
	struct regulator_config config = { };
118 119 120 121 122 123 124 125 126 127 128 129 130 131 132
	int ret = 0;

	initdata = of_get_regulator_init_data(dev, np);
	sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
	if (!sreg)
		return -ENOMEM;
	sreg->initdata = initdata;
	sreg->name = kstrdup(of_get_property(np, "regulator-name", NULL),
			     GFP_KERNEL);
	rdesc = &sreg->rdesc;
	memset(rdesc, 0, sizeof(*rdesc));
	rdesc->name = sreg->name;
	rdesc->ops = &anatop_rops;
	rdesc->type = REGULATOR_VOLTAGE;
	rdesc->owner = THIS_MODULE;
133 134 135 136 137 138 139 140 141

	anatop_np = of_get_parent(np);
	if (!anatop_np)
		return -ENODEV;
	sreg->anatop = syscon_node_to_regmap(anatop_np);
	of_node_put(anatop_np);
	if (IS_ERR(sreg->anatop))
		return PTR_ERR(sreg->anatop);

142 143
	ret = of_property_read_u32(np, "anatop-reg-offset",
				   &sreg->control_reg);
144
	if (ret) {
145
		dev_err(dev, "no anatop-reg-offset property set\n");
146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-vol-bit-width",
				   &sreg->vol_bit_width);
	if (ret) {
		dev_err(dev, "no anatop-vol-bit-width property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-vol-bit-shift",
				   &sreg->vol_bit_shift);
	if (ret) {
		dev_err(dev, "no anatop-vol-bit-shift property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-min-bit-val",
				   &sreg->min_bit_val);
	if (ret) {
		dev_err(dev, "no anatop-min-bit-val property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-min-voltage",
				   &sreg->min_voltage);
	if (ret) {
		dev_err(dev, "no anatop-min-voltage property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-max-voltage",
				   &sreg->max_voltage);
	if (ret) {
		dev_err(dev, "no anatop-max-voltage property set\n");
		goto anatop_probe_end;
	}

179 180 181 182 183 184 185 186
	/* read LDO ramp up setting, only for core reg */
	of_property_read_u32(np, "anatop-delay-reg-offset",
			     &sreg->delay_reg);
	of_property_read_u32(np, "anatop-delay-bit-width",
			     &sreg->delay_bit_width);
	of_property_read_u32(np, "anatop-delay-bit-shift",
			     &sreg->delay_bit_shift);

187 188
	rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1
			    + sreg->min_bit_val;
189 190
	rdesc->min_uV = sreg->min_voltage;
	rdesc->uV_step = 25000;
191
	rdesc->linear_min_sel = sreg->min_bit_val;
192 193 194
	rdesc->vsel_reg = sreg->control_reg;
	rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) <<
			   sreg->vol_bit_shift;
195

196 197 198 199
	config.dev = &pdev->dev;
	config.init_data = initdata;
	config.driver_data = sreg;
	config.of_node = pdev->dev.of_node;
200
	config.regmap = sreg->anatop;
201

202
	/* register regulator */
203
	rdev = devm_regulator_register(dev, rdesc, &config);
204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219
	if (IS_ERR(rdev)) {
		dev_err(dev, "failed to register %s\n",
			rdesc->name);
		ret = PTR_ERR(rdev);
		goto anatop_probe_end;
	}

	platform_set_drvdata(pdev, rdev);

anatop_probe_end:
	if (ret)
		kfree(sreg->name);

	return ret;
}

220
static int anatop_regulator_remove(struct platform_device *pdev)
221 222 223 224 225 226 227 228 229 230
{
	struct regulator_dev *rdev = platform_get_drvdata(pdev);
	struct anatop_regulator *sreg = rdev_get_drvdata(rdev);
	const char *name = sreg->name;

	kfree(name);

	return 0;
}

231
static struct of_device_id of_anatop_regulator_match_tbl[] = {
232 233 234 235
	{ .compatible = "fsl,anatop-regulator", },
	{ /* end */ }
};

236
static struct platform_driver anatop_regulator_driver = {
237 238 239 240 241 242
	.driver = {
		.name	= "anatop_regulator",
		.owner  = THIS_MODULE,
		.of_match_table = of_anatop_regulator_match_tbl,
	},
	.probe	= anatop_regulator_probe,
243
	.remove	= anatop_regulator_remove,
244 245 246 247
};

static int __init anatop_regulator_init(void)
{
248
	return platform_driver_register(&anatop_regulator_driver);
249 250 251 252 253
}
postcore_initcall(anatop_regulator_init);

static void __exit anatop_regulator_exit(void)
{
254
	platform_driver_unregister(&anatop_regulator_driver);
255 256 257
}
module_exit(anatop_regulator_exit);

258 259
MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>");
MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
260 261
MODULE_DESCRIPTION("ANATOP Regulator driver");
MODULE_LICENSE("GPL v2");
262
MODULE_ALIAS("platform:anatop_regulator");