sc520_freq.c 4.2 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
/*
 *	sc520_freq.c: cpufreq driver for the AMD Elan sc520
 *
 *	Copyright (C) 2005 Sean Young <sean@mess.org>
 *
 *	This program is free software; you can redistribute it and/or
 *	modify it under the terms of the GNU General Public License
 *	as published by the Free Software Foundation; either version
 *	2 of the License, or (at your option) any later version.
 *
 *	Based on elanfreq.c
 *
 *	2005-03-30: - initial revision
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>

#include <linux/delay.h>
#include <linux/cpufreq.h>
22 23
#include <linux/timex.h>
#include <linux/io.h>
24

25
#include <asm/cpu_device_id.h>
26 27 28 29 30 31 32
#include <asm/msr.h>

#define MMCR_BASE	0xfffef000	/* The default base address */
#define OFFS_CPUCTL	0x2   /* CPU Control Register */

static __u8 __iomem *cpuctl;

33
#define PFX "sc520_freq: "
34 35 36 37 38 39 40 41 42 43 44 45 46

static struct cpufreq_frequency_table sc520_freq_table[] = {
	{0x01,	100000},
	{0x02,	133000},
	{0,	CPUFREQ_TABLE_END},
};

static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
{
	u8 clockspeed_reg = *cpuctl;

	switch (clockspeed_reg & 0x03) {
	default:
47 48
		printk(KERN_ERR PFX "error: cpuctl register has unexpected "
				"value %02x\n", clockspeed_reg);
49 50 51 52 53 54 55
	case 0x01:
		return 100000;
	case 0x02:
		return 133000;
	}
}

56 57
static void sc520_freq_set_cpu_state(struct cpufreq_policy *policy,
		unsigned int state)
58 59 60 61 62 63 64 65
{

	struct cpufreq_freqs	freqs;
	u8 clockspeed_reg;

	freqs.old = sc520_freq_get_cpu_frequency(0);
	freqs.new = sc520_freq_table[state].frequency;

66
	cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
67

68
	pr_debug("attempting to set frequency to %i kHz\n",
69 70 71 72 73 74 75 76 77
			sc520_freq_table[state].frequency);

	local_irq_disable();

	clockspeed_reg = *cpuctl & ~0x03;
	*cpuctl = clockspeed_reg | sc520_freq_table[state].index;

	local_irq_enable();

78
	cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
79 80
};

81
static int sc520_freq_verify(struct cpufreq_policy *policy)
82 83 84 85
{
	return cpufreq_frequency_table_verify(policy, &sc520_freq_table[0]);
}

86
static int sc520_freq_target(struct cpufreq_policy *policy,
87 88 89 90 91
			    unsigned int target_freq,
			    unsigned int relation)
{
	unsigned int newstate = 0;

92 93
	if (cpufreq_frequency_table_target(policy, sc520_freq_table,
				target_freq, relation, &newstate))
94 95
		return -EINVAL;

96
	sc520_freq_set_cpu_state(policy, newstate);
97 98 99 100 101 102 103 104 105 106 107

	return 0;
}


/*
 *	Module init and exit code
 */

static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
{
108
	struct cpuinfo_x86 *c = &cpu_data(0);
109 110 111 112 113 114 115 116 117 118 119 120 121
	int result;

	/* capability check */
	if (c->x86_vendor != X86_VENDOR_AMD ||
	    c->x86 != 4 || c->x86_model != 9)
		return -ENODEV;

	/* cpuinfo and default policy values */
	policy->cpuinfo.transition_latency = 1000000; /* 1ms */
	policy->cur = sc520_freq_get_cpu_frequency(0);

	result = cpufreq_frequency_table_cpuinfo(policy, sc520_freq_table);
	if (result)
122
		return result;
123 124 125 126 127 128 129 130 131 132 133 134 135 136

	cpufreq_frequency_table_get_attr(sc520_freq_table, policy->cpu);

	return 0;
}


static int sc520_freq_cpu_exit(struct cpufreq_policy *policy)
{
	cpufreq_frequency_table_put_attr(policy->cpu);
	return 0;
}


137
static struct freq_attr *sc520_freq_attr[] = {
138 139 140 141 142
	&cpufreq_freq_attr_scaling_available_freqs,
	NULL,
};


143
static struct cpufreq_driver sc520_freq_driver = {
144 145 146 147 148 149 150 151 152 153
	.get	= sc520_freq_get_cpu_frequency,
	.verify	= sc520_freq_verify,
	.target	= sc520_freq_target,
	.init	= sc520_freq_cpu_init,
	.exit	= sc520_freq_cpu_exit,
	.name	= "sc520_freq",
	.owner	= THIS_MODULE,
	.attr	= sc520_freq_attr,
};

154 155 156 157 158
static const struct x86_cpu_id sc520_ids[] = {
	{ X86_VENDOR_AMD, 4, 9 },
	{}
};
MODULE_DEVICE_TABLE(x86cpu, sc520_ids);
159 160 161

static int __init sc520_freq_init(void)
{
162
	int err;
163

164
	if (!x86_match_cpu(sc520_ids))
165
		return -ENODEV;
166

167
	cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
168
	if (!cpuctl) {
169 170 171 172
		printk(KERN_ERR "sc520_freq: error: failed to remap memory\n");
		return -ENOMEM;
	}

173 174 175 176 177
	err = cpufreq_register_driver(&sc520_freq_driver);
	if (err)
		iounmap(cpuctl);

	return err;
178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194
}


static void __exit sc520_freq_exit(void)
{
	cpufreq_unregister_driver(&sc520_freq_driver);
	iounmap(cpuctl);
}


MODULE_LICENSE("GPL");
MODULE_AUTHOR("Sean Young <sean@mess.org>");
MODULE_DESCRIPTION("cpufreq driver for AMD's Elan sc520 CPU");

module_init(sc520_freq_init);
module_exit(sc520_freq_exit);