mt9v032.c 28.6 KB
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/*
 * Driver for MT9V032 CMOS Image Sensor from Micron
 *
 * Copyright (C) 2010, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
 *
 * Based on the MT9M001 driver,
 *
 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

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#include <linux/clk.h>
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#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/log2.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/videodev2.h>
#include <linux/v4l2-mediabus.h>
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#include <linux/module.h>
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#include <media/mt9v032.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-subdev.h>

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/* The first four rows are black rows. The active area spans 753x481 pixels. */
#define MT9V032_PIXEL_ARRAY_HEIGHT			485
#define MT9V032_PIXEL_ARRAY_WIDTH			753
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#define MT9V032_SYSCLK_FREQ_DEF				26600000

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#define MT9V032_CHIP_VERSION				0x00
#define		MT9V032_CHIP_ID_REV1			0x1311
#define		MT9V032_CHIP_ID_REV3			0x1313
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#define		MT9V034_CHIP_ID_REV1			0X1324
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#define MT9V032_COLUMN_START				0x01
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#define		MT9V032_COLUMN_START_MIN		1
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#define		MT9V032_COLUMN_START_DEF		1
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#define		MT9V032_COLUMN_START_MAX		752
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#define MT9V032_ROW_START				0x02
#define		MT9V032_ROW_START_MIN			4
#define		MT9V032_ROW_START_DEF			5
#define		MT9V032_ROW_START_MAX			482
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#define MT9V032_WINDOW_HEIGHT				0x03
#define		MT9V032_WINDOW_HEIGHT_MIN		1
#define		MT9V032_WINDOW_HEIGHT_DEF		480
#define		MT9V032_WINDOW_HEIGHT_MAX		480
#define MT9V032_WINDOW_WIDTH				0x04
#define		MT9V032_WINDOW_WIDTH_MIN		1
#define		MT9V032_WINDOW_WIDTH_DEF		752
#define		MT9V032_WINDOW_WIDTH_MAX		752
#define MT9V032_HORIZONTAL_BLANKING			0x05
#define		MT9V032_HORIZONTAL_BLANKING_MIN		43
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#define		MT9V034_HORIZONTAL_BLANKING_MIN		61
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#define		MT9V032_HORIZONTAL_BLANKING_DEF		94
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#define		MT9V032_HORIZONTAL_BLANKING_MAX		1023
#define MT9V032_VERTICAL_BLANKING			0x06
#define		MT9V032_VERTICAL_BLANKING_MIN		4
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#define		MT9V034_VERTICAL_BLANKING_MIN		2
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#define		MT9V032_VERTICAL_BLANKING_DEF		45
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#define		MT9V032_VERTICAL_BLANKING_MAX		3000
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#define		MT9V034_VERTICAL_BLANKING_MAX		32288
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#define MT9V032_CHIP_CONTROL				0x07
#define		MT9V032_CHIP_CONTROL_MASTER_MODE	(1 << 3)
#define		MT9V032_CHIP_CONTROL_DOUT_ENABLE	(1 << 7)
#define		MT9V032_CHIP_CONTROL_SEQUENTIAL		(1 << 8)
#define MT9V032_SHUTTER_WIDTH1				0x08
#define MT9V032_SHUTTER_WIDTH2				0x09
#define MT9V032_SHUTTER_WIDTH_CONTROL			0x0a
#define MT9V032_TOTAL_SHUTTER_WIDTH			0x0b
#define		MT9V032_TOTAL_SHUTTER_WIDTH_MIN		1
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#define		MT9V034_TOTAL_SHUTTER_WIDTH_MIN		0
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#define		MT9V032_TOTAL_SHUTTER_WIDTH_DEF		480
#define		MT9V032_TOTAL_SHUTTER_WIDTH_MAX		32767
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#define		MT9V034_TOTAL_SHUTTER_WIDTH_MAX		32765
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#define MT9V032_RESET					0x0c
#define MT9V032_READ_MODE				0x0d
#define		MT9V032_READ_MODE_ROW_BIN_MASK		(3 << 0)
#define		MT9V032_READ_MODE_ROW_BIN_SHIFT		0
#define		MT9V032_READ_MODE_COLUMN_BIN_MASK	(3 << 2)
#define		MT9V032_READ_MODE_COLUMN_BIN_SHIFT	2
#define		MT9V032_READ_MODE_ROW_FLIP		(1 << 4)
#define		MT9V032_READ_MODE_COLUMN_FLIP		(1 << 5)
#define		MT9V032_READ_MODE_DARK_COLUMNS		(1 << 6)
#define		MT9V032_READ_MODE_DARK_ROWS		(1 << 7)
#define MT9V032_PIXEL_OPERATION_MODE			0x0f
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#define		MT9V034_PIXEL_OPERATION_MODE_HDR	(1 << 0)
#define		MT9V034_PIXEL_OPERATION_MODE_COLOR	(1 << 1)
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#define		MT9V032_PIXEL_OPERATION_MODE_COLOR	(1 << 2)
#define		MT9V032_PIXEL_OPERATION_MODE_HDR	(1 << 6)
#define MT9V032_ANALOG_GAIN				0x35
#define		MT9V032_ANALOG_GAIN_MIN			16
#define		MT9V032_ANALOG_GAIN_DEF			16
#define		MT9V032_ANALOG_GAIN_MAX			64
#define MT9V032_MAX_ANALOG_GAIN				0x36
#define		MT9V032_MAX_ANALOG_GAIN_MAX		127
#define MT9V032_FRAME_DARK_AVERAGE			0x42
#define MT9V032_DARK_AVG_THRESH				0x46
#define		MT9V032_DARK_AVG_LOW_THRESH_MASK	(255 << 0)
#define		MT9V032_DARK_AVG_LOW_THRESH_SHIFT	0
#define		MT9V032_DARK_AVG_HIGH_THRESH_MASK	(255 << 8)
#define		MT9V032_DARK_AVG_HIGH_THRESH_SHIFT	8
#define MT9V032_ROW_NOISE_CORR_CONTROL			0x70
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#define		MT9V034_ROW_NOISE_CORR_ENABLE		(1 << 0)
#define		MT9V034_ROW_NOISE_CORR_USE_BLK_AVG	(1 << 1)
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#define		MT9V032_ROW_NOISE_CORR_ENABLE		(1 << 5)
#define		MT9V032_ROW_NOISE_CORR_USE_BLK_AVG	(1 << 7)
#define MT9V032_PIXEL_CLOCK				0x74
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#define MT9V034_PIXEL_CLOCK				0x72
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#define		MT9V032_PIXEL_CLOCK_INV_LINE		(1 << 0)
#define		MT9V032_PIXEL_CLOCK_INV_FRAME		(1 << 1)
#define		MT9V032_PIXEL_CLOCK_XOR_LINE		(1 << 2)
#define		MT9V032_PIXEL_CLOCK_CONT_LINE		(1 << 3)
#define		MT9V032_PIXEL_CLOCK_INV_PXL_CLK		(1 << 4)
#define MT9V032_TEST_PATTERN				0x7f
#define		MT9V032_TEST_PATTERN_DATA_MASK		(1023 << 0)
#define		MT9V032_TEST_PATTERN_DATA_SHIFT		0
#define		MT9V032_TEST_PATTERN_USE_DATA		(1 << 10)
#define		MT9V032_TEST_PATTERN_GRAY_MASK		(3 << 11)
#define		MT9V032_TEST_PATTERN_GRAY_NONE		(0 << 11)
#define		MT9V032_TEST_PATTERN_GRAY_VERTICAL	(1 << 11)
#define		MT9V032_TEST_PATTERN_GRAY_HORIZONTAL	(2 << 11)
#define		MT9V032_TEST_PATTERN_GRAY_DIAGONAL	(3 << 11)
#define		MT9V032_TEST_PATTERN_ENABLE		(1 << 13)
#define		MT9V032_TEST_PATTERN_FLIP		(1 << 14)
#define MT9V032_AEC_AGC_ENABLE				0xaf
#define		MT9V032_AEC_ENABLE			(1 << 0)
#define		MT9V032_AGC_ENABLE			(1 << 1)
#define MT9V032_THERMAL_INFO				0xc1

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enum mt9v032_model {
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	MT9V032_MODEL_V032_COLOR,
	MT9V032_MODEL_V032_MONO,
	MT9V032_MODEL_V034_COLOR,
	MT9V032_MODEL_V034_MONO,
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};

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struct mt9v032_model_version {
	unsigned int version;
	const char *name;
};

struct mt9v032_model_data {
	unsigned int min_row_time;
	unsigned int min_hblank;
	unsigned int min_vblank;
	unsigned int max_vblank;
	unsigned int min_shutter;
	unsigned int max_shutter;
	unsigned int pclk_reg;
};

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struct mt9v032_model_info {
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	const struct mt9v032_model_data *data;
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	bool color;
};

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static const struct mt9v032_model_version mt9v032_versions[] = {
	{ MT9V032_CHIP_ID_REV1, "MT9V032 rev1/2" },
	{ MT9V032_CHIP_ID_REV3, "MT9V032 rev3" },
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	{ MT9V034_CHIP_ID_REV1, "MT9V034 rev1" },
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};

static const struct mt9v032_model_data mt9v032_model_data[] = {
	{
		/* MT9V032 revisions 1/2/3 */
		.min_row_time = 660,
		.min_hblank = MT9V032_HORIZONTAL_BLANKING_MIN,
		.min_vblank = MT9V032_VERTICAL_BLANKING_MIN,
		.max_vblank = MT9V032_VERTICAL_BLANKING_MAX,
		.min_shutter = MT9V032_TOTAL_SHUTTER_WIDTH_MIN,
		.max_shutter = MT9V032_TOTAL_SHUTTER_WIDTH_MAX,
		.pclk_reg = MT9V032_PIXEL_CLOCK,
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	}, {
		/* MT9V034 */
		.min_row_time = 690,
		.min_hblank = MT9V034_HORIZONTAL_BLANKING_MIN,
		.min_vblank = MT9V034_VERTICAL_BLANKING_MIN,
		.max_vblank = MT9V034_VERTICAL_BLANKING_MAX,
		.min_shutter = MT9V034_TOTAL_SHUTTER_WIDTH_MIN,
		.max_shutter = MT9V034_TOTAL_SHUTTER_WIDTH_MAX,
		.pclk_reg = MT9V034_PIXEL_CLOCK,
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	},
};

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static const struct mt9v032_model_info mt9v032_models[] = {
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	[MT9V032_MODEL_V032_COLOR] = {
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		.data = &mt9v032_model_data[0],
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		.color = true,
	},
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	[MT9V032_MODEL_V032_MONO] = {
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		.data = &mt9v032_model_data[0],
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		.color = false,
	},
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	[MT9V032_MODEL_V034_COLOR] = {
		.data = &mt9v032_model_data[1],
		.color = true,
	},
	[MT9V032_MODEL_V034_MONO] = {
		.data = &mt9v032_model_data[1],
		.color = false,
	},
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};

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struct mt9v032 {
	struct v4l2_subdev subdev;
	struct media_pad pad;

	struct v4l2_mbus_framefmt format;
	struct v4l2_rect crop;
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	unsigned int hratio;
	unsigned int vratio;
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	struct v4l2_ctrl_handler ctrls;
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	struct {
		struct v4l2_ctrl *link_freq;
		struct v4l2_ctrl *pixel_rate;
	};
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	struct mutex power_lock;
	int power_count;

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	struct clk *clk;

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	struct mt9v032_platform_data *pdata;
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	const struct mt9v032_model_info *model;
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	const struct mt9v032_model_version *version;
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	u32 sysclk;
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	u16 chip_control;
	u16 aec_agc;
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	u16 hblank;
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	struct {
		struct v4l2_ctrl *test_pattern;
		struct v4l2_ctrl *test_pattern_color;
	};
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};

static struct mt9v032 *to_mt9v032(struct v4l2_subdev *sd)
{
	return container_of(sd, struct mt9v032, subdev);
}

static int mt9v032_read(struct i2c_client *client, const u8 reg)
{
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	s32 data = i2c_smbus_read_word_swapped(client, reg);
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	dev_dbg(&client->dev, "%s: read 0x%04x from 0x%02x\n", __func__,
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		data, reg);
	return data;
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}

static int mt9v032_write(struct i2c_client *client, const u8 reg,
			 const u16 data)
{
	dev_dbg(&client->dev, "%s: writing 0x%04x to 0x%02x\n", __func__,
		data, reg);
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	return i2c_smbus_write_word_swapped(client, reg, data);
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}

static int mt9v032_set_chip_control(struct mt9v032 *mt9v032, u16 clear, u16 set)
{
	struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
	u16 value = (mt9v032->chip_control & ~clear) | set;
	int ret;

	ret = mt9v032_write(client, MT9V032_CHIP_CONTROL, value);
	if (ret < 0)
		return ret;

	mt9v032->chip_control = value;
	return 0;
}

static int
mt9v032_update_aec_agc(struct mt9v032 *mt9v032, u16 which, int enable)
{
	struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
	u16 value = mt9v032->aec_agc;
	int ret;

	if (enable)
		value |= which;
	else
		value &= ~which;

	ret = mt9v032_write(client, MT9V032_AEC_AGC_ENABLE, value);
	if (ret < 0)
		return ret;

	mt9v032->aec_agc = value;
	return 0;
}

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static int
mt9v032_update_hblank(struct mt9v032 *mt9v032)
{
	struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
	struct v4l2_rect *crop = &mt9v032->crop;
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	unsigned int min_hblank = mt9v032->model->data->min_hblank;
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	unsigned int hblank;
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	if (mt9v032->version->version == MT9V034_CHIP_ID_REV1)
		min_hblank += (mt9v032->hratio - 1) * 10;
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	min_hblank = max_t(unsigned int, (int)mt9v032->model->data->min_row_time - crop->width,
			   (int)min_hblank);
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	hblank = max_t(unsigned int, mt9v032->hblank, min_hblank);

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	return mt9v032_write(client, MT9V032_HORIZONTAL_BLANKING, hblank);
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}

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static int mt9v032_power_on(struct mt9v032 *mt9v032)
{
	struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
	int ret;

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	ret = clk_set_rate(mt9v032->clk, mt9v032->sysclk);
	if (ret < 0)
		return ret;

	ret = clk_prepare_enable(mt9v032->clk);
	if (ret)
		return ret;

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	udelay(1);
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	/* Reset the chip and stop data read out */
	ret = mt9v032_write(client, MT9V032_RESET, 1);
	if (ret < 0)
		return ret;

	ret = mt9v032_write(client, MT9V032_RESET, 0);
	if (ret < 0)
		return ret;

	return mt9v032_write(client, MT9V032_CHIP_CONTROL, 0);
}

static void mt9v032_power_off(struct mt9v032 *mt9v032)
{
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	clk_disable_unprepare(mt9v032->clk);
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}

static int __mt9v032_set_power(struct mt9v032 *mt9v032, bool on)
{
	struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
	int ret;

	if (!on) {
		mt9v032_power_off(mt9v032);
		return 0;
	}

	ret = mt9v032_power_on(mt9v032);
	if (ret < 0)
		return ret;

	/* Configure the pixel clock polarity */
	if (mt9v032->pdata && mt9v032->pdata->clk_pol) {
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		ret = mt9v032_write(client, mt9v032->model->data->pclk_reg,
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				MT9V032_PIXEL_CLOCK_INV_PXL_CLK);
		if (ret < 0)
			return ret;
	}

	/* Disable the noise correction algorithm and restore the controls. */
	ret = mt9v032_write(client, MT9V032_ROW_NOISE_CORR_CONTROL, 0);
	if (ret < 0)
		return ret;

	return v4l2_ctrl_handler_setup(&mt9v032->ctrls);
}

/* -----------------------------------------------------------------------------
 * V4L2 subdev video operations
 */

static struct v4l2_mbus_framefmt *
__mt9v032_get_pad_format(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh,
			 unsigned int pad, enum v4l2_subdev_format_whence which)
{
	switch (which) {
	case V4L2_SUBDEV_FORMAT_TRY:
		return v4l2_subdev_get_try_format(fh, pad);
	case V4L2_SUBDEV_FORMAT_ACTIVE:
		return &mt9v032->format;
	default:
		return NULL;
	}
}

static struct v4l2_rect *
__mt9v032_get_pad_crop(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh,
		       unsigned int pad, enum v4l2_subdev_format_whence which)
{
	switch (which) {
	case V4L2_SUBDEV_FORMAT_TRY:
		return v4l2_subdev_get_try_crop(fh, pad);
	case V4L2_SUBDEV_FORMAT_ACTIVE:
		return &mt9v032->crop;
	default:
		return NULL;
	}
}

static int mt9v032_s_stream(struct v4l2_subdev *subdev, int enable)
{
	const u16 mode = MT9V032_CHIP_CONTROL_MASTER_MODE
		       | MT9V032_CHIP_CONTROL_DOUT_ENABLE
		       | MT9V032_CHIP_CONTROL_SEQUENTIAL;
	struct i2c_client *client = v4l2_get_subdevdata(subdev);
	struct mt9v032 *mt9v032 = to_mt9v032(subdev);
	struct v4l2_rect *crop = &mt9v032->crop;
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	unsigned int hbin;
	unsigned int vbin;
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	int ret;

	if (!enable)
		return mt9v032_set_chip_control(mt9v032, mode, 0);

	/* Configure the window size and row/column bin */
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	hbin = fls(mt9v032->hratio) - 1;
	vbin = fls(mt9v032->vratio) - 1;
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	ret = mt9v032_write(client, MT9V032_READ_MODE,
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			    hbin << MT9V032_READ_MODE_COLUMN_BIN_SHIFT |
			    vbin << MT9V032_READ_MODE_ROW_BIN_SHIFT);
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	if (ret < 0)
		return ret;

	ret = mt9v032_write(client, MT9V032_COLUMN_START, crop->left);
	if (ret < 0)
		return ret;

	ret = mt9v032_write(client, MT9V032_ROW_START, crop->top);
	if (ret < 0)
		return ret;

	ret = mt9v032_write(client, MT9V032_WINDOW_WIDTH, crop->width);
	if (ret < 0)
		return ret;

	ret = mt9v032_write(client, MT9V032_WINDOW_HEIGHT, crop->height);
	if (ret < 0)
		return ret;

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	ret = mt9v032_update_hblank(mt9v032);
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	if (ret < 0)
		return ret;

	/* Switch to master "normal" mode */
	return mt9v032_set_chip_control(mt9v032, 0, mode);
}

static int mt9v032_enum_mbus_code(struct v4l2_subdev *subdev,
				  struct v4l2_subdev_fh *fh,
				  struct v4l2_subdev_mbus_code_enum *code)
{
	if (code->index > 0)
		return -EINVAL;

	code->code = V4L2_MBUS_FMT_SGRBG10_1X10;
	return 0;
}

static int mt9v032_enum_frame_size(struct v4l2_subdev *subdev,
				   struct v4l2_subdev_fh *fh,
				   struct v4l2_subdev_frame_size_enum *fse)
{
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	if (fse->index >= 3 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10)
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		return -EINVAL;

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	fse->min_width = MT9V032_WINDOW_WIDTH_DEF / (1 << fse->index);
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	fse->max_width = fse->min_width;
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	fse->min_height = MT9V032_WINDOW_HEIGHT_DEF / (1 << fse->index);
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	fse->max_height = fse->min_height;

	return 0;
}

static int mt9v032_get_format(struct v4l2_subdev *subdev,
			      struct v4l2_subdev_fh *fh,
			      struct v4l2_subdev_format *format)
{
	struct mt9v032 *mt9v032 = to_mt9v032(subdev);

	format->format = *__mt9v032_get_pad_format(mt9v032, fh, format->pad,
						   format->which);
	return 0;
}

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static void mt9v032_configure_pixel_rate(struct mt9v032 *mt9v032)
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{
	struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
	int ret;

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	ret = v4l2_ctrl_s_ctrl_int64(mt9v032->pixel_rate,
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				     mt9v032->sysclk / mt9v032->hratio);
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	if (ret < 0)
		dev_warn(&client->dev, "failed to set pixel rate (%d)\n", ret);
}

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static unsigned int mt9v032_calc_ratio(unsigned int input, unsigned int output)
{
	/* Compute the power-of-two binning factor closest to the input size to
	 * output size ratio. Given that the output size is bounded by input/4
	 * and input, a generic implementation would be an ineffective luxury.
	 */
	if (output * 3 > input * 2)
		return 1;
	if (output * 3 > input)
		return 2;
	return 4;
}

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static int mt9v032_set_format(struct v4l2_subdev *subdev,
			      struct v4l2_subdev_fh *fh,
			      struct v4l2_subdev_format *format)
{
	struct mt9v032 *mt9v032 = to_mt9v032(subdev);
	struct v4l2_mbus_framefmt *__format;
	struct v4l2_rect *__crop;
	unsigned int width;
	unsigned int height;
	unsigned int hratio;
	unsigned int vratio;

	__crop = __mt9v032_get_pad_crop(mt9v032, fh, format->pad,
					format->which);

	/* Clamp the width and height to avoid dividing by zero. */
534 535 536 537 538 539 540 541
	width = clamp(ALIGN(format->format.width, 2),
		      max_t(unsigned int, __crop->width / 4,
			    MT9V032_WINDOW_WIDTH_MIN),
		      __crop->width);
	height = clamp(ALIGN(format->format.height, 2),
		       max_t(unsigned int, __crop->height / 4,
			     MT9V032_WINDOW_HEIGHT_MIN),
		       __crop->height);
542

543 544
	hratio = mt9v032_calc_ratio(__crop->width, width);
	vratio = mt9v032_calc_ratio(__crop->height, height);
545 546 547 548 549

	__format = __mt9v032_get_pad_format(mt9v032, fh, format->pad,
					    format->which);
	__format->width = __crop->width / hratio;
	__format->height = __crop->height / vratio;
550 551 552 553 554 555

	if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
		mt9v032->hratio = hratio;
		mt9v032->vratio = vratio;
		mt9v032_configure_pixel_rate(mt9v032);
	}
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	format->format = *__format;

	return 0;
}

static int mt9v032_get_crop(struct v4l2_subdev *subdev,
			    struct v4l2_subdev_fh *fh,
			    struct v4l2_subdev_crop *crop)
{
	struct mt9v032 *mt9v032 = to_mt9v032(subdev);

	crop->rect = *__mt9v032_get_pad_crop(mt9v032, fh, crop->pad,
					     crop->which);
	return 0;
}

static int mt9v032_set_crop(struct v4l2_subdev *subdev,
			    struct v4l2_subdev_fh *fh,
			    struct v4l2_subdev_crop *crop)
{
	struct mt9v032 *mt9v032 = to_mt9v032(subdev);
	struct v4l2_mbus_framefmt *__format;
	struct v4l2_rect *__crop;
	struct v4l2_rect rect;

582 583
	/* Clamp the crop rectangle boundaries and align them to a non multiple
	 * of 2 pixels to ensure a GRBG Bayer pattern.
584
	 */
585
	rect.left = clamp(ALIGN(crop->rect.left + 1, 2) - 1,
586 587
			  MT9V032_COLUMN_START_MIN,
			  MT9V032_COLUMN_START_MAX);
588
	rect.top = clamp(ALIGN(crop->rect.top + 1, 2) - 1,
589 590
			 MT9V032_ROW_START_MIN,
			 MT9V032_ROW_START_MAX);
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	rect.width = clamp_t(unsigned int, ALIGN(crop->rect.width, 2),
			     MT9V032_WINDOW_WIDTH_MIN,
			     MT9V032_WINDOW_WIDTH_MAX);
	rect.height = clamp_t(unsigned int, ALIGN(crop->rect.height, 2),
			      MT9V032_WINDOW_HEIGHT_MIN,
			      MT9V032_WINDOW_HEIGHT_MAX);

	rect.width = min_t(unsigned int,
			   rect.width, MT9V032_PIXEL_ARRAY_WIDTH - rect.left);
	rect.height = min_t(unsigned int,
			    rect.height, MT9V032_PIXEL_ARRAY_HEIGHT - rect.top);
602 603 604 605 606 607 608 609 610 611 612

	__crop = __mt9v032_get_pad_crop(mt9v032, fh, crop->pad, crop->which);

	if (rect.width != __crop->width || rect.height != __crop->height) {
		/* Reset the output image size if the crop rectangle size has
		 * been modified.
		 */
		__format = __mt9v032_get_pad_format(mt9v032, fh, crop->pad,
						    crop->which);
		__format->width = rect.width;
		__format->height = rect.height;
613 614 615 616 617
		if (crop->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
			mt9v032->hratio = 1;
			mt9v032->vratio = 1;
			mt9v032_configure_pixel_rate(mt9v032);
		}
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	}

	*__crop = rect;
	crop->rect = rect;

	return 0;
}

/* -----------------------------------------------------------------------------
 * V4L2 subdev control operations
 */

630
#define V4L2_CID_TEST_PATTERN_COLOR	(V4L2_CID_USER_BASE | 0x1001)
631 632 633 634 635 636

static int mt9v032_s_ctrl(struct v4l2_ctrl *ctrl)
{
	struct mt9v032 *mt9v032 =
			container_of(ctrl->handler, struct mt9v032, ctrls);
	struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
637
	u32 freq;
638 639 640 641 642 643 644 645 646 647 648 649
	u16 data;

	switch (ctrl->id) {
	case V4L2_CID_AUTOGAIN:
		return mt9v032_update_aec_agc(mt9v032, MT9V032_AGC_ENABLE,
					      ctrl->val);

	case V4L2_CID_GAIN:
		return mt9v032_write(client, MT9V032_ANALOG_GAIN, ctrl->val);

	case V4L2_CID_EXPOSURE_AUTO:
		return mt9v032_update_aec_agc(mt9v032, MT9V032_AEC_ENABLE,
650
					      !ctrl->val);
651 652 653 654 655

	case V4L2_CID_EXPOSURE:
		return mt9v032_write(client, MT9V032_TOTAL_SHUTTER_WIDTH,
				     ctrl->val);

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	case V4L2_CID_HBLANK:
		mt9v032->hblank = ctrl->val;
		return mt9v032_update_hblank(mt9v032);

	case V4L2_CID_VBLANK:
		return mt9v032_write(client, MT9V032_VERTICAL_BLANKING,
				     ctrl->val);

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	case V4L2_CID_PIXEL_RATE:
	case V4L2_CID_LINK_FREQ:
		if (mt9v032->link_freq == NULL)
			break;

		freq = mt9v032->pdata->link_freqs[mt9v032->link_freq->val];
		mt9v032->pixel_rate->val64 = freq;
		mt9v032->sysclk = freq;
		break;

674
	case V4L2_CID_TEST_PATTERN:
675
		switch (mt9v032->test_pattern->val) {
676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691
		case 0:
			data = 0;
			break;
		case 1:
			data = MT9V032_TEST_PATTERN_GRAY_VERTICAL
			     | MT9V032_TEST_PATTERN_ENABLE;
			break;
		case 2:
			data = MT9V032_TEST_PATTERN_GRAY_HORIZONTAL
			     | MT9V032_TEST_PATTERN_ENABLE;
			break;
		case 3:
			data = MT9V032_TEST_PATTERN_GRAY_DIAGONAL
			     | MT9V032_TEST_PATTERN_ENABLE;
			break;
		default:
692 693
			data = (mt9v032->test_pattern_color->val <<
				MT9V032_TEST_PATTERN_DATA_SHIFT)
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			     | MT9V032_TEST_PATTERN_USE_DATA
			     | MT9V032_TEST_PATTERN_ENABLE
			     | MT9V032_TEST_PATTERN_FLIP;
			break;
		}
		return mt9v032_write(client, MT9V032_TEST_PATTERN, data);
	}

	return 0;
}

static struct v4l2_ctrl_ops mt9v032_ctrl_ops = {
	.s_ctrl = mt9v032_s_ctrl,
};

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static const char * const mt9v032_test_pattern_menu[] = {
	"Disabled",
	"Gray Vertical Shade",
	"Gray Horizontal Shade",
	"Gray Diagonal Shade",
	"Plain",
};

static const struct v4l2_ctrl_config mt9v032_test_pattern_color = {
	.ops		= &mt9v032_ctrl_ops,
	.id		= V4L2_CID_TEST_PATTERN_COLOR,
	.type		= V4L2_CTRL_TYPE_INTEGER,
	.name		= "Test Pattern Color",
	.min		= 0,
	.max		= 1023,
	.step		= 1,
	.def		= 0,
	.flags		= 0,
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};

/* -----------------------------------------------------------------------------
 * V4L2 subdev core operations
 */

static int mt9v032_set_power(struct v4l2_subdev *subdev, int on)
{
	struct mt9v032 *mt9v032 = to_mt9v032(subdev);
	int ret = 0;

	mutex_lock(&mt9v032->power_lock);

	/* If the power count is modified from 0 to != 0 or from != 0 to 0,
	 * update the power state.
	 */
	if (mt9v032->power_count == !on) {
		ret = __mt9v032_set_power(mt9v032, !!on);
		if (ret < 0)
			goto done;
	}

	/* Update the power count. */
	mt9v032->power_count += on ? 1 : -1;
	WARN_ON(mt9v032->power_count < 0);

done:
	mutex_unlock(&mt9v032->power_lock);
	return ret;
}

/* -----------------------------------------------------------------------------
 * V4L2 subdev internal operations
 */

static int mt9v032_registered(struct v4l2_subdev *subdev)
{
	struct i2c_client *client = v4l2_get_subdevdata(subdev);
	struct mt9v032 *mt9v032 = to_mt9v032(subdev);
766 767
	unsigned int i;
	s32 version;
768 769 770 771 772 773 774 775 776 777 778 779
	int ret;

	dev_info(&client->dev, "Probing MT9V032 at address 0x%02x\n",
			client->addr);

	ret = mt9v032_power_on(mt9v032);
	if (ret < 0) {
		dev_err(&client->dev, "MT9V032 power up failed\n");
		return ret;
	}

	/* Read and check the sensor version */
780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795
	version = mt9v032_read(client, MT9V032_CHIP_VERSION);
	if (version < 0) {
		dev_err(&client->dev, "Failed reading chip version\n");
		return version;
	}

	for (i = 0; i < ARRAY_SIZE(mt9v032_versions); ++i) {
		if (mt9v032_versions[i].version == version) {
			mt9v032->version = &mt9v032_versions[i];
			break;
		}
	}

	if (mt9v032->version == NULL) {
		dev_err(&client->dev, "Unsupported chip version 0x%04x\n",
			version);
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		return -ENODEV;
	}

	mt9v032_power_off(mt9v032);

801 802
	dev_info(&client->dev, "%s detected at address 0x%02x\n",
		 mt9v032->version->name, client->addr);
803

804
	mt9v032_configure_pixel_rate(mt9v032);
805

806 807 808 809 810
	return ret;
}

static int mt9v032_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
{
811
	struct mt9v032 *mt9v032 = to_mt9v032(subdev);
812 813 814 815 816 817 818 819 820 821
	struct v4l2_mbus_framefmt *format;
	struct v4l2_rect *crop;

	crop = v4l2_subdev_get_try_crop(fh, 0);
	crop->left = MT9V032_COLUMN_START_DEF;
	crop->top = MT9V032_ROW_START_DEF;
	crop->width = MT9V032_WINDOW_WIDTH_DEF;
	crop->height = MT9V032_WINDOW_HEIGHT_DEF;

	format = v4l2_subdev_get_try_format(fh, 0);
822 823 824 825 826 827

	if (mt9v032->model->color)
		format->code = V4L2_MBUS_FMT_SGRBG10_1X10;
	else
		format->code = V4L2_MBUS_FMT_Y10_1X10;

828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876
	format->width = MT9V032_WINDOW_WIDTH_DEF;
	format->height = MT9V032_WINDOW_HEIGHT_DEF;
	format->field = V4L2_FIELD_NONE;
	format->colorspace = V4L2_COLORSPACE_SRGB;

	return mt9v032_set_power(subdev, 1);
}

static int mt9v032_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
{
	return mt9v032_set_power(subdev, 0);
}

static struct v4l2_subdev_core_ops mt9v032_subdev_core_ops = {
	.s_power	= mt9v032_set_power,
};

static struct v4l2_subdev_video_ops mt9v032_subdev_video_ops = {
	.s_stream	= mt9v032_s_stream,
};

static struct v4l2_subdev_pad_ops mt9v032_subdev_pad_ops = {
	.enum_mbus_code = mt9v032_enum_mbus_code,
	.enum_frame_size = mt9v032_enum_frame_size,
	.get_fmt = mt9v032_get_format,
	.set_fmt = mt9v032_set_format,
	.get_crop = mt9v032_get_crop,
	.set_crop = mt9v032_set_crop,
};

static struct v4l2_subdev_ops mt9v032_subdev_ops = {
	.core	= &mt9v032_subdev_core_ops,
	.video	= &mt9v032_subdev_video_ops,
	.pad	= &mt9v032_subdev_pad_ops,
};

static const struct v4l2_subdev_internal_ops mt9v032_subdev_internal_ops = {
	.registered = mt9v032_registered,
	.open = mt9v032_open,
	.close = mt9v032_close,
};

/* -----------------------------------------------------------------------------
 * Driver initialization and probing
 */

static int mt9v032_probe(struct i2c_client *client,
		const struct i2c_device_id *did)
{
877
	struct mt9v032_platform_data *pdata = client->dev.platform_data;
878 879 880 881 882 883 884 885 886 887 888
	struct mt9v032 *mt9v032;
	unsigned int i;
	int ret;

	if (!i2c_check_functionality(client->adapter,
				     I2C_FUNC_SMBUS_WORD_DATA)) {
		dev_warn(&client->adapter->dev,
			 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
		return -EIO;
	}

889
	mt9v032 = devm_kzalloc(&client->dev, sizeof(*mt9v032), GFP_KERNEL);
890 891 892
	if (!mt9v032)
		return -ENOMEM;

893 894 895 896
	mt9v032->clk = devm_clk_get(&client->dev, NULL);
	if (IS_ERR(mt9v032->clk))
		return PTR_ERR(mt9v032->clk);

897
	mutex_init(&mt9v032->power_lock);
898
	mt9v032->pdata = pdata;
899
	mt9v032->model = (const void *)did->driver_data;
900

901
	v4l2_ctrl_handler_init(&mt9v032->ctrls, 10);
902 903 904 905 906 907 908 909 910 911

	v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
			  V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
	v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
			  V4L2_CID_GAIN, MT9V032_ANALOG_GAIN_MIN,
			  MT9V032_ANALOG_GAIN_MAX, 1, MT9V032_ANALOG_GAIN_DEF);
	v4l2_ctrl_new_std_menu(&mt9v032->ctrls, &mt9v032_ctrl_ops,
			       V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, 0,
			       V4L2_EXPOSURE_AUTO);
	v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
912 913
			  V4L2_CID_EXPOSURE, mt9v032->model->data->min_shutter,
			  mt9v032->model->data->max_shutter, 1,
914
			  MT9V032_TOTAL_SHUTTER_WIDTH_DEF);
915
	v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
916
			  V4L2_CID_HBLANK, mt9v032->model->data->min_hblank,
917 918 919
			  MT9V032_HORIZONTAL_BLANKING_MAX, 1,
			  MT9V032_HORIZONTAL_BLANKING_DEF);
	v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
920 921
			  V4L2_CID_VBLANK, mt9v032->model->data->min_vblank,
			  mt9v032->model->data->max_vblank, 1,
922
			  MT9V032_VERTICAL_BLANKING_DEF);
923 924 925 926 927 928 929 930
	mt9v032->test_pattern = v4l2_ctrl_new_std_menu_items(&mt9v032->ctrls,
				&mt9v032_ctrl_ops, V4L2_CID_TEST_PATTERN,
				ARRAY_SIZE(mt9v032_test_pattern_menu) - 1, 0, 0,
				mt9v032_test_pattern_menu);
	mt9v032->test_pattern_color = v4l2_ctrl_new_custom(&mt9v032->ctrls,
				      &mt9v032_test_pattern_color, NULL);

	v4l2_ctrl_cluster(2, &mt9v032->test_pattern);
931

932 933 934
	mt9v032->pixel_rate =
		v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
				  V4L2_CID_PIXEL_RATE, 0, 0, 1, 0);
935

936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951
	if (pdata && pdata->link_freqs) {
		unsigned int def = 0;

		for (i = 0; pdata->link_freqs[i]; ++i) {
			if (pdata->link_freqs[i] == pdata->link_def_freq)
				def = i;
		}

		mt9v032->link_freq =
			v4l2_ctrl_new_int_menu(&mt9v032->ctrls,
					       &mt9v032_ctrl_ops,
					       V4L2_CID_LINK_FREQ, i - 1, def,
					       pdata->link_freqs);
		v4l2_ctrl_cluster(2, &mt9v032->link_freq);
	}

952 953 954 955 956 957 958 959 960 961 962 963

	mt9v032->subdev.ctrl_handler = &mt9v032->ctrls;

	if (mt9v032->ctrls.error)
		printk(KERN_INFO "%s: control initialization error %d\n",
		       __func__, mt9v032->ctrls.error);

	mt9v032->crop.left = MT9V032_COLUMN_START_DEF;
	mt9v032->crop.top = MT9V032_ROW_START_DEF;
	mt9v032->crop.width = MT9V032_WINDOW_WIDTH_DEF;
	mt9v032->crop.height = MT9V032_WINDOW_HEIGHT_DEF;

964 965 966 967 968
	if (mt9v032->model->color)
		mt9v032->format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
	else
		mt9v032->format.code = V4L2_MBUS_FMT_Y10_1X10;

969 970 971 972 973
	mt9v032->format.width = MT9V032_WINDOW_WIDTH_DEF;
	mt9v032->format.height = MT9V032_WINDOW_HEIGHT_DEF;
	mt9v032->format.field = V4L2_FIELD_NONE;
	mt9v032->format.colorspace = V4L2_COLORSPACE_SRGB;

974 975 976
	mt9v032->hratio = 1;
	mt9v032->vratio = 1;

977
	mt9v032->aec_agc = MT9V032_AEC_ENABLE | MT9V032_AGC_ENABLE;
978
	mt9v032->hblank = MT9V032_HORIZONTAL_BLANKING_DEF;
979
	mt9v032->sysclk = MT9V032_SYSCLK_FREQ_DEF;
980 981 982 983 984 985 986

	v4l2_i2c_subdev_init(&mt9v032->subdev, client, &mt9v032_subdev_ops);
	mt9v032->subdev.internal_ops = &mt9v032_subdev_internal_ops;
	mt9v032->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;

	mt9v032->pad.flags = MEDIA_PAD_FL_SOURCE;
	ret = media_entity_init(&mt9v032->subdev.entity, 1, &mt9v032->pad, 0);
987

988
	if (ret < 0)
989
		v4l2_ctrl_handler_free(&mt9v032->ctrls);
990 991 992 993 994 995 996 997 998

	return ret;
}

static int mt9v032_remove(struct i2c_client *client)
{
	struct v4l2_subdev *subdev = i2c_get_clientdata(client);
	struct mt9v032 *mt9v032 = to_mt9v032(subdev);

999
	v4l2_ctrl_handler_free(&mt9v032->ctrls);
1000 1001
	v4l2_device_unregister_subdev(subdev);
	media_entity_cleanup(&subdev->entity);
1002

1003 1004 1005 1006
	return 0;
}

static const struct i2c_device_id mt9v032_id[] = {
1007 1008 1009 1010
	{ "mt9v032", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V032_COLOR] },
	{ "mt9v032m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V032_MONO] },
	{ "mt9v034", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V034_COLOR] },
	{ "mt9v034m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V034_MONO] },
1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023
	{ }
};
MODULE_DEVICE_TABLE(i2c, mt9v032_id);

static struct i2c_driver mt9v032_driver = {
	.driver = {
		.name = "mt9v032",
	},
	.probe		= mt9v032_probe,
	.remove		= mt9v032_remove,
	.id_table	= mt9v032_id,
};

1024
module_i2c_driver(mt9v032_driver);
1025 1026 1027 1028

MODULE_DESCRIPTION("Aptina MT9V032 Camera driver");
MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
MODULE_LICENSE("GPL");