vmx.c 209.9 KB
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Avi Kivity 已提交
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/*
 * Kernel-based Virtual Machine driver for Linux
 *
 * This module enables machines with Intel VT-x extensions to run virtual
 * machines without emulation or binary translation.
 *
 * Copyright (C) 2006 Qumranet, Inc.
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 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
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 *
 * Authors:
 *   Avi Kivity   <avi@qumranet.com>
 *   Yaniv Kamay  <yaniv@qumranet.com>
 *
 * This work is licensed under the terms of the GNU GPL, version 2.  See
 * the COPYING file in the top-level directory.
 *
 */

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#include "irq.h"
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#include "mmu.h"
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#include "cpuid.h"
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#include <linux/kvm_host.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
#include <linux/highmem.h>
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#include <linux/sched.h>
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#include <linux/moduleparam.h>
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#include <linux/mod_devicetable.h>
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#include <linux/ftrace_event.h>
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#include <linux/slab.h>
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#include <linux/tboot.h>
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#include "kvm_cache_regs.h"
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#include "x86.h"
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#include <asm/io.h>
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#include <asm/desc.h>
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#include <asm/vmx.h>
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#include <asm/virtext.h>
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#include <asm/mce.h>
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#include <asm/i387.h>
#include <asm/xcr.h>
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#include <asm/perf_event.h>
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#include "trace.h"

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#define __ex(x) __kvm_handle_fault_on_reboot(x)
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#define __ex_clear(x, reg) \
	____kvm_handle_fault_on_reboot(x, "xor " reg " , " reg)
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MODULE_AUTHOR("Qumranet");
MODULE_LICENSE("GPL");

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static const struct x86_cpu_id vmx_cpu_id[] = {
	X86_FEATURE_MATCH(X86_FEATURE_VMX),
	{}
};
MODULE_DEVICE_TABLE(x86cpu, vmx_cpu_id);

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static bool __read_mostly enable_vpid = 1;
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module_param_named(vpid, enable_vpid, bool, 0444);
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static bool __read_mostly flexpriority_enabled = 1;
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module_param_named(flexpriority, flexpriority_enabled, bool, S_IRUGO);
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static bool __read_mostly enable_ept = 1;
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module_param_named(ept, enable_ept, bool, S_IRUGO);
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static bool __read_mostly enable_unrestricted_guest = 1;
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module_param_named(unrestricted_guest,
			enable_unrestricted_guest, bool, S_IRUGO);

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static bool __read_mostly enable_ept_ad_bits = 1;
module_param_named(eptad, enable_ept_ad_bits, bool, S_IRUGO);

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static bool __read_mostly emulate_invalid_guest_state = true;
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module_param(emulate_invalid_guest_state, bool, S_IRUGO);
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static bool __read_mostly vmm_exclusive = 1;
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module_param(vmm_exclusive, bool, S_IRUGO);

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static bool __read_mostly fasteoi = 1;
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module_param(fasteoi, bool, S_IRUGO);

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/*
 * If nested=1, nested virtualization is supported, i.e., guests may use
 * VMX and be a hypervisor for its own guests. If nested=0, guests may not
 * use VMX instructions.
 */
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static bool __read_mostly nested = 0;
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module_param(nested, bool, S_IRUGO);

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#define KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST				\
	(X86_CR0_WP | X86_CR0_NE | X86_CR0_NW | X86_CR0_CD)
#define KVM_GUEST_CR0_MASK						\
	(KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
#define KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST				\
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	(X86_CR0_WP | X86_CR0_NE)
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#define KVM_VM_CR0_ALWAYS_ON						\
	(KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
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#define KVM_CR4_GUEST_OWNED_BITS				      \
	(X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR      \
	 | X86_CR4_OSXMMEXCPT)

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#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)

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#define RMODE_GUEST_OWNED_EFLAGS_BITS (~(X86_EFLAGS_IOPL | X86_EFLAGS_VM))

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/*
 * These 2 parameters are used to config the controls for Pause-Loop Exiting:
 * ple_gap:    upper bound on the amount of time between two successive
 *             executions of PAUSE in a loop. Also indicate if ple enabled.
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 *             According to test, this time is usually smaller than 128 cycles.
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 * ple_window: upper bound on the amount of time a guest is allowed to execute
 *             in a PAUSE loop. Tests indicate that most spinlocks are held for
 *             less than 2^12 cycles
 * Time is measured based on a counter that runs at the same rate as the TSC,
 * refer SDM volume 3b section 21.6.13 & 22.1.3.
 */
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#define KVM_VMX_DEFAULT_PLE_GAP    128
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#define KVM_VMX_DEFAULT_PLE_WINDOW 4096
static int ple_gap = KVM_VMX_DEFAULT_PLE_GAP;
module_param(ple_gap, int, S_IRUGO);

static int ple_window = KVM_VMX_DEFAULT_PLE_WINDOW;
module_param(ple_window, int, S_IRUGO);

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extern const ulong vmx_return;

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#define NR_AUTOLOAD_MSRS 8
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#define VMCS02_POOL_SIZE 1
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struct vmcs {
	u32 revision_id;
	u32 abort;
	char data[0];
};

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/*
 * Track a VMCS that may be loaded on a certain CPU. If it is (cpu!=-1), also
 * remember whether it was VMLAUNCHed, and maintain a linked list of all VMCSs
 * loaded on this CPU (so we can clear them if the CPU goes down).
 */
struct loaded_vmcs {
	struct vmcs *vmcs;
	int cpu;
	int launched;
	struct list_head loaded_vmcss_on_cpu_link;
};

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struct shared_msr_entry {
	unsigned index;
	u64 data;
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	u64 mask;
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};

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/*
 * struct vmcs12 describes the state that our guest hypervisor (L1) keeps for a
 * single nested guest (L2), hence the name vmcs12. Any VMX implementation has
 * a VMCS structure, and vmcs12 is our emulated VMX's VMCS. This structure is
 * stored in guest memory specified by VMPTRLD, but is opaque to the guest,
 * which must access it using VMREAD/VMWRITE/VMCLEAR instructions.
 * More than one of these structures may exist, if L1 runs multiple L2 guests.
 * nested_vmx_run() will use the data here to build a vmcs02: a VMCS for the
 * underlying hardware which will be used to run L2.
 * This structure is packed to ensure that its layout is identical across
 * machines (necessary for live migration).
 * If there are changes in this struct, VMCS12_REVISION must be changed.
 */
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typedef u64 natural_width;
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struct __packed vmcs12 {
	/* According to the Intel spec, a VMCS region must start with the
	 * following two fields. Then follow implementation-specific data.
	 */
	u32 revision_id;
	u32 abort;
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	u32 launch_state; /* set to 0 by VMCLEAR, to 1 by VMLAUNCH */
	u32 padding[7]; /* room for future expansion */

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	u64 io_bitmap_a;
	u64 io_bitmap_b;
	u64 msr_bitmap;
	u64 vm_exit_msr_store_addr;
	u64 vm_exit_msr_load_addr;
	u64 vm_entry_msr_load_addr;
	u64 tsc_offset;
	u64 virtual_apic_page_addr;
	u64 apic_access_addr;
	u64 ept_pointer;
	u64 guest_physical_address;
	u64 vmcs_link_pointer;
	u64 guest_ia32_debugctl;
	u64 guest_ia32_pat;
	u64 guest_ia32_efer;
	u64 guest_ia32_perf_global_ctrl;
	u64 guest_pdptr0;
	u64 guest_pdptr1;
	u64 guest_pdptr2;
	u64 guest_pdptr3;
	u64 host_ia32_pat;
	u64 host_ia32_efer;
	u64 host_ia32_perf_global_ctrl;
	u64 padding64[8]; /* room for future expansion */
	/*
	 * To allow migration of L1 (complete with its L2 guests) between
	 * machines of different natural widths (32 or 64 bit), we cannot have
	 * unsigned long fields with no explict size. We use u64 (aliased
	 * natural_width) instead. Luckily, x86 is little-endian.
	 */
	natural_width cr0_guest_host_mask;
	natural_width cr4_guest_host_mask;
	natural_width cr0_read_shadow;
	natural_width cr4_read_shadow;
	natural_width cr3_target_value0;
	natural_width cr3_target_value1;
	natural_width cr3_target_value2;
	natural_width cr3_target_value3;
	natural_width exit_qualification;
	natural_width guest_linear_address;
	natural_width guest_cr0;
	natural_width guest_cr3;
	natural_width guest_cr4;
	natural_width guest_es_base;
	natural_width guest_cs_base;
	natural_width guest_ss_base;
	natural_width guest_ds_base;
	natural_width guest_fs_base;
	natural_width guest_gs_base;
	natural_width guest_ldtr_base;
	natural_width guest_tr_base;
	natural_width guest_gdtr_base;
	natural_width guest_idtr_base;
	natural_width guest_dr7;
	natural_width guest_rsp;
	natural_width guest_rip;
	natural_width guest_rflags;
	natural_width guest_pending_dbg_exceptions;
	natural_width guest_sysenter_esp;
	natural_width guest_sysenter_eip;
	natural_width host_cr0;
	natural_width host_cr3;
	natural_width host_cr4;
	natural_width host_fs_base;
	natural_width host_gs_base;
	natural_width host_tr_base;
	natural_width host_gdtr_base;
	natural_width host_idtr_base;
	natural_width host_ia32_sysenter_esp;
	natural_width host_ia32_sysenter_eip;
	natural_width host_rsp;
	natural_width host_rip;
	natural_width paddingl[8]; /* room for future expansion */
	u32 pin_based_vm_exec_control;
	u32 cpu_based_vm_exec_control;
	u32 exception_bitmap;
	u32 page_fault_error_code_mask;
	u32 page_fault_error_code_match;
	u32 cr3_target_count;
	u32 vm_exit_controls;
	u32 vm_exit_msr_store_count;
	u32 vm_exit_msr_load_count;
	u32 vm_entry_controls;
	u32 vm_entry_msr_load_count;
	u32 vm_entry_intr_info_field;
	u32 vm_entry_exception_error_code;
	u32 vm_entry_instruction_len;
	u32 tpr_threshold;
	u32 secondary_vm_exec_control;
	u32 vm_instruction_error;
	u32 vm_exit_reason;
	u32 vm_exit_intr_info;
	u32 vm_exit_intr_error_code;
	u32 idt_vectoring_info_field;
	u32 idt_vectoring_error_code;
	u32 vm_exit_instruction_len;
	u32 vmx_instruction_info;
	u32 guest_es_limit;
	u32 guest_cs_limit;
	u32 guest_ss_limit;
	u32 guest_ds_limit;
	u32 guest_fs_limit;
	u32 guest_gs_limit;
	u32 guest_ldtr_limit;
	u32 guest_tr_limit;
	u32 guest_gdtr_limit;
	u32 guest_idtr_limit;
	u32 guest_es_ar_bytes;
	u32 guest_cs_ar_bytes;
	u32 guest_ss_ar_bytes;
	u32 guest_ds_ar_bytes;
	u32 guest_fs_ar_bytes;
	u32 guest_gs_ar_bytes;
	u32 guest_ldtr_ar_bytes;
	u32 guest_tr_ar_bytes;
	u32 guest_interruptibility_info;
	u32 guest_activity_state;
	u32 guest_sysenter_cs;
	u32 host_ia32_sysenter_cs;
	u32 padding32[8]; /* room for future expansion */
	u16 virtual_processor_id;
	u16 guest_es_selector;
	u16 guest_cs_selector;
	u16 guest_ss_selector;
	u16 guest_ds_selector;
	u16 guest_fs_selector;
	u16 guest_gs_selector;
	u16 guest_ldtr_selector;
	u16 guest_tr_selector;
	u16 host_es_selector;
	u16 host_cs_selector;
	u16 host_ss_selector;
	u16 host_ds_selector;
	u16 host_fs_selector;
	u16 host_gs_selector;
	u16 host_tr_selector;
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};

/*
 * VMCS12_REVISION is an arbitrary id that should be changed if the content or
 * layout of struct vmcs12 is changed. MSR_IA32_VMX_BASIC returns this id, and
 * VMPTRLD verifies that the VMCS region that L1 is loading contains this id.
 */
#define VMCS12_REVISION 0x11e57ed0

/*
 * VMCS12_SIZE is the number of bytes L1 should allocate for the VMXON region
 * and any VMCS region. Although only sizeof(struct vmcs12) are used by the
 * current implementation, 4K are reserved to avoid future complications.
 */
#define VMCS12_SIZE 0x1000

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/* Used to remember the last vmcs02 used for some recently used vmcs12s */
struct vmcs02_list {
	struct list_head list;
	gpa_t vmptr;
	struct loaded_vmcs vmcs02;
};

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/*
 * The nested_vmx structure is part of vcpu_vmx, and holds information we need
 * for correct emulation of VMX (i.e., nested VMX) on this vcpu.
 */
struct nested_vmx {
	/* Has the level1 guest done vmxon? */
	bool vmxon;
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	/* The guest-physical address of the current VMCS L1 keeps for L2 */
	gpa_t current_vmptr;
	/* The host-usable pointer to the above */
	struct page *current_vmcs12_page;
	struct vmcs12 *current_vmcs12;
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	/* vmcs02_list cache of VMCSs recently used to run L2 guests */
	struct list_head vmcs02_pool;
	int vmcs02_num;
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	u64 vmcs01_tsc_offset;
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	/* L2 must run next, and mustn't decide to exit to L1. */
	bool nested_run_pending;
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	/*
	 * Guest pages referred to in vmcs02 with host-physical pointers, so
	 * we must keep them pinned while L2 runs.
	 */
	struct page *apic_access_page;
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};

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struct vcpu_vmx {
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	struct kvm_vcpu       vcpu;
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	unsigned long         host_rsp;
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	u8                    fail;
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	u8                    cpl;
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	bool                  nmi_known_unmasked;
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	u32                   exit_intr_info;
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	u32                   idt_vectoring_info;
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	ulong                 rflags;
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	struct shared_msr_entry *guest_msrs;
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	int                   nmsrs;
	int                   save_nmsrs;
#ifdef CONFIG_X86_64
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	u64 		      msr_host_kernel_gs_base;
	u64 		      msr_guest_kernel_gs_base;
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#endif
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	/*
	 * loaded_vmcs points to the VMCS currently used in this vcpu. For a
	 * non-nested (L1) guest, it always points to vmcs01. For a nested
	 * guest (L2), it points to a different VMCS.
	 */
	struct loaded_vmcs    vmcs01;
	struct loaded_vmcs   *loaded_vmcs;
	bool                  __launched; /* temporary, used in vmx_vcpu_run */
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	struct msr_autoload {
		unsigned nr;
		struct vmx_msr_entry guest[NR_AUTOLOAD_MSRS];
		struct vmx_msr_entry host[NR_AUTOLOAD_MSRS];
	} msr_autoload;
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	struct {
		int           loaded;
		u16           fs_sel, gs_sel, ldt_sel;
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#ifdef CONFIG_X86_64
		u16           ds_sel, es_sel;
#endif
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		int           gs_ldt_reload_needed;
		int           fs_reload_needed;
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	} host_state;
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	struct {
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		int vm86_active;
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		ulong save_rflags;
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		struct kvm_segment segs[8];
	} rmode;
	struct {
		u32 bitmask; /* 4 bits per segment (1 bit per field) */
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		struct kvm_save_segment {
			u16 selector;
			unsigned long base;
			u32 limit;
			u32 ar;
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		} seg[8];
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	} segment_cache;
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	int vpid;
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	bool emulation_required;
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	/* Support for vnmi-less CPUs */
	int soft_vnmi_blocked;
	ktime_t entry_time;
	s64 vnmi_blocked_time;
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	u32 exit_reason;
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	bool rdtscp_enabled;
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	/* Support for a guest hypervisor (nested VMX) */
	struct nested_vmx nested;
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};

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enum segment_cache_field {
	SEG_FIELD_SEL = 0,
	SEG_FIELD_BASE = 1,
	SEG_FIELD_LIMIT = 2,
	SEG_FIELD_AR = 3,

	SEG_FIELD_NR = 4
};

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static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
{
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	return container_of(vcpu, struct vcpu_vmx, vcpu);
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}

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#define VMCS12_OFFSET(x) offsetof(struct vmcs12, x)
#define FIELD(number, name)	[number] = VMCS12_OFFSET(name)
#define FIELD64(number, name)	[number] = VMCS12_OFFSET(name), \
				[number##_HIGH] = VMCS12_OFFSET(name)+4

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static const unsigned short vmcs_field_to_offset_table[] = {
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	FIELD(VIRTUAL_PROCESSOR_ID, virtual_processor_id),
	FIELD(GUEST_ES_SELECTOR, guest_es_selector),
	FIELD(GUEST_CS_SELECTOR, guest_cs_selector),
	FIELD(GUEST_SS_SELECTOR, guest_ss_selector),
	FIELD(GUEST_DS_SELECTOR, guest_ds_selector),
	FIELD(GUEST_FS_SELECTOR, guest_fs_selector),
	FIELD(GUEST_GS_SELECTOR, guest_gs_selector),
	FIELD(GUEST_LDTR_SELECTOR, guest_ldtr_selector),
	FIELD(GUEST_TR_SELECTOR, guest_tr_selector),
	FIELD(HOST_ES_SELECTOR, host_es_selector),
	FIELD(HOST_CS_SELECTOR, host_cs_selector),
	FIELD(HOST_SS_SELECTOR, host_ss_selector),
	FIELD(HOST_DS_SELECTOR, host_ds_selector),
	FIELD(HOST_FS_SELECTOR, host_fs_selector),
	FIELD(HOST_GS_SELECTOR, host_gs_selector),
	FIELD(HOST_TR_SELECTOR, host_tr_selector),
	FIELD64(IO_BITMAP_A, io_bitmap_a),
	FIELD64(IO_BITMAP_B, io_bitmap_b),
	FIELD64(MSR_BITMAP, msr_bitmap),
	FIELD64(VM_EXIT_MSR_STORE_ADDR, vm_exit_msr_store_addr),
	FIELD64(VM_EXIT_MSR_LOAD_ADDR, vm_exit_msr_load_addr),
	FIELD64(VM_ENTRY_MSR_LOAD_ADDR, vm_entry_msr_load_addr),
	FIELD64(TSC_OFFSET, tsc_offset),
	FIELD64(VIRTUAL_APIC_PAGE_ADDR, virtual_apic_page_addr),
	FIELD64(APIC_ACCESS_ADDR, apic_access_addr),
	FIELD64(EPT_POINTER, ept_pointer),
	FIELD64(GUEST_PHYSICAL_ADDRESS, guest_physical_address),
	FIELD64(VMCS_LINK_POINTER, vmcs_link_pointer),
	FIELD64(GUEST_IA32_DEBUGCTL, guest_ia32_debugctl),
	FIELD64(GUEST_IA32_PAT, guest_ia32_pat),
	FIELD64(GUEST_IA32_EFER, guest_ia32_efer),
	FIELD64(GUEST_IA32_PERF_GLOBAL_CTRL, guest_ia32_perf_global_ctrl),
	FIELD64(GUEST_PDPTR0, guest_pdptr0),
	FIELD64(GUEST_PDPTR1, guest_pdptr1),
	FIELD64(GUEST_PDPTR2, guest_pdptr2),
	FIELD64(GUEST_PDPTR3, guest_pdptr3),
	FIELD64(HOST_IA32_PAT, host_ia32_pat),
	FIELD64(HOST_IA32_EFER, host_ia32_efer),
	FIELD64(HOST_IA32_PERF_GLOBAL_CTRL, host_ia32_perf_global_ctrl),
	FIELD(PIN_BASED_VM_EXEC_CONTROL, pin_based_vm_exec_control),
	FIELD(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control),
	FIELD(EXCEPTION_BITMAP, exception_bitmap),
	FIELD(PAGE_FAULT_ERROR_CODE_MASK, page_fault_error_code_mask),
	FIELD(PAGE_FAULT_ERROR_CODE_MATCH, page_fault_error_code_match),
	FIELD(CR3_TARGET_COUNT, cr3_target_count),
	FIELD(VM_EXIT_CONTROLS, vm_exit_controls),
	FIELD(VM_EXIT_MSR_STORE_COUNT, vm_exit_msr_store_count),
	FIELD(VM_EXIT_MSR_LOAD_COUNT, vm_exit_msr_load_count),
	FIELD(VM_ENTRY_CONTROLS, vm_entry_controls),
	FIELD(VM_ENTRY_MSR_LOAD_COUNT, vm_entry_msr_load_count),
	FIELD(VM_ENTRY_INTR_INFO_FIELD, vm_entry_intr_info_field),
	FIELD(VM_ENTRY_EXCEPTION_ERROR_CODE, vm_entry_exception_error_code),
	FIELD(VM_ENTRY_INSTRUCTION_LEN, vm_entry_instruction_len),
	FIELD(TPR_THRESHOLD, tpr_threshold),
	FIELD(SECONDARY_VM_EXEC_CONTROL, secondary_vm_exec_control),
	FIELD(VM_INSTRUCTION_ERROR, vm_instruction_error),
	FIELD(VM_EXIT_REASON, vm_exit_reason),
	FIELD(VM_EXIT_INTR_INFO, vm_exit_intr_info),
	FIELD(VM_EXIT_INTR_ERROR_CODE, vm_exit_intr_error_code),
	FIELD(IDT_VECTORING_INFO_FIELD, idt_vectoring_info_field),
	FIELD(IDT_VECTORING_ERROR_CODE, idt_vectoring_error_code),
	FIELD(VM_EXIT_INSTRUCTION_LEN, vm_exit_instruction_len),
	FIELD(VMX_INSTRUCTION_INFO, vmx_instruction_info),
	FIELD(GUEST_ES_LIMIT, guest_es_limit),
	FIELD(GUEST_CS_LIMIT, guest_cs_limit),
	FIELD(GUEST_SS_LIMIT, guest_ss_limit),
	FIELD(GUEST_DS_LIMIT, guest_ds_limit),
	FIELD(GUEST_FS_LIMIT, guest_fs_limit),
	FIELD(GUEST_GS_LIMIT, guest_gs_limit),
	FIELD(GUEST_LDTR_LIMIT, guest_ldtr_limit),
	FIELD(GUEST_TR_LIMIT, guest_tr_limit),
	FIELD(GUEST_GDTR_LIMIT, guest_gdtr_limit),
	FIELD(GUEST_IDTR_LIMIT, guest_idtr_limit),
	FIELD(GUEST_ES_AR_BYTES, guest_es_ar_bytes),
	FIELD(GUEST_CS_AR_BYTES, guest_cs_ar_bytes),
	FIELD(GUEST_SS_AR_BYTES, guest_ss_ar_bytes),
	FIELD(GUEST_DS_AR_BYTES, guest_ds_ar_bytes),
	FIELD(GUEST_FS_AR_BYTES, guest_fs_ar_bytes),
	FIELD(GUEST_GS_AR_BYTES, guest_gs_ar_bytes),
	FIELD(GUEST_LDTR_AR_BYTES, guest_ldtr_ar_bytes),
	FIELD(GUEST_TR_AR_BYTES, guest_tr_ar_bytes),
	FIELD(GUEST_INTERRUPTIBILITY_INFO, guest_interruptibility_info),
	FIELD(GUEST_ACTIVITY_STATE, guest_activity_state),
	FIELD(GUEST_SYSENTER_CS, guest_sysenter_cs),
	FIELD(HOST_IA32_SYSENTER_CS, host_ia32_sysenter_cs),
	FIELD(CR0_GUEST_HOST_MASK, cr0_guest_host_mask),
	FIELD(CR4_GUEST_HOST_MASK, cr4_guest_host_mask),
	FIELD(CR0_READ_SHADOW, cr0_read_shadow),
	FIELD(CR4_READ_SHADOW, cr4_read_shadow),
	FIELD(CR3_TARGET_VALUE0, cr3_target_value0),
	FIELD(CR3_TARGET_VALUE1, cr3_target_value1),
	FIELD(CR3_TARGET_VALUE2, cr3_target_value2),
	FIELD(CR3_TARGET_VALUE3, cr3_target_value3),
	FIELD(EXIT_QUALIFICATION, exit_qualification),
	FIELD(GUEST_LINEAR_ADDRESS, guest_linear_address),
	FIELD(GUEST_CR0, guest_cr0),
	FIELD(GUEST_CR3, guest_cr3),
	FIELD(GUEST_CR4, guest_cr4),
	FIELD(GUEST_ES_BASE, guest_es_base),
	FIELD(GUEST_CS_BASE, guest_cs_base),
	FIELD(GUEST_SS_BASE, guest_ss_base),
	FIELD(GUEST_DS_BASE, guest_ds_base),
	FIELD(GUEST_FS_BASE, guest_fs_base),
	FIELD(GUEST_GS_BASE, guest_gs_base),
	FIELD(GUEST_LDTR_BASE, guest_ldtr_base),
	FIELD(GUEST_TR_BASE, guest_tr_base),
	FIELD(GUEST_GDTR_BASE, guest_gdtr_base),
	FIELD(GUEST_IDTR_BASE, guest_idtr_base),
	FIELD(GUEST_DR7, guest_dr7),
	FIELD(GUEST_RSP, guest_rsp),
	FIELD(GUEST_RIP, guest_rip),
	FIELD(GUEST_RFLAGS, guest_rflags),
	FIELD(GUEST_PENDING_DBG_EXCEPTIONS, guest_pending_dbg_exceptions),
	FIELD(GUEST_SYSENTER_ESP, guest_sysenter_esp),
	FIELD(GUEST_SYSENTER_EIP, guest_sysenter_eip),
	FIELD(HOST_CR0, host_cr0),
	FIELD(HOST_CR3, host_cr3),
	FIELD(HOST_CR4, host_cr4),
	FIELD(HOST_FS_BASE, host_fs_base),
	FIELD(HOST_GS_BASE, host_gs_base),
	FIELD(HOST_TR_BASE, host_tr_base),
	FIELD(HOST_GDTR_BASE, host_gdtr_base),
	FIELD(HOST_IDTR_BASE, host_idtr_base),
	FIELD(HOST_IA32_SYSENTER_ESP, host_ia32_sysenter_esp),
	FIELD(HOST_IA32_SYSENTER_EIP, host_ia32_sysenter_eip),
	FIELD(HOST_RSP, host_rsp),
	FIELD(HOST_RIP, host_rip),
};
static const int max_vmcs_field = ARRAY_SIZE(vmcs_field_to_offset_table);

static inline short vmcs_field_to_offset(unsigned long field)
{
	if (field >= max_vmcs_field || vmcs_field_to_offset_table[field] == 0)
		return -1;
	return vmcs_field_to_offset_table[field];
}

593 594 595 596 597 598 599 600
static inline struct vmcs12 *get_vmcs12(struct kvm_vcpu *vcpu)
{
	return to_vmx(vcpu)->nested.current_vmcs12;
}

static struct page *nested_get_page(struct kvm_vcpu *vcpu, gpa_t addr)
{
	struct page *page = gfn_to_page(vcpu->kvm, addr >> PAGE_SHIFT);
601
	if (is_error_page(page))
602
		return NULL;
603

604 605 606 607 608 609 610 611 612 613 614 615 616
	return page;
}

static void nested_release_page(struct page *page)
{
	kvm_release_page_dirty(page);
}

static void nested_release_page_clean(struct page *page)
{
	kvm_release_page_clean(page);
}

617
static u64 construct_eptp(unsigned long root_hpa);
618 619
static void kvm_cpu_vmxon(u64 addr);
static void kvm_cpu_vmxoff(void);
620
static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
621
static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr);
622 623 624 625
static void vmx_set_segment(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg);
static void vmx_get_segment(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg);
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static DEFINE_PER_CPU(struct vmcs *, vmxarea);
static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
629 630 631 632 633
/*
 * We maintain a per-CPU linked-list of VMCS loaded on that CPU. This is needed
 * when a CPU is brought down, and we need to VMCLEAR all VMCSs loaded on it.
 */
static DEFINE_PER_CPU(struct list_head, loaded_vmcss_on_cpu);
634
static DEFINE_PER_CPU(struct desc_ptr, host_gdt);
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636 637
static unsigned long *vmx_io_bitmap_a;
static unsigned long *vmx_io_bitmap_b;
638 639
static unsigned long *vmx_msr_bitmap_legacy;
static unsigned long *vmx_msr_bitmap_longmode;
640

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static bool cpu_has_load_ia32_efer;
642
static bool cpu_has_load_perf_global_ctrl;
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644 645 646
static DECLARE_BITMAP(vmx_vpid_bitmap, VMX_NR_VPIDS);
static DEFINE_SPINLOCK(vmx_vpid_lock);

647
static struct vmcs_config {
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	int size;
	int order;
	u32 revision_id;
651 652
	u32 pin_based_exec_ctrl;
	u32 cpu_based_exec_ctrl;
653
	u32 cpu_based_2nd_exec_ctrl;
654 655 656
	u32 vmexit_ctrl;
	u32 vmentry_ctrl;
} vmcs_config;
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static struct vmx_capability {
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	u32 ept;
	u32 vpid;
} vmx_capability;

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#define VMX_SEGMENT_FIELD(seg)					\
	[VCPU_SREG_##seg] = {                                   \
		.selector = GUEST_##seg##_SELECTOR,		\
		.base = GUEST_##seg##_BASE,		   	\
		.limit = GUEST_##seg##_LIMIT,		   	\
		.ar_bytes = GUEST_##seg##_AR_BYTES,	   	\
	}

671
static const struct kvm_vmx_segment_field {
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	unsigned selector;
	unsigned base;
	unsigned limit;
	unsigned ar_bytes;
} kvm_vmx_segment_fields[] = {
	VMX_SEGMENT_FIELD(CS),
	VMX_SEGMENT_FIELD(DS),
	VMX_SEGMENT_FIELD(ES),
	VMX_SEGMENT_FIELD(FS),
	VMX_SEGMENT_FIELD(GS),
	VMX_SEGMENT_FIELD(SS),
	VMX_SEGMENT_FIELD(TR),
	VMX_SEGMENT_FIELD(LDTR),
};

687 688
static u64 host_efer;

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static void ept_save_pdptrs(struct kvm_vcpu *vcpu);

691
/*
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 * Keep MSR_STAR at the end, as setup_msrs() will try to optimize it
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 * away by decrementing the array size.
 */
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static const u32 vmx_msr_index[] = {
696
#ifdef CONFIG_X86_64
697
	MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR,
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#endif
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	MSR_EFER, MSR_TSC_AUX, MSR_STAR,
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};
701
#define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
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703
static inline bool is_page_fault(u32 intr_info)
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{
	return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
			     INTR_INFO_VALID_MASK)) ==
707
		(INTR_TYPE_HARD_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
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}

710
static inline bool is_no_device(u32 intr_info)
711 712 713
{
	return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
			     INTR_INFO_VALID_MASK)) ==
714
		(INTR_TYPE_HARD_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
715 716
}

717
static inline bool is_invalid_opcode(u32 intr_info)
718 719 720
{
	return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
			     INTR_INFO_VALID_MASK)) ==
721
		(INTR_TYPE_HARD_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK);
722 723
}

724
static inline bool is_external_interrupt(u32 intr_info)
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{
	return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
		== (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
}

730
static inline bool is_machine_check(u32 intr_info)
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{
	return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
			     INTR_INFO_VALID_MASK)) ==
		(INTR_TYPE_HARD_EXCEPTION | MC_VECTOR | INTR_INFO_VALID_MASK);
}

737
static inline bool cpu_has_vmx_msr_bitmap(void)
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{
739
	return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS;
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}

742
static inline bool cpu_has_vmx_tpr_shadow(void)
743
{
744
	return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW;
745 746
}

747
static inline bool vm_need_tpr_shadow(struct kvm *kvm)
748
{
749
	return (cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm));
750 751
}

752
static inline bool cpu_has_secondary_exec_ctrls(void)
753
{
754 755
	return vmcs_config.cpu_based_exec_ctrl &
		CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
756 757
}

758
static inline bool cpu_has_vmx_virtualize_apic_accesses(void)
759
{
760 761 762 763 764 765 766 767
	return vmcs_config.cpu_based_2nd_exec_ctrl &
		SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
}

static inline bool cpu_has_vmx_flexpriority(void)
{
	return cpu_has_vmx_tpr_shadow() &&
		cpu_has_vmx_virtualize_apic_accesses();
768 769
}

770 771
static inline bool cpu_has_vmx_ept_execute_only(void)
{
772
	return vmx_capability.ept & VMX_EPT_EXECUTE_ONLY_BIT;
773 774 775 776
}

static inline bool cpu_has_vmx_eptp_uncacheable(void)
{
777
	return vmx_capability.ept & VMX_EPTP_UC_BIT;
778 779 780 781
}

static inline bool cpu_has_vmx_eptp_writeback(void)
{
782
	return vmx_capability.ept & VMX_EPTP_WB_BIT;
783 784 785 786
}

static inline bool cpu_has_vmx_ept_2m_page(void)
{
787
	return vmx_capability.ept & VMX_EPT_2MB_PAGE_BIT;
788 789
}

790 791
static inline bool cpu_has_vmx_ept_1g_page(void)
{
792
	return vmx_capability.ept & VMX_EPT_1GB_PAGE_BIT;
793 794
}

795 796 797 798 799
static inline bool cpu_has_vmx_ept_4levels(void)
{
	return vmx_capability.ept & VMX_EPT_PAGE_WALK_4_BIT;
}

800 801 802 803 804
static inline bool cpu_has_vmx_ept_ad_bits(void)
{
	return vmx_capability.ept & VMX_EPT_AD_BIT;
}

805
static inline bool cpu_has_vmx_invept_individual_addr(void)
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{
807
	return vmx_capability.ept & VMX_EPT_EXTENT_INDIVIDUAL_BIT;
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}

810
static inline bool cpu_has_vmx_invept_context(void)
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{
812
	return vmx_capability.ept & VMX_EPT_EXTENT_CONTEXT_BIT;
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}

815
static inline bool cpu_has_vmx_invept_global(void)
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{
817
	return vmx_capability.ept & VMX_EPT_EXTENT_GLOBAL_BIT;
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}

820 821 822 823 824
static inline bool cpu_has_vmx_invvpid_single(void)
{
	return vmx_capability.vpid & VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT;
}

825 826 827 828 829
static inline bool cpu_has_vmx_invvpid_global(void)
{
	return vmx_capability.vpid & VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT;
}

830
static inline bool cpu_has_vmx_ept(void)
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{
832 833
	return vmcs_config.cpu_based_2nd_exec_ctrl &
		SECONDARY_EXEC_ENABLE_EPT;
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}

836
static inline bool cpu_has_vmx_unrestricted_guest(void)
837 838 839 840 841
{
	return vmcs_config.cpu_based_2nd_exec_ctrl &
		SECONDARY_EXEC_UNRESTRICTED_GUEST;
}

842
static inline bool cpu_has_vmx_ple(void)
843 844 845 846 847
{
	return vmcs_config.cpu_based_2nd_exec_ctrl &
		SECONDARY_EXEC_PAUSE_LOOP_EXITING;
}

848
static inline bool vm_need_virtualize_apic_accesses(struct kvm *kvm)
849
{
850
	return flexpriority_enabled && irqchip_in_kernel(kvm);
851 852
}

853
static inline bool cpu_has_vmx_vpid(void)
854
{
855 856
	return vmcs_config.cpu_based_2nd_exec_ctrl &
		SECONDARY_EXEC_ENABLE_VPID;
857 858
}

859
static inline bool cpu_has_vmx_rdtscp(void)
860 861 862 863 864
{
	return vmcs_config.cpu_based_2nd_exec_ctrl &
		SECONDARY_EXEC_RDTSCP;
}

865 866 867 868 869 870
static inline bool cpu_has_vmx_invpcid(void)
{
	return vmcs_config.cpu_based_2nd_exec_ctrl &
		SECONDARY_EXEC_ENABLE_INVPCID;
}

871
static inline bool cpu_has_virtual_nmis(void)
872 873 874 875
{
	return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS;
}

876 877 878 879 880 881
static inline bool cpu_has_vmx_wbinvd_exit(void)
{
	return vmcs_config.cpu_based_2nd_exec_ctrl &
		SECONDARY_EXEC_WBINVD_EXITING;
}

882 883 884 885 886
static inline bool report_flexpriority(void)
{
	return flexpriority_enabled;
}

887 888 889 890 891 892 893 894 895 896 897 898
static inline bool nested_cpu_has(struct vmcs12 *vmcs12, u32 bit)
{
	return vmcs12->cpu_based_vm_exec_control & bit;
}

static inline bool nested_cpu_has2(struct vmcs12 *vmcs12, u32 bit)
{
	return (vmcs12->cpu_based_vm_exec_control &
			CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) &&
		(vmcs12->secondary_vm_exec_control & bit);
}

899 900 901 902 903 904 905 906 907 908 909 910 911
static inline bool nested_cpu_has_virtual_nmis(struct vmcs12 *vmcs12,
	struct kvm_vcpu *vcpu)
{
	return vmcs12->pin_based_vm_exec_control & PIN_BASED_VIRTUAL_NMIS;
}

static inline bool is_exception(u32 intr_info)
{
	return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
		== (INTR_TYPE_HARD_EXCEPTION | INTR_INFO_VALID_MASK);
}

static void nested_vmx_vmexit(struct kvm_vcpu *vcpu);
912 913 914 915
static void nested_vmx_entry_failure(struct kvm_vcpu *vcpu,
			struct vmcs12 *vmcs12,
			u32 reason, unsigned long qualification);

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static int __find_msr_index(struct vcpu_vmx *vmx, u32 msr)
917 918 919
{
	int i;

920
	for (i = 0; i < vmx->nmsrs; ++i)
921
		if (vmx_msr_index[vmx->guest_msrs[i].index] == msr)
922 923 924 925
			return i;
	return -1;
}

926 927 928 929 930 931 932 933
static inline void __invvpid(int ext, u16 vpid, gva_t gva)
{
    struct {
	u64 vpid : 16;
	u64 rsvd : 48;
	u64 gva;
    } operand = { vpid, 0, gva };

934
    asm volatile (__ex(ASM_VMX_INVVPID)
935 936 937 938 939
		  /* CF==1 or ZF==1 --> rc = -1 */
		  "; ja 1f ; ud2 ; 1:"
		  : : "a"(&operand), "c"(ext) : "cc", "memory");
}

940 941 942 943 944 945
static inline void __invept(int ext, u64 eptp, gpa_t gpa)
{
	struct {
		u64 eptp, gpa;
	} operand = {eptp, gpa};

946
	asm volatile (__ex(ASM_VMX_INVEPT)
947 948 949 950 951
			/* CF==1 or ZF==1 --> rc = -1 */
			"; ja 1f ; ud2 ; 1:\n"
			: : "a" (&operand), "c" (ext) : "cc", "memory");
}

952
static struct shared_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr)
953 954 955
{
	int i;

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	i = __find_msr_index(vmx, msr);
957
	if (i >= 0)
958
		return &vmx->guest_msrs[i];
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	return NULL;
960 961
}

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static void vmcs_clear(struct vmcs *vmcs)
{
	u64 phys_addr = __pa(vmcs);
	u8 error;

967
	asm volatile (__ex(ASM_VMX_VMCLEAR_RAX) "; setna %0"
968
		      : "=qm"(error) : "a"(&phys_addr), "m"(phys_addr)
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		      : "cc", "memory");
	if (error)
		printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
		       vmcs, phys_addr);
}

975 976 977 978 979 980 981
static inline void loaded_vmcs_init(struct loaded_vmcs *loaded_vmcs)
{
	vmcs_clear(loaded_vmcs->vmcs);
	loaded_vmcs->cpu = -1;
	loaded_vmcs->launched = 0;
}

982 983 984 985 986 987
static void vmcs_load(struct vmcs *vmcs)
{
	u64 phys_addr = __pa(vmcs);
	u8 error;

	asm volatile (__ex(ASM_VMX_VMPTRLD_RAX) "; setna %0"
988
			: "=qm"(error) : "a"(&phys_addr), "m"(phys_addr)
989 990
			: "cc", "memory");
	if (error)
991
		printk(KERN_ERR "kvm: vmptrld %p/%llx failed\n",
992 993 994
		       vmcs, phys_addr);
}

995
static void __loaded_vmcs_clear(void *arg)
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{
997
	struct loaded_vmcs *loaded_vmcs = arg;
998
	int cpu = raw_smp_processor_id();
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1000 1001 1002
	if (loaded_vmcs->cpu != cpu)
		return; /* vcpu migration can race with cpu offline */
	if (per_cpu(current_vmcs, cpu) == loaded_vmcs->vmcs)
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		per_cpu(current_vmcs, cpu) = NULL;
1004 1005
	list_del(&loaded_vmcs->loaded_vmcss_on_cpu_link);
	loaded_vmcs_init(loaded_vmcs);
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}

1008
static void loaded_vmcs_clear(struct loaded_vmcs *loaded_vmcs)
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{
1010 1011 1012
	if (loaded_vmcs->cpu != -1)
		smp_call_function_single(
			loaded_vmcs->cpu, __loaded_vmcs_clear, loaded_vmcs, 1);
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}

1015
static inline void vpid_sync_vcpu_single(struct vcpu_vmx *vmx)
1016 1017 1018 1019
{
	if (vmx->vpid == 0)
		return;

1020 1021
	if (cpu_has_vmx_invvpid_single())
		__invvpid(VMX_VPID_EXTENT_SINGLE_CONTEXT, vmx->vpid, 0);
1022 1023
}

1024 1025 1026 1027 1028 1029 1030 1031 1032
static inline void vpid_sync_vcpu_global(void)
{
	if (cpu_has_vmx_invvpid_global())
		__invvpid(VMX_VPID_EXTENT_ALL_CONTEXT, 0, 0);
}

static inline void vpid_sync_context(struct vcpu_vmx *vmx)
{
	if (cpu_has_vmx_invvpid_single())
1033
		vpid_sync_vcpu_single(vmx);
1034 1035 1036 1037
	else
		vpid_sync_vcpu_global();
}

1038 1039 1040 1041 1042 1043 1044 1045
static inline void ept_sync_global(void)
{
	if (cpu_has_vmx_invept_global())
		__invept(VMX_EPT_EXTENT_GLOBAL, 0, 0);
}

static inline void ept_sync_context(u64 eptp)
{
1046
	if (enable_ept) {
1047 1048 1049 1050 1051 1052 1053 1054 1055
		if (cpu_has_vmx_invept_context())
			__invept(VMX_EPT_EXTENT_CONTEXT, eptp, 0);
		else
			ept_sync_global();
	}
}

static inline void ept_sync_individual_addr(u64 eptp, gpa_t gpa)
{
1056
	if (enable_ept) {
1057 1058 1059 1060 1061 1062 1063 1064
		if (cpu_has_vmx_invept_individual_addr())
			__invept(VMX_EPT_EXTENT_INDIVIDUAL_ADDR,
					eptp, gpa);
		else
			ept_sync_context(eptp);
	}
}

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static __always_inline unsigned long vmcs_readl(unsigned long field)
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{
1067
	unsigned long value;
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1069 1070
	asm volatile (__ex_clear(ASM_VMX_VMREAD_RDX_RAX, "%0")
		      : "=a"(value) : "d"(field) : "cc");
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	return value;
}

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static __always_inline u16 vmcs_read16(unsigned long field)
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{
	return vmcs_readl(field);
}

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static __always_inline u32 vmcs_read32(unsigned long field)
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{
	return vmcs_readl(field);
}

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static __always_inline u64 vmcs_read64(unsigned long field)
A
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1085
{
1086
#ifdef CONFIG_X86_64
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	return vmcs_readl(field);
#else
	return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
#endif
}

1093 1094 1095 1096 1097 1098 1099
static noinline void vmwrite_error(unsigned long field, unsigned long value)
{
	printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
	       field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
	dump_stack();
}

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static void vmcs_writel(unsigned long field, unsigned long value)
{
	u8 error;

1104
	asm volatile (__ex(ASM_VMX_VMWRITE_RAX_RDX) "; setna %0"
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		       : "=q"(error) : "a"(value), "d"(field) : "cc");
1106 1107
	if (unlikely(error))
		vmwrite_error(field, value);
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1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122
}

static void vmcs_write16(unsigned long field, u16 value)
{
	vmcs_writel(field, value);
}

static void vmcs_write32(unsigned long field, u32 value)
{
	vmcs_writel(field, value);
}

static void vmcs_write64(unsigned long field, u64 value)
{
	vmcs_writel(field, value);
1123
#ifndef CONFIG_X86_64
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	asm volatile ("");
	vmcs_writel(field+1, value >> 32);
#endif
}

1129 1130 1131 1132 1133 1134 1135 1136 1137 1138
static void vmcs_clear_bits(unsigned long field, u32 mask)
{
	vmcs_writel(field, vmcs_readl(field) & ~mask);
}

static void vmcs_set_bits(unsigned long field, u32 mask)
{
	vmcs_writel(field, vmcs_readl(field) | mask);
}

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static void vmx_segment_cache_clear(struct vcpu_vmx *vmx)
{
	vmx->segment_cache.bitmask = 0;
}

static bool vmx_segment_cache_test_set(struct vcpu_vmx *vmx, unsigned seg,
				       unsigned field)
{
	bool ret;
	u32 mask = 1 << (seg * SEG_FIELD_NR + field);

	if (!(vmx->vcpu.arch.regs_avail & (1 << VCPU_EXREG_SEGMENTS))) {
		vmx->vcpu.arch.regs_avail |= (1 << VCPU_EXREG_SEGMENTS);
		vmx->segment_cache.bitmask = 0;
	}
	ret = vmx->segment_cache.bitmask & mask;
	vmx->segment_cache.bitmask |= mask;
	return ret;
}

static u16 vmx_read_guest_seg_selector(struct vcpu_vmx *vmx, unsigned seg)
{
	u16 *p = &vmx->segment_cache.seg[seg].selector;

	if (!vmx_segment_cache_test_set(vmx, seg, SEG_FIELD_SEL))
		*p = vmcs_read16(kvm_vmx_segment_fields[seg].selector);
	return *p;
}

static ulong vmx_read_guest_seg_base(struct vcpu_vmx *vmx, unsigned seg)
{
	ulong *p = &vmx->segment_cache.seg[seg].base;

	if (!vmx_segment_cache_test_set(vmx, seg, SEG_FIELD_BASE))
		*p = vmcs_readl(kvm_vmx_segment_fields[seg].base);
	return *p;
}

static u32 vmx_read_guest_seg_limit(struct vcpu_vmx *vmx, unsigned seg)
{
	u32 *p = &vmx->segment_cache.seg[seg].limit;

	if (!vmx_segment_cache_test_set(vmx, seg, SEG_FIELD_LIMIT))
		*p = vmcs_read32(kvm_vmx_segment_fields[seg].limit);
	return *p;
}

static u32 vmx_read_guest_seg_ar(struct vcpu_vmx *vmx, unsigned seg)
{
	u32 *p = &vmx->segment_cache.seg[seg].ar;

	if (!vmx_segment_cache_test_set(vmx, seg, SEG_FIELD_AR))
		*p = vmcs_read32(kvm_vmx_segment_fields[seg].ar_bytes);
	return *p;
}

1195 1196 1197 1198
static void update_exception_bitmap(struct kvm_vcpu *vcpu)
{
	u32 eb;

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	eb = (1u << PF_VECTOR) | (1u << UD_VECTOR) | (1u << MC_VECTOR) |
	     (1u << NM_VECTOR) | (1u << DB_VECTOR);
	if ((vcpu->guest_debug &
	     (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP)) ==
	    (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP))
		eb |= 1u << BP_VECTOR;
1205
	if (to_vmx(vcpu)->rmode.vm86_active)
1206
		eb = ~0;
1207
	if (enable_ept)
1208
		eb &= ~(1u << PF_VECTOR); /* bypass_guest_pf = 0 */
1209 1210
	if (vcpu->fpu_active)
		eb &= ~(1u << NM_VECTOR);
1211 1212 1213 1214 1215 1216 1217 1218 1219

	/* When we are running a nested L2 guest and L1 specified for it a
	 * certain exception bitmap, we must trap the same exceptions and pass
	 * them to L1. When running L2, we will only handle the exceptions
	 * specified above if L1 did not want them.
	 */
	if (is_guest_mode(vcpu))
		eb |= get_vmcs12(vcpu)->exception_bitmap;

1220 1221 1222
	vmcs_write32(EXCEPTION_BITMAP, eb);
}

1223 1224 1225 1226 1227 1228 1229
static void clear_atomic_switch_msr_special(unsigned long entry,
		unsigned long exit)
{
	vmcs_clear_bits(VM_ENTRY_CONTROLS, entry);
	vmcs_clear_bits(VM_EXIT_CONTROLS, exit);
}

1230 1231 1232 1233 1234
static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr)
{
	unsigned i;
	struct msr_autoload *m = &vmx->msr_autoload;

1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250
	switch (msr) {
	case MSR_EFER:
		if (cpu_has_load_ia32_efer) {
			clear_atomic_switch_msr_special(VM_ENTRY_LOAD_IA32_EFER,
					VM_EXIT_LOAD_IA32_EFER);
			return;
		}
		break;
	case MSR_CORE_PERF_GLOBAL_CTRL:
		if (cpu_has_load_perf_global_ctrl) {
			clear_atomic_switch_msr_special(
					VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL,
					VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
			return;
		}
		break;
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1251 1252
	}

1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265
	for (i = 0; i < m->nr; ++i)
		if (m->guest[i].index == msr)
			break;

	if (i == m->nr)
		return;
	--m->nr;
	m->guest[i] = m->guest[m->nr];
	m->host[i] = m->host[m->nr];
	vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->nr);
	vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr);
}

1266 1267 1268 1269 1270 1271 1272 1273 1274 1275
static void add_atomic_switch_msr_special(unsigned long entry,
		unsigned long exit, unsigned long guest_val_vmcs,
		unsigned long host_val_vmcs, u64 guest_val, u64 host_val)
{
	vmcs_write64(guest_val_vmcs, guest_val);
	vmcs_write64(host_val_vmcs, host_val);
	vmcs_set_bits(VM_ENTRY_CONTROLS, entry);
	vmcs_set_bits(VM_EXIT_CONTROLS, exit);
}

1276 1277 1278 1279 1280 1281
static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr,
				  u64 guest_val, u64 host_val)
{
	unsigned i;
	struct msr_autoload *m = &vmx->msr_autoload;

1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303
	switch (msr) {
	case MSR_EFER:
		if (cpu_has_load_ia32_efer) {
			add_atomic_switch_msr_special(VM_ENTRY_LOAD_IA32_EFER,
					VM_EXIT_LOAD_IA32_EFER,
					GUEST_IA32_EFER,
					HOST_IA32_EFER,
					guest_val, host_val);
			return;
		}
		break;
	case MSR_CORE_PERF_GLOBAL_CTRL:
		if (cpu_has_load_perf_global_ctrl) {
			add_atomic_switch_msr_special(
					VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL,
					VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL,
					GUEST_IA32_PERF_GLOBAL_CTRL,
					HOST_IA32_PERF_GLOBAL_CTRL,
					guest_val, host_val);
			return;
		}
		break;
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	}

1306 1307 1308 1309
	for (i = 0; i < m->nr; ++i)
		if (m->guest[i].index == msr)
			break;

1310 1311 1312 1313 1314
	if (i == NR_AUTOLOAD_MSRS) {
		printk_once(KERN_WARNING"Not enough mst switch entries. "
				"Can't add msr %x\n", msr);
		return;
	} else if (i == m->nr) {
1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325
		++m->nr;
		vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->nr);
		vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr);
	}

	m->guest[i].index = msr;
	m->guest[i].value = guest_val;
	m->host[i].index = msr;
	m->host[i].value = host_val;
}

1326 1327 1328 1329 1330
static void reload_tss(void)
{
	/*
	 * VT restores TR but not its size.  Useless.
	 */
1331
	struct desc_ptr *gdt = &__get_cpu_var(host_gdt);
1332
	struct desc_struct *descs;
1333

1334
	descs = (void *)gdt->address;
1335 1336 1337 1338
	descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
	load_TR_desc();
}

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static bool update_transition_efer(struct vcpu_vmx *vmx, int efer_offset)
1340
{
R
Roel Kluin 已提交
1341
	u64 guest_efer;
1342 1343
	u64 ignore_bits;

1344
	guest_efer = vmx->vcpu.arch.efer;
R
Roel Kluin 已提交
1345

1346
	/*
G
Guo Chao 已提交
1347
	 * NX is emulated; LMA and LME handled by hardware; SCE meaningless
1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358
	 * outside long mode
	 */
	ignore_bits = EFER_NX | EFER_SCE;
#ifdef CONFIG_X86_64
	ignore_bits |= EFER_LMA | EFER_LME;
	/* SCE is meaningful only in long mode on Intel */
	if (guest_efer & EFER_LMA)
		ignore_bits &= ~(u64)EFER_SCE;
#endif
	guest_efer &= ~ignore_bits;
	guest_efer |= host_efer & ignore_bits;
1359
	vmx->guest_msrs[efer_offset].data = guest_efer;
1360
	vmx->guest_msrs[efer_offset].mask = ~ignore_bits;
1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371

	clear_atomic_switch_msr(vmx, MSR_EFER);
	/* On ept, can't emulate nx, and must switch nx atomically */
	if (enable_ept && ((vmx->vcpu.arch.efer ^ host_efer) & EFER_NX)) {
		guest_efer = vmx->vcpu.arch.efer;
		if (!(guest_efer & EFER_LMA))
			guest_efer &= ~EFER_LME;
		add_atomic_switch_msr(vmx, MSR_EFER, guest_efer, host_efer);
		return false;
	}

1372
	return true;
1373 1374
}

1375 1376
static unsigned long segment_base(u16 selector)
{
1377
	struct desc_ptr *gdt = &__get_cpu_var(host_gdt);
1378 1379 1380 1381 1382 1383 1384
	struct desc_struct *d;
	unsigned long table_base;
	unsigned long v;

	if (!(selector & ~3))
		return 0;

1385
	table_base = gdt->address;
1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410

	if (selector & 4) {           /* from ldt */
		u16 ldt_selector = kvm_read_ldt();

		if (!(ldt_selector & ~3))
			return 0;

		table_base = segment_base(ldt_selector);
	}
	d = (struct desc_struct *)(table_base + (selector & ~7));
	v = get_desc_base(d);
#ifdef CONFIG_X86_64
       if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
               v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
#endif
	return v;
}

static inline unsigned long kvm_read_tr_base(void)
{
	u16 tr;
	asm("str %0" : "=g"(tr));
	return segment_base(tr);
}

1411
static void vmx_save_host_state(struct kvm_vcpu *vcpu)
1412
{
1413
	struct vcpu_vmx *vmx = to_vmx(vcpu);
1414
	int i;
1415

1416
	if (vmx->host_state.loaded)
1417 1418
		return;

1419
	vmx->host_state.loaded = 1;
1420 1421 1422 1423
	/*
	 * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
	 * allow segment selectors with cpl > 0 or ti == 1.
	 */
1424
	vmx->host_state.ldt_sel = kvm_read_ldt();
1425
	vmx->host_state.gs_ldt_reload_needed = vmx->host_state.ldt_sel;
1426
	savesegment(fs, vmx->host_state.fs_sel);
1427
	if (!(vmx->host_state.fs_sel & 7)) {
1428
		vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
1429 1430
		vmx->host_state.fs_reload_needed = 0;
	} else {
1431
		vmcs_write16(HOST_FS_SELECTOR, 0);
1432
		vmx->host_state.fs_reload_needed = 1;
1433
	}
1434
	savesegment(gs, vmx->host_state.gs_sel);
1435 1436
	if (!(vmx->host_state.gs_sel & 7))
		vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel);
1437 1438
	else {
		vmcs_write16(HOST_GS_SELECTOR, 0);
1439
		vmx->host_state.gs_ldt_reload_needed = 1;
1440 1441
	}

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#ifdef CONFIG_X86_64
	savesegment(ds, vmx->host_state.ds_sel);
	savesegment(es, vmx->host_state.es_sel);
#endif

1447 1448 1449 1450
#ifdef CONFIG_X86_64
	vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
	vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
#else
1451 1452
	vmcs_writel(HOST_FS_BASE, segment_base(vmx->host_state.fs_sel));
	vmcs_writel(HOST_GS_BASE, segment_base(vmx->host_state.gs_sel));
1453
#endif
1454 1455

#ifdef CONFIG_X86_64
1456 1457
	rdmsrl(MSR_KERNEL_GS_BASE, vmx->msr_host_kernel_gs_base);
	if (is_long_mode(&vmx->vcpu))
1458
		wrmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base);
1459
#endif
1460 1461
	for (i = 0; i < vmx->save_nmsrs; ++i)
		kvm_set_shared_msr(vmx->guest_msrs[i].index,
1462 1463
				   vmx->guest_msrs[i].data,
				   vmx->guest_msrs[i].mask);
1464 1465
}

1466
static void __vmx_load_host_state(struct vcpu_vmx *vmx)
1467
{
1468
	if (!vmx->host_state.loaded)
1469 1470
		return;

1471
	++vmx->vcpu.stat.host_state_reload;
1472
	vmx->host_state.loaded = 0;
1473 1474 1475 1476
#ifdef CONFIG_X86_64
	if (is_long_mode(&vmx->vcpu))
		rdmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base);
#endif
1477
	if (vmx->host_state.gs_ldt_reload_needed) {
1478
		kvm_load_ldt(vmx->host_state.ldt_sel);
1479
#ifdef CONFIG_X86_64
1480 1481 1482
		load_gs_index(vmx->host_state.gs_sel);
#else
		loadsegment(gs, vmx->host_state.gs_sel);
1483 1484
#endif
	}
1485 1486
	if (vmx->host_state.fs_reload_needed)
		loadsegment(fs, vmx->host_state.fs_sel);
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#ifdef CONFIG_X86_64
	if (unlikely(vmx->host_state.ds_sel | vmx->host_state.es_sel)) {
		loadsegment(ds, vmx->host_state.ds_sel);
		loadsegment(es, vmx->host_state.es_sel);
	}
#endif
1493
	reload_tss();
1494
#ifdef CONFIG_X86_64
1495
	wrmsrl(MSR_KERNEL_GS_BASE, vmx->msr_host_kernel_gs_base);
1496
#endif
1497
	if (user_has_fpu())
1498
		clts();
1499
	load_gdt(&__get_cpu_var(host_gdt));
1500 1501
}

1502 1503 1504 1505 1506 1507 1508
static void vmx_load_host_state(struct vcpu_vmx *vmx)
{
	preempt_disable();
	__vmx_load_host_state(vmx);
	preempt_enable();
}

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/*
 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 * vcpu mutex is already taken.
 */
1513
static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
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{
1515
	struct vcpu_vmx *vmx = to_vmx(vcpu);
1516
	u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
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1518 1519
	if (!vmm_exclusive)
		kvm_cpu_vmxon(phys_addr);
1520 1521
	else if (vmx->loaded_vmcs->cpu != cpu)
		loaded_vmcs_clear(vmx->loaded_vmcs);
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Avi Kivity 已提交
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1523 1524 1525
	if (per_cpu(current_vmcs, cpu) != vmx->loaded_vmcs->vmcs) {
		per_cpu(current_vmcs, cpu) = vmx->loaded_vmcs->vmcs;
		vmcs_load(vmx->loaded_vmcs->vmcs);
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	}

1528
	if (vmx->loaded_vmcs->cpu != cpu) {
1529
		struct desc_ptr *gdt = &__get_cpu_var(host_gdt);
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1530 1531
		unsigned long sysenter_esp;

1532
		kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
1533
		local_irq_disable();
1534 1535
		list_add(&vmx->loaded_vmcs->loaded_vmcss_on_cpu_link,
			 &per_cpu(loaded_vmcss_on_cpu, cpu));
1536 1537
		local_irq_enable();

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1538 1539 1540 1541
		/*
		 * Linux uses per-cpu TSS and GDT, so set these when switching
		 * processors.
		 */
1542
		vmcs_writel(HOST_TR_BASE, kvm_read_tr_base()); /* 22.2.4 */
1543
		vmcs_writel(HOST_GDTR_BASE, gdt->address);   /* 22.2.4 */
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1544 1545 1546

		rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
		vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
1547
		vmx->loaded_vmcs->cpu = cpu;
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	}
}

static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
{
1553
	__vmx_load_host_state(to_vmx(vcpu));
1554
	if (!vmm_exclusive) {
1555 1556
		__loaded_vmcs_clear(to_vmx(vcpu)->loaded_vmcs);
		vcpu->cpu = -1;
1557 1558
		kvm_cpu_vmxoff();
	}
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1559 1560
}

1561 1562
static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
{
1563 1564
	ulong cr0;

1565 1566 1567
	if (vcpu->fpu_active)
		return;
	vcpu->fpu_active = 1;
1568 1569 1570 1571
	cr0 = vmcs_readl(GUEST_CR0);
	cr0 &= ~(X86_CR0_TS | X86_CR0_MP);
	cr0 |= kvm_read_cr0_bits(vcpu, X86_CR0_TS | X86_CR0_MP);
	vmcs_writel(GUEST_CR0, cr0);
1572
	update_exception_bitmap(vcpu);
1573
	vcpu->arch.cr0_guest_owned_bits = X86_CR0_TS;
1574 1575 1576
	if (is_guest_mode(vcpu))
		vcpu->arch.cr0_guest_owned_bits &=
			~get_vmcs12(vcpu)->cr0_guest_host_mask;
1577
	vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
1578 1579
}

1580 1581
static void vmx_decache_cr0_guest_bits(struct kvm_vcpu *vcpu);

1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597
/*
 * Return the cr0 value that a nested guest would read. This is a combination
 * of the real cr0 used to run the guest (guest_cr0), and the bits shadowed by
 * its hypervisor (cr0_read_shadow).
 */
static inline unsigned long nested_read_cr0(struct vmcs12 *fields)
{
	return (fields->guest_cr0 & ~fields->cr0_guest_host_mask) |
		(fields->cr0_read_shadow & fields->cr0_guest_host_mask);
}
static inline unsigned long nested_read_cr4(struct vmcs12 *fields)
{
	return (fields->guest_cr4 & ~fields->cr4_guest_host_mask) |
		(fields->cr4_read_shadow & fields->cr4_guest_host_mask);
}

1598 1599
static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
{
1600 1601 1602
	/* Note that there is no vcpu->fpu_active = 0 here. The caller must
	 * set this *before* calling this function.
	 */
1603
	vmx_decache_cr0_guest_bits(vcpu);
1604
	vmcs_set_bits(GUEST_CR0, X86_CR0_TS | X86_CR0_MP);
1605
	update_exception_bitmap(vcpu);
1606 1607
	vcpu->arch.cr0_guest_owned_bits = 0;
	vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622
	if (is_guest_mode(vcpu)) {
		/*
		 * L1's specified read shadow might not contain the TS bit,
		 * so now that we turned on shadowing of this bit, we need to
		 * set this bit of the shadow. Like in nested_vmx_run we need
		 * nested_read_cr0(vmcs12), but vmcs12->guest_cr0 is not yet
		 * up-to-date here because we just decached cr0.TS (and we'll
		 * only update vmcs12->guest_cr0 on nested exit).
		 */
		struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
		vmcs12->guest_cr0 = (vmcs12->guest_cr0 & ~X86_CR0_TS) |
			(vcpu->arch.cr0 & X86_CR0_TS);
		vmcs_writel(CR0_READ_SHADOW, nested_read_cr0(vmcs12));
	} else
		vmcs_writel(CR0_READ_SHADOW, vcpu->arch.cr0);
1623 1624
}

A
Avi Kivity 已提交
1625 1626
static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
{
1627
	unsigned long rflags, save_rflags;
1628

A
Avi Kivity 已提交
1629 1630 1631 1632 1633 1634 1635 1636 1637
	if (!test_bit(VCPU_EXREG_RFLAGS, (ulong *)&vcpu->arch.regs_avail)) {
		__set_bit(VCPU_EXREG_RFLAGS, (ulong *)&vcpu->arch.regs_avail);
		rflags = vmcs_readl(GUEST_RFLAGS);
		if (to_vmx(vcpu)->rmode.vm86_active) {
			rflags &= RMODE_GUEST_OWNED_EFLAGS_BITS;
			save_rflags = to_vmx(vcpu)->rmode.save_rflags;
			rflags |= save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS;
		}
		to_vmx(vcpu)->rflags = rflags;
1638
	}
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1639
	return to_vmx(vcpu)->rflags;
A
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1640 1641 1642 1643
}

static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
{
A
Avi Kivity 已提交
1644
	__set_bit(VCPU_EXREG_RFLAGS, (ulong *)&vcpu->arch.regs_avail);
A
Avi Kivity 已提交
1645
	__clear_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail);
A
Avi Kivity 已提交
1646
	to_vmx(vcpu)->rflags = rflags;
1647 1648
	if (to_vmx(vcpu)->rmode.vm86_active) {
		to_vmx(vcpu)->rmode.save_rflags = rflags;
1649
		rflags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
1650
	}
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Avi Kivity 已提交
1651 1652 1653
	vmcs_writel(GUEST_RFLAGS, rflags);
}

1654 1655 1656 1657 1658 1659
static u32 vmx_get_interrupt_shadow(struct kvm_vcpu *vcpu, int mask)
{
	u32 interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
	int ret = 0;

	if (interruptibility & GUEST_INTR_STATE_STI)
1660
		ret |= KVM_X86_SHADOW_INT_STI;
1661
	if (interruptibility & GUEST_INTR_STATE_MOV_SS)
1662
		ret |= KVM_X86_SHADOW_INT_MOV_SS;
1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673

	return ret & mask;
}

static void vmx_set_interrupt_shadow(struct kvm_vcpu *vcpu, int mask)
{
	u32 interruptibility_old = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
	u32 interruptibility = interruptibility_old;

	interruptibility &= ~(GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS);

1674
	if (mask & KVM_X86_SHADOW_INT_MOV_SS)
1675
		interruptibility |= GUEST_INTR_STATE_MOV_SS;
1676
	else if (mask & KVM_X86_SHADOW_INT_STI)
1677 1678 1679 1680 1681 1682
		interruptibility |= GUEST_INTR_STATE_STI;

	if ((interruptibility != interruptibility_old))
		vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, interruptibility);
}

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Avi Kivity 已提交
1683 1684 1685 1686
static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
{
	unsigned long rip;

1687
	rip = kvm_rip_read(vcpu);
A
Avi Kivity 已提交
1688
	rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
1689
	kvm_rip_write(vcpu, rip);
A
Avi Kivity 已提交
1690

1691 1692
	/* skipping an emulated instruction also counts */
	vmx_set_interrupt_shadow(vcpu, 0);
A
Avi Kivity 已提交
1693 1694
}

1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706
/*
 * KVM wants to inject page-faults which it got to the guest. This function
 * checks whether in a nested guest, we need to inject them to L1 or L2.
 * This function assumes it is called with the exit reason in vmcs02 being
 * a #PF exception (this is the only case in which KVM injects a #PF when L2
 * is running).
 */
static int nested_pf_handled(struct kvm_vcpu *vcpu)
{
	struct vmcs12 *vmcs12 = get_vmcs12(vcpu);

	/* TODO: also check PFEC_MATCH/MASK, not just EB.PF. */
1707
	if (!(vmcs12->exception_bitmap & (1u << PF_VECTOR)))
1708 1709 1710 1711 1712 1713
		return 0;

	nested_vmx_vmexit(vcpu);
	return 1;
}

1714
static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
1715 1716
				bool has_error_code, u32 error_code,
				bool reinject)
1717
{
1718
	struct vcpu_vmx *vmx = to_vmx(vcpu);
1719
	u32 intr_info = nr | INTR_INFO_VALID_MASK;
1720

1721 1722 1723 1724
	if (nr == PF_VECTOR && is_guest_mode(vcpu) &&
		nested_pf_handled(vcpu))
		return;

1725
	if (has_error_code) {
1726
		vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
1727 1728
		intr_info |= INTR_INFO_DELIVER_CODE_MASK;
	}
1729

1730
	if (vmx->rmode.vm86_active) {
1731 1732 1733 1734
		int inc_eip = 0;
		if (kvm_exception_is_soft(nr))
			inc_eip = vcpu->arch.event_exit_inst_len;
		if (kvm_inject_realmode_interrupt(vcpu, nr, inc_eip) != EMULATE_DONE)
1735
			kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
1736 1737 1738
		return;
	}

1739 1740 1741
	if (kvm_exception_is_soft(nr)) {
		vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
			     vmx->vcpu.arch.event_exit_inst_len);
1742 1743 1744 1745 1746
		intr_info |= INTR_TYPE_SOFT_EXCEPTION;
	} else
		intr_info |= INTR_TYPE_HARD_EXCEPTION;

	vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info);
1747 1748
}

1749 1750 1751 1752 1753
static bool vmx_rdtscp_supported(void)
{
	return cpu_has_vmx_rdtscp();
}

1754 1755 1756 1757 1758
static bool vmx_invpcid_supported(void)
{
	return cpu_has_vmx_invpcid() && enable_ept;
}

1759 1760 1761
/*
 * Swap MSR entry in host/guest MSR entry array.
 */
R
Rusty Russell 已提交
1762
static void move_msr_up(struct vcpu_vmx *vmx, int from, int to)
1763
{
1764
	struct shared_msr_entry tmp;
1765 1766 1767 1768

	tmp = vmx->guest_msrs[to];
	vmx->guest_msrs[to] = vmx->guest_msrs[from];
	vmx->guest_msrs[from] = tmp;
1769 1770
}

1771 1772 1773 1774 1775
/*
 * Set up the vmcs to automatically save and restore system
 * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 * mode, as fiddling with msrs is very expensive.
 */
R
Rusty Russell 已提交
1776
static void setup_msrs(struct vcpu_vmx *vmx)
1777
{
1778
	int save_nmsrs, index;
1779
	unsigned long *msr_bitmap;
1780

1781 1782
	save_nmsrs = 0;
#ifdef CONFIG_X86_64
R
Rusty Russell 已提交
1783 1784
	if (is_long_mode(&vmx->vcpu)) {
		index = __find_msr_index(vmx, MSR_SYSCALL_MASK);
1785
		if (index >= 0)
R
Rusty Russell 已提交
1786 1787
			move_msr_up(vmx, index, save_nmsrs++);
		index = __find_msr_index(vmx, MSR_LSTAR);
1788
		if (index >= 0)
R
Rusty Russell 已提交
1789 1790
			move_msr_up(vmx, index, save_nmsrs++);
		index = __find_msr_index(vmx, MSR_CSTAR);
1791
		if (index >= 0)
R
Rusty Russell 已提交
1792
			move_msr_up(vmx, index, save_nmsrs++);
1793 1794 1795
		index = __find_msr_index(vmx, MSR_TSC_AUX);
		if (index >= 0 && vmx->rdtscp_enabled)
			move_msr_up(vmx, index, save_nmsrs++);
1796
		/*
B
Brian Gerst 已提交
1797
		 * MSR_STAR is only needed on long mode guests, and only
1798 1799
		 * if efer.sce is enabled.
		 */
B
Brian Gerst 已提交
1800
		index = __find_msr_index(vmx, MSR_STAR);
1801
		if ((index >= 0) && (vmx->vcpu.arch.efer & EFER_SCE))
R
Rusty Russell 已提交
1802
			move_msr_up(vmx, index, save_nmsrs++);
1803 1804
	}
#endif
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Avi Kivity 已提交
1805 1806
	index = __find_msr_index(vmx, MSR_EFER);
	if (index >= 0 && update_transition_efer(vmx, index))
1807
		move_msr_up(vmx, index, save_nmsrs++);
1808

1809
	vmx->save_nmsrs = save_nmsrs;
1810 1811 1812 1813 1814 1815 1816 1817 1818

	if (cpu_has_vmx_msr_bitmap()) {
		if (is_long_mode(&vmx->vcpu))
			msr_bitmap = vmx_msr_bitmap_longmode;
		else
			msr_bitmap = vmx_msr_bitmap_legacy;

		vmcs_write64(MSR_BITMAP, __pa(msr_bitmap));
	}
1819 1820
}

A
Avi Kivity 已提交
1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833
/*
 * reads and returns guest's timestamp counter "register"
 * guest_tsc = host_tsc + tsc_offset    -- 21.3
 */
static u64 guest_read_tsc(void)
{
	u64 host_tsc, tsc_offset;

	rdtscll(host_tsc);
	tsc_offset = vmcs_read64(TSC_OFFSET);
	return host_tsc + tsc_offset;
}

N
Nadav Har'El 已提交
1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848
/*
 * Like guest_read_tsc, but always returns L1's notion of the timestamp
 * counter, even if a nested guest (L2) is currently running.
 */
u64 vmx_read_l1_tsc(struct kvm_vcpu *vcpu)
{
	u64 host_tsc, tsc_offset;

	rdtscll(host_tsc);
	tsc_offset = is_guest_mode(vcpu) ?
		to_vmx(vcpu)->nested.vmcs01_tsc_offset :
		vmcs_read64(TSC_OFFSET);
	return host_tsc + tsc_offset;
}

1849
/*
1850 1851
 * Engage any workarounds for mis-matched TSC rates.  Currently limited to
 * software catchup for faster rates on slower CPUs.
1852
 */
1853
static void vmx_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1854
{
1855 1856 1857 1858 1859 1860 1861 1862
	if (!scale)
		return;

	if (user_tsc_khz > tsc_khz) {
		vcpu->arch.tsc_catchup = 1;
		vcpu->arch.tsc_always_catchup = 1;
	} else
		WARN(1, "user requested TSC rate below hardware speed\n");
1863 1864
}

A
Avi Kivity 已提交
1865
/*
1866
 * writes 'offset' into guest's timestamp counter offset register
A
Avi Kivity 已提交
1867
 */
1868
static void vmx_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
A
Avi Kivity 已提交
1869
{
1870
	if (is_guest_mode(vcpu)) {
1871
		/*
1872 1873 1874 1875
		 * We're here if L1 chose not to trap WRMSR to TSC. According
		 * to the spec, this should set L1's TSC; The offset that L1
		 * set for L2 remains unchanged, and still needs to be added
		 * to the newly set TSC to get L2's TSC.
1876
		 */
1877 1878 1879 1880 1881 1882 1883 1884 1885 1886
		struct vmcs12 *vmcs12;
		to_vmx(vcpu)->nested.vmcs01_tsc_offset = offset;
		/* recalculate vmcs02.TSC_OFFSET: */
		vmcs12 = get_vmcs12(vcpu);
		vmcs_write64(TSC_OFFSET, offset +
			(nested_cpu_has(vmcs12, CPU_BASED_USE_TSC_OFFSETING) ?
			 vmcs12->tsc_offset : 0));
	} else {
		vmcs_write64(TSC_OFFSET, offset);
	}
A
Avi Kivity 已提交
1887 1888
}

1889
static void vmx_adjust_tsc_offset(struct kvm_vcpu *vcpu, s64 adjustment, bool host)
Z
Zachary Amsden 已提交
1890 1891 1892
{
	u64 offset = vmcs_read64(TSC_OFFSET);
	vmcs_write64(TSC_OFFSET, offset + adjustment);
1893 1894 1895 1896
	if (is_guest_mode(vcpu)) {
		/* Even when running L2, the adjustment needs to apply to L1 */
		to_vmx(vcpu)->nested.vmcs01_tsc_offset += adjustment;
	}
Z
Zachary Amsden 已提交
1897 1898
}

1899 1900 1901 1902 1903
static u64 vmx_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
{
	return target_tsc - native_read_tsc();
}

1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920
static bool guest_cpuid_has_vmx(struct kvm_vcpu *vcpu)
{
	struct kvm_cpuid_entry2 *best = kvm_find_cpuid_entry(vcpu, 1, 0);
	return best && (best->ecx & (1 << (X86_FEATURE_VMX & 31)));
}

/*
 * nested_vmx_allowed() checks whether a guest should be allowed to use VMX
 * instructions and MSRs (i.e., nested VMX). Nested VMX is disabled for
 * all guests if the "nested" module option is off, and can also be disabled
 * for a single guest by disabling its VMX cpuid bit.
 */
static inline bool nested_vmx_allowed(struct kvm_vcpu *vcpu)
{
	return nested && guest_cpuid_has_vmx(vcpu);
}

1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966
/*
 * nested_vmx_setup_ctls_msrs() sets up variables containing the values to be
 * returned for the various VMX controls MSRs when nested VMX is enabled.
 * The same values should also be used to verify that vmcs12 control fields are
 * valid during nested entry from L1 to L2.
 * Each of these control msrs has a low and high 32-bit half: A low bit is on
 * if the corresponding bit in the (32-bit) control field *must* be on, and a
 * bit in the high half is on if the corresponding bit in the control field
 * may be on. See also vmx_control_verify().
 * TODO: allow these variables to be modified (downgraded) by module options
 * or other means.
 */
static u32 nested_vmx_procbased_ctls_low, nested_vmx_procbased_ctls_high;
static u32 nested_vmx_secondary_ctls_low, nested_vmx_secondary_ctls_high;
static u32 nested_vmx_pinbased_ctls_low, nested_vmx_pinbased_ctls_high;
static u32 nested_vmx_exit_ctls_low, nested_vmx_exit_ctls_high;
static u32 nested_vmx_entry_ctls_low, nested_vmx_entry_ctls_high;
static __init void nested_vmx_setup_ctls_msrs(void)
{
	/*
	 * Note that as a general rule, the high half of the MSRs (bits in
	 * the control fields which may be 1) should be initialized by the
	 * intersection of the underlying hardware's MSR (i.e., features which
	 * can be supported) and the list of features we want to expose -
	 * because they are known to be properly supported in our code.
	 * Also, usually, the low half of the MSRs (bits which must be 1) can
	 * be set to 0, meaning that L1 may turn off any of these bits. The
	 * reason is that if one of these bits is necessary, it will appear
	 * in vmcs01 and prepare_vmcs02, when it bitwise-or's the control
	 * fields of vmcs01 and vmcs02, will turn these bits off - and
	 * nested_vmx_exit_handled() will not pass related exits to L1.
	 * These rules have exceptions below.
	 */

	/* pin-based controls */
	/*
	 * According to the Intel spec, if bit 55 of VMX_BASIC is off (as it is
	 * in our case), bits 1, 2 and 4 (i.e., 0x16) must be 1 in this MSR.
	 */
	nested_vmx_pinbased_ctls_low = 0x16 ;
	nested_vmx_pinbased_ctls_high = 0x16 |
		PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING |
		PIN_BASED_VIRTUAL_NMIS;

	/* exit controls */
	nested_vmx_exit_ctls_low = 0;
1967
	/* Note that guest use of VM_EXIT_ACK_INTR_ON_EXIT is not supported. */
1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994
#ifdef CONFIG_X86_64
	nested_vmx_exit_ctls_high = VM_EXIT_HOST_ADDR_SPACE_SIZE;
#else
	nested_vmx_exit_ctls_high = 0;
#endif

	/* entry controls */
	rdmsr(MSR_IA32_VMX_ENTRY_CTLS,
		nested_vmx_entry_ctls_low, nested_vmx_entry_ctls_high);
	nested_vmx_entry_ctls_low = 0;
	nested_vmx_entry_ctls_high &=
		VM_ENTRY_LOAD_IA32_PAT | VM_ENTRY_IA32E_MODE;

	/* cpu-based controls */
	rdmsr(MSR_IA32_VMX_PROCBASED_CTLS,
		nested_vmx_procbased_ctls_low, nested_vmx_procbased_ctls_high);
	nested_vmx_procbased_ctls_low = 0;
	nested_vmx_procbased_ctls_high &=
		CPU_BASED_VIRTUAL_INTR_PENDING | CPU_BASED_USE_TSC_OFFSETING |
		CPU_BASED_HLT_EXITING | CPU_BASED_INVLPG_EXITING |
		CPU_BASED_MWAIT_EXITING | CPU_BASED_CR3_LOAD_EXITING |
		CPU_BASED_CR3_STORE_EXITING |
#ifdef CONFIG_X86_64
		CPU_BASED_CR8_LOAD_EXITING | CPU_BASED_CR8_STORE_EXITING |
#endif
		CPU_BASED_MOV_DR_EXITING | CPU_BASED_UNCOND_IO_EXITING |
		CPU_BASED_USE_IO_BITMAPS | CPU_BASED_MONITOR_EXITING |
1995
		CPU_BASED_RDPMC_EXITING | CPU_BASED_RDTSC_EXITING |
1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134
		CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
	/*
	 * We can allow some features even when not supported by the
	 * hardware. For example, L1 can specify an MSR bitmap - and we
	 * can use it to avoid exits to L1 - even when L0 runs L2
	 * without MSR bitmaps.
	 */
	nested_vmx_procbased_ctls_high |= CPU_BASED_USE_MSR_BITMAPS;

	/* secondary cpu-based controls */
	rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
		nested_vmx_secondary_ctls_low, nested_vmx_secondary_ctls_high);
	nested_vmx_secondary_ctls_low = 0;
	nested_vmx_secondary_ctls_high &=
		SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
}

static inline bool vmx_control_verify(u32 control, u32 low, u32 high)
{
	/*
	 * Bits 0 in high must be 0, and bits 1 in low must be 1.
	 */
	return ((control & high) | low) == control;
}

static inline u64 vmx_control_msr(u32 low, u32 high)
{
	return low | ((u64)high << 32);
}

/*
 * If we allow our guest to use VMX instructions (i.e., nested VMX), we should
 * also let it use VMX-specific MSRs.
 * vmx_get_vmx_msr() and vmx_set_vmx_msr() return 1 when we handled a
 * VMX-specific MSR, or 0 when we haven't (and the caller should handle it
 * like all other MSRs).
 */
static int vmx_get_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
{
	if (!nested_vmx_allowed(vcpu) && msr_index >= MSR_IA32_VMX_BASIC &&
		     msr_index <= MSR_IA32_VMX_TRUE_ENTRY_CTLS) {
		/*
		 * According to the spec, processors which do not support VMX
		 * should throw a #GP(0) when VMX capability MSRs are read.
		 */
		kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
		return 1;
	}

	switch (msr_index) {
	case MSR_IA32_FEATURE_CONTROL:
		*pdata = 0;
		break;
	case MSR_IA32_VMX_BASIC:
		/*
		 * This MSR reports some information about VMX support. We
		 * should return information about the VMX we emulate for the
		 * guest, and the VMCS structure we give it - not about the
		 * VMX support of the underlying hardware.
		 */
		*pdata = VMCS12_REVISION |
			   ((u64)VMCS12_SIZE << VMX_BASIC_VMCS_SIZE_SHIFT) |
			   (VMX_BASIC_MEM_TYPE_WB << VMX_BASIC_MEM_TYPE_SHIFT);
		break;
	case MSR_IA32_VMX_TRUE_PINBASED_CTLS:
	case MSR_IA32_VMX_PINBASED_CTLS:
		*pdata = vmx_control_msr(nested_vmx_pinbased_ctls_low,
					nested_vmx_pinbased_ctls_high);
		break;
	case MSR_IA32_VMX_TRUE_PROCBASED_CTLS:
	case MSR_IA32_VMX_PROCBASED_CTLS:
		*pdata = vmx_control_msr(nested_vmx_procbased_ctls_low,
					nested_vmx_procbased_ctls_high);
		break;
	case MSR_IA32_VMX_TRUE_EXIT_CTLS:
	case MSR_IA32_VMX_EXIT_CTLS:
		*pdata = vmx_control_msr(nested_vmx_exit_ctls_low,
					nested_vmx_exit_ctls_high);
		break;
	case MSR_IA32_VMX_TRUE_ENTRY_CTLS:
	case MSR_IA32_VMX_ENTRY_CTLS:
		*pdata = vmx_control_msr(nested_vmx_entry_ctls_low,
					nested_vmx_entry_ctls_high);
		break;
	case MSR_IA32_VMX_MISC:
		*pdata = 0;
		break;
	/*
	 * These MSRs specify bits which the guest must keep fixed (on or off)
	 * while L1 is in VMXON mode (in L1's root mode, or running an L2).
	 * We picked the standard core2 setting.
	 */
#define VMXON_CR0_ALWAYSON	(X86_CR0_PE | X86_CR0_PG | X86_CR0_NE)
#define VMXON_CR4_ALWAYSON	X86_CR4_VMXE
	case MSR_IA32_VMX_CR0_FIXED0:
		*pdata = VMXON_CR0_ALWAYSON;
		break;
	case MSR_IA32_VMX_CR0_FIXED1:
		*pdata = -1ULL;
		break;
	case MSR_IA32_VMX_CR4_FIXED0:
		*pdata = VMXON_CR4_ALWAYSON;
		break;
	case MSR_IA32_VMX_CR4_FIXED1:
		*pdata = -1ULL;
		break;
	case MSR_IA32_VMX_VMCS_ENUM:
		*pdata = 0x1f;
		break;
	case MSR_IA32_VMX_PROCBASED_CTLS2:
		*pdata = vmx_control_msr(nested_vmx_secondary_ctls_low,
					nested_vmx_secondary_ctls_high);
		break;
	case MSR_IA32_VMX_EPT_VPID_CAP:
		/* Currently, no nested ept or nested vpid */
		*pdata = 0;
		break;
	default:
		return 0;
	}

	return 1;
}

static int vmx_set_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
{
	if (!nested_vmx_allowed(vcpu))
		return 0;

	if (msr_index == MSR_IA32_FEATURE_CONTROL)
		/* TODO: the right thing. */
		return 1;
	/*
	 * No need to treat VMX capability MSRs specially: If we don't handle
	 * them, handle_wrmsr will #GP(0), which is correct (they are readonly)
	 */
	return 0;
}

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/*
 * Reads an msr value (of 'msr_index') into 'pdata'.
 * Returns 0 on success, non-0 otherwise.
 * Assumes vcpu_load() was already called.
 */
static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
{
	u64 data;
2143
	struct shared_msr_entry *msr;
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2144 2145 2146 2147 2148 2149 2150

	if (!pdata) {
		printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
		return -EINVAL;
	}

	switch (msr_index) {
2151
#ifdef CONFIG_X86_64
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2152 2153 2154 2155 2156 2157
	case MSR_FS_BASE:
		data = vmcs_readl(GUEST_FS_BASE);
		break;
	case MSR_GS_BASE:
		data = vmcs_readl(GUEST_GS_BASE);
		break;
2158 2159 2160 2161
	case MSR_KERNEL_GS_BASE:
		vmx_load_host_state(to_vmx(vcpu));
		data = to_vmx(vcpu)->msr_guest_kernel_gs_base;
		break;
2162
#endif
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	case MSR_EFER:
2164
		return kvm_get_msr_common(vcpu, msr_index, pdata);
2165
	case MSR_IA32_TSC:
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		data = guest_read_tsc();
		break;
	case MSR_IA32_SYSENTER_CS:
		data = vmcs_read32(GUEST_SYSENTER_CS);
		break;
	case MSR_IA32_SYSENTER_EIP:
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		data = vmcs_readl(GUEST_SYSENTER_EIP);
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		break;
	case MSR_IA32_SYSENTER_ESP:
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		data = vmcs_readl(GUEST_SYSENTER_ESP);
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2176
		break;
2177 2178 2179 2180
	case MSR_TSC_AUX:
		if (!to_vmx(vcpu)->rdtscp_enabled)
			return 1;
		/* Otherwise falls through */
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	default:
2182 2183
		if (vmx_get_vmx_msr(vcpu, msr_index, pdata))
			return 0;
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		msr = find_msr_entry(to_vmx(vcpu), msr_index);
2185 2186 2187
		if (msr) {
			data = msr->data;
			break;
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2188
		}
2189
		return kvm_get_msr_common(vcpu, msr_index, pdata);
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	}

	*pdata = data;
	return 0;
}

/*
 * Writes msr value into into the appropriate "register".
 * Returns 0 on success, non-0 otherwise.
 * Assumes vcpu_load() was already called.
 */
static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
{
2203
	struct vcpu_vmx *vmx = to_vmx(vcpu);
2204
	struct shared_msr_entry *msr;
2205 2206
	int ret = 0;

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	switch (msr_index) {
2208
	case MSR_EFER:
2209 2210
		ret = kvm_set_msr_common(vcpu, msr_index, data);
		break;
2211
#ifdef CONFIG_X86_64
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2212
	case MSR_FS_BASE:
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2213
		vmx_segment_cache_clear(vmx);
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2214 2215 2216
		vmcs_writel(GUEST_FS_BASE, data);
		break;
	case MSR_GS_BASE:
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		vmx_segment_cache_clear(vmx);
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		vmcs_writel(GUEST_GS_BASE, data);
		break;
2220 2221 2222 2223
	case MSR_KERNEL_GS_BASE:
		vmx_load_host_state(vmx);
		vmx->msr_guest_kernel_gs_base = data;
		break;
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#endif
	case MSR_IA32_SYSENTER_CS:
		vmcs_write32(GUEST_SYSENTER_CS, data);
		break;
	case MSR_IA32_SYSENTER_EIP:
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		vmcs_writel(GUEST_SYSENTER_EIP, data);
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		break;
	case MSR_IA32_SYSENTER_ESP:
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2232
		vmcs_writel(GUEST_SYSENTER_ESP, data);
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2233
		break;
2234
	case MSR_IA32_TSC:
2235
		kvm_write_tsc(vcpu, data);
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2236
		break;
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	case MSR_IA32_CR_PAT:
		if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) {
			vmcs_write64(GUEST_IA32_PAT, data);
			vcpu->arch.pat = data;
			break;
		}
2243 2244 2245 2246 2247 2248 2249 2250 2251
		ret = kvm_set_msr_common(vcpu, msr_index, data);
		break;
	case MSR_TSC_AUX:
		if (!vmx->rdtscp_enabled)
			return 1;
		/* Check reserved bit, higher 32 bits should be zero */
		if ((data >> 32) != 0)
			return 1;
		/* Otherwise falls through */
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	default:
2253 2254
		if (vmx_set_vmx_msr(vcpu, msr_index, data))
			break;
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		msr = find_msr_entry(vmx, msr_index);
2256 2257
		if (msr) {
			msr->data = data;
2258 2259
			if (msr - vmx->guest_msrs < vmx->save_nmsrs) {
				preempt_disable();
2260 2261
				kvm_set_shared_msr(msr->index, msr->data,
						   msr->mask);
2262 2263
				preempt_enable();
			}
2264
			break;
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2265
		}
2266
		ret = kvm_set_msr_common(vcpu, msr_index, data);
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	}

2269
	return ret;
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}

2272
static void vmx_cache_reg(struct kvm_vcpu *vcpu, enum kvm_reg reg)
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{
2274 2275 2276 2277 2278 2279 2280 2281
	__set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail);
	switch (reg) {
	case VCPU_REGS_RSP:
		vcpu->arch.regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
		break;
	case VCPU_REGS_RIP:
		vcpu->arch.regs[VCPU_REGS_RIP] = vmcs_readl(GUEST_RIP);
		break;
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	case VCPU_EXREG_PDPTR:
		if (enable_ept)
			ept_save_pdptrs(vcpu);
		break;
2286 2287 2288
	default:
		break;
	}
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}

2291
static void set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg)
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{
2293 2294 2295 2296 2297
	if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
		vmcs_writel(GUEST_DR7, dbg->arch.debugreg[7]);
	else
		vmcs_writel(GUEST_DR7, vcpu->arch.dr7);

2298
	update_exception_bitmap(vcpu);
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}

static __init int cpu_has_kvm_support(void)
{
2303
	return cpu_has_vmx();
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}

static __init int vmx_disabled_by_bios(void)
{
	u64 msr;

	rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
2311
	if (msr & FEATURE_CONTROL_LOCKED) {
2312
		/* launched w/ TXT and VMX disabled */
2313 2314 2315
		if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX)
			&& tboot_enabled())
			return 1;
2316
		/* launched w/o TXT and VMX only enabled w/ TXT */
2317
		if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX)
2318
			&& (msr & FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX)
2319 2320
			&& !tboot_enabled()) {
			printk(KERN_WARNING "kvm: disable TXT in the BIOS or "
2321
				"activate TXT before enabling KVM\n");
2322
			return 1;
2323
		}
2324 2325 2326 2327
		/* launched w/o TXT and VMX disabled */
		if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX)
			&& !tboot_enabled())
			return 1;
2328 2329 2330
	}

	return 0;
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2331 2332
}

2333 2334 2335 2336 2337 2338 2339
static void kvm_cpu_vmxon(u64 addr)
{
	asm volatile (ASM_VMX_VMXON_RAX
			: : "a"(&addr), "m"(addr)
			: "memory", "cc");
}

2340
static int hardware_enable(void *garbage)
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2341 2342 2343
{
	int cpu = raw_smp_processor_id();
	u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
2344
	u64 old, test_bits;
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2345

2346 2347 2348
	if (read_cr4() & X86_CR4_VMXE)
		return -EBUSY;

2349
	INIT_LIST_HEAD(&per_cpu(loaded_vmcss_on_cpu, cpu));
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2350
	rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
2351 2352 2353 2354 2355 2356 2357

	test_bits = FEATURE_CONTROL_LOCKED;
	test_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
	if (tboot_enabled())
		test_bits |= FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX;

	if ((old & test_bits) != test_bits) {
A
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2358
		/* enable and lock */
2359 2360
		wrmsrl(MSR_IA32_FEATURE_CONTROL, old | test_bits);
	}
2361
	write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
2362

2363 2364 2365 2366
	if (vmm_exclusive) {
		kvm_cpu_vmxon(phys_addr);
		ept_sync_global();
	}
2367

2368 2369
	store_gdt(&__get_cpu_var(host_gdt));

2370
	return 0;
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2371 2372
}

2373
static void vmclear_local_loaded_vmcss(void)
2374 2375
{
	int cpu = raw_smp_processor_id();
2376
	struct loaded_vmcs *v, *n;
2377

2378 2379 2380
	list_for_each_entry_safe(v, n, &per_cpu(loaded_vmcss_on_cpu, cpu),
				 loaded_vmcss_on_cpu_link)
		__loaded_vmcs_clear(v);
2381 2382
}

2383 2384 2385 2386 2387

/* Just like cpu_vmxoff(), but with the __kvm_handle_fault_on_reboot()
 * tricks.
 */
static void kvm_cpu_vmxoff(void)
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2388
{
2389
	asm volatile (__ex(ASM_VMX_VMXOFF) : : : "cc");
A
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2390 2391
}

2392 2393
static void hardware_disable(void *garbage)
{
2394
	if (vmm_exclusive) {
2395
		vmclear_local_loaded_vmcss();
2396 2397
		kvm_cpu_vmxoff();
	}
2398
	write_cr4(read_cr4() & ~X86_CR4_VMXE);
2399 2400
}

2401
static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,
M
Mike Day 已提交
2402
				      u32 msr, u32 *result)
2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413
{
	u32 vmx_msr_low, vmx_msr_high;
	u32 ctl = ctl_min | ctl_opt;

	rdmsr(msr, vmx_msr_low, vmx_msr_high);

	ctl &= vmx_msr_high; /* bit == 0 in high word ==> must be zero */
	ctl |= vmx_msr_low;  /* bit == 1 in low word  ==> must be one  */

	/* Ensure minimum (required) set of control bits are supported. */
	if (ctl_min & ~ctl)
Y
Yang, Sheng 已提交
2414
		return -EIO;
2415 2416 2417 2418 2419

	*result = ctl;
	return 0;
}

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2420 2421 2422 2423 2424 2425 2426 2427
static __init bool allow_1_setting(u32 msr, u32 ctl)
{
	u32 vmx_msr_low, vmx_msr_high;

	rdmsr(msr, vmx_msr_low, vmx_msr_high);
	return vmx_msr_high & ctl;
}

Y
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2428
static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
A
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2429 2430
{
	u32 vmx_msr_low, vmx_msr_high;
S
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2431
	u32 min, opt, min2, opt2;
2432 2433
	u32 _pin_based_exec_control = 0;
	u32 _cpu_based_exec_control = 0;
2434
	u32 _cpu_based_2nd_exec_control = 0;
2435 2436 2437 2438
	u32 _vmexit_control = 0;
	u32 _vmentry_control = 0;

	min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
2439
	opt = PIN_BASED_VIRTUAL_NMIS;
2440 2441
	if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PINBASED_CTLS,
				&_pin_based_exec_control) < 0)
Y
Yang, Sheng 已提交
2442
		return -EIO;
2443

R
Raghavendra K T 已提交
2444
	min = CPU_BASED_HLT_EXITING |
2445 2446 2447 2448
#ifdef CONFIG_X86_64
	      CPU_BASED_CR8_LOAD_EXITING |
	      CPU_BASED_CR8_STORE_EXITING |
#endif
S
Sheng Yang 已提交
2449 2450
	      CPU_BASED_CR3_LOAD_EXITING |
	      CPU_BASED_CR3_STORE_EXITING |
2451 2452
	      CPU_BASED_USE_IO_BITMAPS |
	      CPU_BASED_MOV_DR_EXITING |
M
Marcelo Tosatti 已提交
2453
	      CPU_BASED_USE_TSC_OFFSETING |
2454 2455
	      CPU_BASED_MWAIT_EXITING |
	      CPU_BASED_MONITOR_EXITING |
A
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2456 2457
	      CPU_BASED_INVLPG_EXITING |
	      CPU_BASED_RDPMC_EXITING;
2458

2459
	opt = CPU_BASED_TPR_SHADOW |
S
Sheng Yang 已提交
2460
	      CPU_BASED_USE_MSR_BITMAPS |
2461
	      CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
2462 2463
	if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS,
				&_cpu_based_exec_control) < 0)
Y
Yang, Sheng 已提交
2464
		return -EIO;
2465 2466 2467 2468 2469
#ifdef CONFIG_X86_64
	if ((_cpu_based_exec_control & CPU_BASED_TPR_SHADOW))
		_cpu_based_exec_control &= ~CPU_BASED_CR8_LOAD_EXITING &
					   ~CPU_BASED_CR8_STORE_EXITING;
#endif
2470
	if (_cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) {
S
Sheng Yang 已提交
2471 2472
		min2 = 0;
		opt2 = SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES |
2473
			SECONDARY_EXEC_WBINVD_EXITING |
S
Sheng Yang 已提交
2474
			SECONDARY_EXEC_ENABLE_VPID |
2475
			SECONDARY_EXEC_ENABLE_EPT |
2476
			SECONDARY_EXEC_UNRESTRICTED_GUEST |
2477
			SECONDARY_EXEC_PAUSE_LOOP_EXITING |
2478 2479
			SECONDARY_EXEC_RDTSCP |
			SECONDARY_EXEC_ENABLE_INVPCID;
S
Sheng Yang 已提交
2480 2481
		if (adjust_vmx_controls(min2, opt2,
					MSR_IA32_VMX_PROCBASED_CTLS2,
2482 2483 2484 2485 2486 2487 2488 2489
					&_cpu_based_2nd_exec_control) < 0)
			return -EIO;
	}
#ifndef CONFIG_X86_64
	if (!(_cpu_based_2nd_exec_control &
				SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES))
		_cpu_based_exec_control &= ~CPU_BASED_TPR_SHADOW;
#endif
S
Sheng Yang 已提交
2490
	if (_cpu_based_2nd_exec_control & SECONDARY_EXEC_ENABLE_EPT) {
M
Marcelo Tosatti 已提交
2491 2492
		/* CR3 accesses and invlpg don't need to cause VM Exits when EPT
		   enabled */
2493 2494 2495
		_cpu_based_exec_control &= ~(CPU_BASED_CR3_LOAD_EXITING |
					     CPU_BASED_CR3_STORE_EXITING |
					     CPU_BASED_INVLPG_EXITING);
S
Sheng Yang 已提交
2496 2497 2498
		rdmsr(MSR_IA32_VMX_EPT_VPID_CAP,
		      vmx_capability.ept, vmx_capability.vpid);
	}
2499 2500 2501 2502 2503

	min = 0;
#ifdef CONFIG_X86_64
	min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
#endif
S
Sheng Yang 已提交
2504
	opt = VM_EXIT_SAVE_IA32_PAT | VM_EXIT_LOAD_IA32_PAT;
2505 2506
	if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
				&_vmexit_control) < 0)
Y
Yang, Sheng 已提交
2507
		return -EIO;
2508

S
Sheng Yang 已提交
2509 2510
	min = 0;
	opt = VM_ENTRY_LOAD_IA32_PAT;
2511 2512
	if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
				&_vmentry_control) < 0)
Y
Yang, Sheng 已提交
2513
		return -EIO;
A
Avi Kivity 已提交
2514

N
Nguyen Anh Quynh 已提交
2515
	rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
2516 2517 2518

	/* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
	if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
Y
Yang, Sheng 已提交
2519
		return -EIO;
2520 2521 2522 2523

#ifdef CONFIG_X86_64
	/* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
	if (vmx_msr_high & (1u<<16))
Y
Yang, Sheng 已提交
2524
		return -EIO;
2525 2526 2527 2528
#endif

	/* Require Write-Back (WB) memory type for VMCS accesses. */
	if (((vmx_msr_high >> 18) & 15) != 6)
Y
Yang, Sheng 已提交
2529
		return -EIO;
2530

Y
Yang, Sheng 已提交
2531 2532 2533
	vmcs_conf->size = vmx_msr_high & 0x1fff;
	vmcs_conf->order = get_order(vmcs_config.size);
	vmcs_conf->revision_id = vmx_msr_low;
2534

Y
Yang, Sheng 已提交
2535 2536
	vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
	vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
2537
	vmcs_conf->cpu_based_2nd_exec_ctrl = _cpu_based_2nd_exec_control;
Y
Yang, Sheng 已提交
2538 2539
	vmcs_conf->vmexit_ctrl         = _vmexit_control;
	vmcs_conf->vmentry_ctrl        = _vmentry_control;
2540

A
Avi Kivity 已提交
2541 2542 2543 2544 2545 2546
	cpu_has_load_ia32_efer =
		allow_1_setting(MSR_IA32_VMX_ENTRY_CTLS,
				VM_ENTRY_LOAD_IA32_EFER)
		&& allow_1_setting(MSR_IA32_VMX_EXIT_CTLS,
				   VM_EXIT_LOAD_IA32_EFER);

2547 2548 2549 2550 2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582
	cpu_has_load_perf_global_ctrl =
		allow_1_setting(MSR_IA32_VMX_ENTRY_CTLS,
				VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL)
		&& allow_1_setting(MSR_IA32_VMX_EXIT_CTLS,
				   VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);

	/*
	 * Some cpus support VM_ENTRY_(LOAD|SAVE)_IA32_PERF_GLOBAL_CTRL
	 * but due to arrata below it can't be used. Workaround is to use
	 * msr load mechanism to switch IA32_PERF_GLOBAL_CTRL.
	 *
	 * VM Exit May Incorrectly Clear IA32_PERF_GLOBAL_CTRL [34:32]
	 *
	 * AAK155             (model 26)
	 * AAP115             (model 30)
	 * AAT100             (model 37)
	 * BC86,AAY89,BD102   (model 44)
	 * BA97               (model 46)
	 *
	 */
	if (cpu_has_load_perf_global_ctrl && boot_cpu_data.x86 == 0x6) {
		switch (boot_cpu_data.x86_model) {
		case 26:
		case 30:
		case 37:
		case 44:
		case 46:
			cpu_has_load_perf_global_ctrl = false;
			printk_once(KERN_WARNING"kvm: VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL "
					"does not work properly. Using workaround\n");
			break;
		default:
			break;
		}
	}

2583
	return 0;
N
Nguyen Anh Quynh 已提交
2584
}
A
Avi Kivity 已提交
2585 2586 2587 2588 2589 2590 2591

static struct vmcs *alloc_vmcs_cpu(int cpu)
{
	int node = cpu_to_node(cpu);
	struct page *pages;
	struct vmcs *vmcs;

2592
	pages = alloc_pages_exact_node(node, GFP_KERNEL, vmcs_config.order);
A
Avi Kivity 已提交
2593 2594 2595
	if (!pages)
		return NULL;
	vmcs = page_address(pages);
2596 2597
	memset(vmcs, 0, vmcs_config.size);
	vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
A
Avi Kivity 已提交
2598 2599 2600 2601 2602
	return vmcs;
}

static struct vmcs *alloc_vmcs(void)
{
2603
	return alloc_vmcs_cpu(raw_smp_processor_id());
A
Avi Kivity 已提交
2604 2605 2606 2607
}

static void free_vmcs(struct vmcs *vmcs)
{
2608
	free_pages((unsigned long)vmcs, vmcs_config.order);
A
Avi Kivity 已提交
2609 2610
}

2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622
/*
 * Free a VMCS, but before that VMCLEAR it on the CPU where it was last loaded
 */
static void free_loaded_vmcs(struct loaded_vmcs *loaded_vmcs)
{
	if (!loaded_vmcs->vmcs)
		return;
	loaded_vmcs_clear(loaded_vmcs);
	free_vmcs(loaded_vmcs->vmcs);
	loaded_vmcs->vmcs = NULL;
}

2623
static void free_kvm_area(void)
A
Avi Kivity 已提交
2624 2625 2626
{
	int cpu;

Z
Zachary Amsden 已提交
2627
	for_each_possible_cpu(cpu) {
A
Avi Kivity 已提交
2628
		free_vmcs(per_cpu(vmxarea, cpu));
Z
Zachary Amsden 已提交
2629 2630
		per_cpu(vmxarea, cpu) = NULL;
	}
A
Avi Kivity 已提交
2631 2632 2633 2634 2635 2636
}

static __init int alloc_kvm_area(void)
{
	int cpu;

Z
Zachary Amsden 已提交
2637
	for_each_possible_cpu(cpu) {
A
Avi Kivity 已提交
2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652
		struct vmcs *vmcs;

		vmcs = alloc_vmcs_cpu(cpu);
		if (!vmcs) {
			free_kvm_area();
			return -ENOMEM;
		}

		per_cpu(vmxarea, cpu) = vmcs;
	}
	return 0;
}

static __init int hardware_setup(void)
{
Y
Yang, Sheng 已提交
2653 2654
	if (setup_vmcs_config(&vmcs_config) < 0)
		return -EIO;
2655 2656 2657 2658

	if (boot_cpu_has(X86_FEATURE_NX))
		kvm_enable_efer_bits(EFER_NX);

S
Sheng Yang 已提交
2659 2660 2661
	if (!cpu_has_vmx_vpid())
		enable_vpid = 0;

2662 2663
	if (!cpu_has_vmx_ept() ||
	    !cpu_has_vmx_ept_4levels()) {
S
Sheng Yang 已提交
2664
		enable_ept = 0;
2665
		enable_unrestricted_guest = 0;
2666
		enable_ept_ad_bits = 0;
2667 2668
	}

2669 2670 2671
	if (!cpu_has_vmx_ept_ad_bits())
		enable_ept_ad_bits = 0;

2672 2673
	if (!cpu_has_vmx_unrestricted_guest())
		enable_unrestricted_guest = 0;
S
Sheng Yang 已提交
2674 2675 2676 2677

	if (!cpu_has_vmx_flexpriority())
		flexpriority_enabled = 0;

2678 2679 2680
	if (!cpu_has_vmx_tpr_shadow())
		kvm_x86_ops->update_cr8_intercept = NULL;

2681 2682 2683
	if (enable_ept && !cpu_has_vmx_ept_2m_page())
		kvm_disable_largepages();

2684 2685 2686
	if (!cpu_has_vmx_ple())
		ple_gap = 0;

2687 2688 2689
	if (nested)
		nested_vmx_setup_ctls_msrs();

A
Avi Kivity 已提交
2690 2691 2692 2693 2694 2695 2696 2697
	return alloc_kvm_area();
}

static __exit void hardware_unsetup(void)
{
	free_kvm_area();
}

2698
static void fix_pmode_dataseg(struct kvm_vcpu *vcpu, int seg, struct kvm_segment *save)
A
Avi Kivity 已提交
2699
{
2700
	const struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
2701
	struct kvm_segment tmp = *save;
A
Avi Kivity 已提交
2702

2703 2704 2705 2706
	if (!(vmcs_readl(sf->base) == tmp.base && tmp.s)) {
		tmp.base = vmcs_readl(sf->base);
		tmp.selector = vmcs_read16(sf->selector);
		tmp.s = 1;
A
Avi Kivity 已提交
2707
	}
2708
	vmx_set_segment(vcpu, &tmp, seg);
A
Avi Kivity 已提交
2709 2710 2711 2712 2713
}

static void enter_pmode(struct kvm_vcpu *vcpu)
{
	unsigned long flags;
2714
	struct vcpu_vmx *vmx = to_vmx(vcpu);
A
Avi Kivity 已提交
2715

2716
	vmx->emulation_required = 1;
2717
	vmx->rmode.vm86_active = 0;
A
Avi Kivity 已提交
2718

A
Avi Kivity 已提交
2719 2720
	vmx_segment_cache_clear(vmx);

2721
	vmx_set_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_TR], VCPU_SREG_TR);
A
Avi Kivity 已提交
2722 2723

	flags = vmcs_readl(GUEST_RFLAGS);
2724 2725
	flags &= RMODE_GUEST_OWNED_EFLAGS_BITS;
	flags |= vmx->rmode.save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS;
A
Avi Kivity 已提交
2726 2727
	vmcs_writel(GUEST_RFLAGS, flags);

2728 2729
	vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
			(vmcs_readl(CR4_READ_SHADOW) & X86_CR4_VME));
A
Avi Kivity 已提交
2730 2731 2732

	update_exception_bitmap(vcpu);

2733 2734 2735
	if (emulate_invalid_guest_state)
		return;

2736 2737 2738 2739
	fix_pmode_dataseg(vcpu, VCPU_SREG_ES, &vmx->rmode.segs[VCPU_SREG_ES]);
	fix_pmode_dataseg(vcpu, VCPU_SREG_DS, &vmx->rmode.segs[VCPU_SREG_DS]);
	fix_pmode_dataseg(vcpu, VCPU_SREG_FS, &vmx->rmode.segs[VCPU_SREG_FS]);
	fix_pmode_dataseg(vcpu, VCPU_SREG_GS, &vmx->rmode.segs[VCPU_SREG_GS]);
A
Avi Kivity 已提交
2740

A
Avi Kivity 已提交
2741 2742
	vmx_segment_cache_clear(vmx);

A
Avi Kivity 已提交
2743 2744 2745 2746 2747 2748 2749 2750
	vmcs_write16(GUEST_SS_SELECTOR, 0);
	vmcs_write32(GUEST_SS_AR_BYTES, 0x93);

	vmcs_write16(GUEST_CS_SELECTOR,
		     vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
	vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
}

M
Mike Day 已提交
2751
static gva_t rmode_tss_base(struct kvm *kvm)
A
Avi Kivity 已提交
2752
{
2753
	if (!kvm->arch.tss_addr) {
2754
		struct kvm_memslots *slots;
2755
		struct kvm_memory_slot *slot;
2756 2757
		gfn_t base_gfn;

2758
		slots = kvm_memslots(kvm);
2759 2760 2761
		slot = id_to_memslot(slots, 0);
		base_gfn = slot->base_gfn + slot->npages - 3;

2762 2763
		return base_gfn << PAGE_SHIFT;
	}
2764
	return kvm->arch.tss_addr;
A
Avi Kivity 已提交
2765 2766
}

2767
static void fix_rmode_seg(int seg, struct kvm_segment *save)
2768
{
2769
	const struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
2770

2771
	vmcs_write16(sf->selector, save->base >> 4);
2772
	vmcs_write32(sf->base, save->base & 0xffff0);
A
Avi Kivity 已提交
2773 2774
	vmcs_write32(sf->limit, 0xffff);
	vmcs_write32(sf->ar_bytes, 0xf3);
2775 2776 2777 2778
	if (save->base & 0xf)
		printk_once(KERN_WARNING "kvm: segment base is not paragraph"
			    " aligned when entering protected mode (seg=%d)",
			    seg);
A
Avi Kivity 已提交
2779 2780 2781 2782 2783
}

static void enter_rmode(struct kvm_vcpu *vcpu)
{
	unsigned long flags;
2784
	struct vcpu_vmx *vmx = to_vmx(vcpu);
2785
	struct kvm_segment var;
A
Avi Kivity 已提交
2786

2787 2788 2789
	if (enable_unrestricted_guest)
		return;

2790 2791 2792 2793 2794 2795
	vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_TR], VCPU_SREG_TR);
	vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_ES], VCPU_SREG_ES);
	vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_DS], VCPU_SREG_DS);
	vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_FS], VCPU_SREG_FS);
	vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_GS], VCPU_SREG_GS);

2796
	vmx->emulation_required = 1;
2797
	vmx->rmode.vm86_active = 1;
A
Avi Kivity 已提交
2798

2799

2800 2801 2802 2803 2804 2805 2806 2807 2808 2809 2810 2811
	/*
	 * Very old userspace does not call KVM_SET_TSS_ADDR before entering
	 * vcpu. Call it here with phys address pointing 16M below 4G.
	 */
	if (!vcpu->kvm->arch.tss_addr) {
		printk_once(KERN_WARNING "kvm: KVM_SET_TSS_ADDR need to be "
			     "called before entering vcpu\n");
		srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
		vmx_set_tss_addr(vcpu->kvm, 0xfeffd000);
		vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
	}

A
Avi Kivity 已提交
2812 2813
	vmx_segment_cache_clear(vmx);

A
Avi Kivity 已提交
2814 2815 2816 2817 2818
	vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
	vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
	vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);

	flags = vmcs_readl(GUEST_RFLAGS);
2819
	vmx->rmode.save_rflags = flags;
A
Avi Kivity 已提交
2820

2821
	flags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
A
Avi Kivity 已提交
2822 2823

	vmcs_writel(GUEST_RFLAGS, flags);
2824
	vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME);
A
Avi Kivity 已提交
2825 2826
	update_exception_bitmap(vcpu);

2827 2828 2829
	if (emulate_invalid_guest_state)
		goto continue_rmode;

2830 2831 2832 2833 2834 2835 2836 2837 2838 2839 2840
	vmx_get_segment(vcpu, &var, VCPU_SREG_SS);
	vmx_set_segment(vcpu, &var, VCPU_SREG_SS);

	vmx_get_segment(vcpu, &var, VCPU_SREG_CS);
	vmx_set_segment(vcpu, &var, VCPU_SREG_CS);

	vmx_get_segment(vcpu, &var, VCPU_SREG_ES);
	vmx_set_segment(vcpu, &var, VCPU_SREG_ES);

	vmx_get_segment(vcpu, &var, VCPU_SREG_DS);
	vmx_set_segment(vcpu, &var, VCPU_SREG_DS);
A
Avi Kivity 已提交
2841

2842 2843
	vmx_get_segment(vcpu, &var, VCPU_SREG_GS);
	vmx_set_segment(vcpu, &var, VCPU_SREG_GS);
A
Avi Kivity 已提交
2844

2845 2846
	vmx_get_segment(vcpu, &var, VCPU_SREG_FS);
	vmx_set_segment(vcpu, &var, VCPU_SREG_FS);
2847

2848
continue_rmode:
2849
	kvm_mmu_reset_context(vcpu);
A
Avi Kivity 已提交
2850 2851
}

2852 2853 2854
static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
{
	struct vcpu_vmx *vmx = to_vmx(vcpu);
2855 2856 2857 2858
	struct shared_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);

	if (!msr)
		return;
2859

2860 2861 2862 2863 2864
	/*
	 * Force kernel_gs_base reloading before EFER changes, as control
	 * of this msr depends on is_long_mode().
	 */
	vmx_load_host_state(to_vmx(vcpu));
2865
	vcpu->arch.efer = efer;
2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876 2877 2878 2879 2880
	if (efer & EFER_LMA) {
		vmcs_write32(VM_ENTRY_CONTROLS,
			     vmcs_read32(VM_ENTRY_CONTROLS) |
			     VM_ENTRY_IA32E_MODE);
		msr->data = efer;
	} else {
		vmcs_write32(VM_ENTRY_CONTROLS,
			     vmcs_read32(VM_ENTRY_CONTROLS) &
			     ~VM_ENTRY_IA32E_MODE);

		msr->data = efer & ~EFER_LME;
	}
	setup_msrs(vmx);
}

2881
#ifdef CONFIG_X86_64
A
Avi Kivity 已提交
2882 2883 2884 2885 2886

static void enter_lmode(struct kvm_vcpu *vcpu)
{
	u32 guest_tr_ar;

A
Avi Kivity 已提交
2887 2888
	vmx_segment_cache_clear(to_vmx(vcpu));

A
Avi Kivity 已提交
2889 2890
	guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
	if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
2891 2892
		pr_debug_ratelimited("%s: tss fixup for long mode. \n",
				     __func__);
A
Avi Kivity 已提交
2893 2894 2895 2896
		vmcs_write32(GUEST_TR_AR_BYTES,
			     (guest_tr_ar & ~AR_TYPE_MASK)
			     | AR_TYPE_BUSY_64_TSS);
	}
2897
	vmx_set_efer(vcpu, vcpu->arch.efer | EFER_LMA);
A
Avi Kivity 已提交
2898 2899 2900 2901 2902 2903
}

static void exit_lmode(struct kvm_vcpu *vcpu)
{
	vmcs_write32(VM_ENTRY_CONTROLS,
		     vmcs_read32(VM_ENTRY_CONTROLS)
2904
		     & ~VM_ENTRY_IA32E_MODE);
2905
	vmx_set_efer(vcpu, vcpu->arch.efer & ~EFER_LMA);
A
Avi Kivity 已提交
2906 2907 2908 2909
}

#endif

2910 2911
static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
{
2912
	vpid_sync_context(to_vmx(vcpu));
2913 2914 2915
	if (enable_ept) {
		if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
			return;
2916
		ept_sync_context(construct_eptp(vcpu->arch.mmu.root_hpa));
2917
	}
2918 2919
}

2920 2921 2922 2923 2924 2925 2926 2927
static void vmx_decache_cr0_guest_bits(struct kvm_vcpu *vcpu)
{
	ulong cr0_guest_owned_bits = vcpu->arch.cr0_guest_owned_bits;

	vcpu->arch.cr0 &= ~cr0_guest_owned_bits;
	vcpu->arch.cr0 |= vmcs_readl(GUEST_CR0) & cr0_guest_owned_bits;
}

2928 2929 2930 2931 2932 2933 2934
static void vmx_decache_cr3(struct kvm_vcpu *vcpu)
{
	if (enable_ept && is_paging(vcpu))
		vcpu->arch.cr3 = vmcs_readl(GUEST_CR3);
	__set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
}

2935
static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
2936
{
2937 2938 2939 2940
	ulong cr4_guest_owned_bits = vcpu->arch.cr4_guest_owned_bits;

	vcpu->arch.cr4 &= ~cr4_guest_owned_bits;
	vcpu->arch.cr4 |= vmcs_readl(GUEST_CR4) & cr4_guest_owned_bits;
2941 2942
}

2943 2944
static void ept_load_pdptrs(struct kvm_vcpu *vcpu)
{
A
Avi Kivity 已提交
2945 2946 2947 2948
	if (!test_bit(VCPU_EXREG_PDPTR,
		      (unsigned long *)&vcpu->arch.regs_dirty))
		return;

2949
	if (is_paging(vcpu) && is_pae(vcpu) && !is_long_mode(vcpu)) {
2950 2951 2952 2953
		vmcs_write64(GUEST_PDPTR0, vcpu->arch.mmu.pdptrs[0]);
		vmcs_write64(GUEST_PDPTR1, vcpu->arch.mmu.pdptrs[1]);
		vmcs_write64(GUEST_PDPTR2, vcpu->arch.mmu.pdptrs[2]);
		vmcs_write64(GUEST_PDPTR3, vcpu->arch.mmu.pdptrs[3]);
2954 2955 2956
	}
}

2957 2958 2959
static void ept_save_pdptrs(struct kvm_vcpu *vcpu)
{
	if (is_paging(vcpu) && is_pae(vcpu) && !is_long_mode(vcpu)) {
2960 2961 2962 2963
		vcpu->arch.mmu.pdptrs[0] = vmcs_read64(GUEST_PDPTR0);
		vcpu->arch.mmu.pdptrs[1] = vmcs_read64(GUEST_PDPTR1);
		vcpu->arch.mmu.pdptrs[2] = vmcs_read64(GUEST_PDPTR2);
		vcpu->arch.mmu.pdptrs[3] = vmcs_read64(GUEST_PDPTR3);
2964
	}
A
Avi Kivity 已提交
2965 2966 2967 2968 2969

	__set_bit(VCPU_EXREG_PDPTR,
		  (unsigned long *)&vcpu->arch.regs_avail);
	__set_bit(VCPU_EXREG_PDPTR,
		  (unsigned long *)&vcpu->arch.regs_dirty);
2970 2971
}

2972
static int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
2973 2974 2975 2976 2977

static void ept_update_paging_mode_cr0(unsigned long *hw_cr0,
					unsigned long cr0,
					struct kvm_vcpu *vcpu)
{
2978 2979
	if (!test_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail))
		vmx_decache_cr3(vcpu);
2980 2981 2982
	if (!(cr0 & X86_CR0_PG)) {
		/* From paging/starting to nonpaging */
		vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
2983
			     vmcs_read32(CPU_BASED_VM_EXEC_CONTROL) |
2984 2985 2986
			     (CPU_BASED_CR3_LOAD_EXITING |
			      CPU_BASED_CR3_STORE_EXITING));
		vcpu->arch.cr0 = cr0;
2987
		vmx_set_cr4(vcpu, kvm_read_cr4(vcpu));
2988 2989 2990
	} else if (!is_paging(vcpu)) {
		/* From nonpaging to paging */
		vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
2991
			     vmcs_read32(CPU_BASED_VM_EXEC_CONTROL) &
2992 2993 2994
			     ~(CPU_BASED_CR3_LOAD_EXITING |
			       CPU_BASED_CR3_STORE_EXITING));
		vcpu->arch.cr0 = cr0;
2995
		vmx_set_cr4(vcpu, kvm_read_cr4(vcpu));
2996
	}
2997 2998 2999

	if (!(cr0 & X86_CR0_WP))
		*hw_cr0 &= ~X86_CR0_WP;
3000 3001
}

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Avi Kivity 已提交
3002 3003
static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
{
3004
	struct vcpu_vmx *vmx = to_vmx(vcpu);
3005 3006 3007 3008 3009 3010 3011
	unsigned long hw_cr0;

	if (enable_unrestricted_guest)
		hw_cr0 = (cr0 & ~KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST)
			| KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST;
	else
		hw_cr0 = (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON;
3012

3013
	if (vmx->rmode.vm86_active && (cr0 & X86_CR0_PE))
A
Avi Kivity 已提交
3014 3015
		enter_pmode(vcpu);

3016
	if (!vmx->rmode.vm86_active && !(cr0 & X86_CR0_PE))
A
Avi Kivity 已提交
3017 3018
		enter_rmode(vcpu);

3019
#ifdef CONFIG_X86_64
3020
	if (vcpu->arch.efer & EFER_LME) {
3021
		if (!is_paging(vcpu) && (cr0 & X86_CR0_PG))
A
Avi Kivity 已提交
3022
			enter_lmode(vcpu);
3023
		if (is_paging(vcpu) && !(cr0 & X86_CR0_PG))
A
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3024 3025 3026 3027
			exit_lmode(vcpu);
	}
#endif

3028
	if (enable_ept)
3029 3030
		ept_update_paging_mode_cr0(&hw_cr0, cr0, vcpu);

3031
	if (!vcpu->fpu_active)
3032
		hw_cr0 |= X86_CR0_TS | X86_CR0_MP;
3033

A
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3034
	vmcs_writel(CR0_READ_SHADOW, cr0);
3035
	vmcs_writel(GUEST_CR0, hw_cr0);
3036
	vcpu->arch.cr0 = cr0;
A
Avi Kivity 已提交
3037
	__clear_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail);
A
Avi Kivity 已提交
3038 3039
}

3040 3041 3042 3043 3044 3045 3046
static u64 construct_eptp(unsigned long root_hpa)
{
	u64 eptp;

	/* TODO write the value reading from MSR */
	eptp = VMX_EPT_DEFAULT_MT |
		VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
3047 3048
	if (enable_ept_ad_bits)
		eptp |= VMX_EPT_AD_ENABLE_BIT;
3049 3050 3051 3052 3053
	eptp |= (root_hpa & PAGE_MASK);

	return eptp;
}

A
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3054 3055
static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
{
3056 3057 3058 3059
	unsigned long guest_cr3;
	u64 eptp;

	guest_cr3 = cr3;
3060
	if (enable_ept) {
3061 3062
		eptp = construct_eptp(cr3);
		vmcs_write64(EPT_POINTER, eptp);
3063
		guest_cr3 = is_paging(vcpu) ? kvm_read_cr3(vcpu) :
3064
			vcpu->kvm->arch.ept_identity_map_addr;
3065
		ept_load_pdptrs(vcpu);
3066 3067
	}

3068
	vmx_flush_tlb(vcpu);
3069
	vmcs_writel(GUEST_CR3, guest_cr3);
A
Avi Kivity 已提交
3070 3071
}

3072
static int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
A
Avi Kivity 已提交
3073
{
3074
	unsigned long hw_cr4 = cr4 | (to_vmx(vcpu)->rmode.vm86_active ?
3075 3076
		    KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON);

3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088
	if (cr4 & X86_CR4_VMXE) {
		/*
		 * To use VMXON (and later other VMX instructions), a guest
		 * must first be able to turn on cr4.VMXE (see handle_vmon()).
		 * So basically the check on whether to allow nested VMX
		 * is here.
		 */
		if (!nested_vmx_allowed(vcpu))
			return 1;
	} else if (to_vmx(vcpu)->nested.vmxon)
		return 1;

3089
	vcpu->arch.cr4 = cr4;
3090 3091 3092 3093 3094 3095 3096 3097
	if (enable_ept) {
		if (!is_paging(vcpu)) {
			hw_cr4 &= ~X86_CR4_PAE;
			hw_cr4 |= X86_CR4_PSE;
		} else if (!(cr4 & X86_CR4_PAE)) {
			hw_cr4 &= ~X86_CR4_PAE;
		}
	}
3098 3099 3100

	vmcs_writel(CR4_READ_SHADOW, cr4);
	vmcs_writel(GUEST_CR4, hw_cr4);
3101
	return 0;
A
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3102 3103 3104 3105 3106
}

static void vmx_get_segment(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg)
{
3107
	struct vcpu_vmx *vmx = to_vmx(vcpu);
A
Avi Kivity 已提交
3108 3109
	u32 ar;

3110 3111 3112
	if (vmx->rmode.vm86_active
	    && (seg == VCPU_SREG_TR || seg == VCPU_SREG_ES
		|| seg == VCPU_SREG_DS || seg == VCPU_SREG_FS
3113
		|| seg == VCPU_SREG_GS)) {
3114
		*var = vmx->rmode.segs[seg];
3115
		if (seg == VCPU_SREG_TR
A
Avi Kivity 已提交
3116
		    || var->selector == vmx_read_guest_seg_selector(vmx, seg))
3117
			return;
3118 3119 3120
		var->base = vmx_read_guest_seg_base(vmx, seg);
		var->selector = vmx_read_guest_seg_selector(vmx, seg);
		return;
3121
	}
A
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3122 3123 3124 3125
	var->base = vmx_read_guest_seg_base(vmx, seg);
	var->limit = vmx_read_guest_seg_limit(vmx, seg);
	var->selector = vmx_read_guest_seg_selector(vmx, seg);
	ar = vmx_read_guest_seg_ar(vmx, seg);
3126
	if ((ar & AR_UNUSABLE_MASK) && !emulate_invalid_guest_state)
A
Avi Kivity 已提交
3127 3128 3129 3130 3131 3132 3133 3134 3135 3136 3137 3138
		ar = 0;
	var->type = ar & 15;
	var->s = (ar >> 4) & 1;
	var->dpl = (ar >> 5) & 3;
	var->present = (ar >> 7) & 1;
	var->avl = (ar >> 12) & 1;
	var->l = (ar >> 13) & 1;
	var->db = (ar >> 14) & 1;
	var->g = (ar >> 15) & 1;
	var->unusable = (ar >> 16) & 1;
}

3139 3140 3141 3142 3143 3144 3145 3146
static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
{
	struct kvm_segment s;

	if (to_vmx(vcpu)->rmode.vm86_active) {
		vmx_get_segment(vcpu, &s, seg);
		return s.base;
	}
A
Avi Kivity 已提交
3147
	return vmx_read_guest_seg_base(to_vmx(vcpu), seg);
3148 3149
}

A
Avi Kivity 已提交
3150
static int __vmx_get_cpl(struct kvm_vcpu *vcpu)
3151
{
3152
	if (!is_protmode(vcpu))
3153 3154
		return 0;

A
Avi Kivity 已提交
3155 3156
	if (!is_long_mode(vcpu)
	    && (kvm_get_rflags(vcpu) & X86_EFLAGS_VM)) /* if virtual 8086 */
3157 3158
		return 3;

A
Avi Kivity 已提交
3159
	return vmx_read_guest_seg_selector(to_vmx(vcpu), VCPU_SREG_CS) & 3;
3160 3161
}

A
Avi Kivity 已提交
3162 3163
static int vmx_get_cpl(struct kvm_vcpu *vcpu)
{
3164 3165 3166 3167 3168 3169 3170 3171 3172 3173
	struct vcpu_vmx *vmx = to_vmx(vcpu);

	/*
	 * If we enter real mode with cs.sel & 3 != 0, the normal CPL calculations
	 * fail; use the cache instead.
	 */
	if (unlikely(vmx->emulation_required && emulate_invalid_guest_state)) {
		return vmx->cpl;
	}

A
Avi Kivity 已提交
3174 3175
	if (!test_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail)) {
		__set_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail);
3176
		vmx->cpl = __vmx_get_cpl(vcpu);
A
Avi Kivity 已提交
3177
	}
3178 3179

	return vmx->cpl;
A
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3180 3181 3182
}


3183
static u32 vmx_segment_access_rights(struct kvm_segment *var)
A
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3184 3185 3186
{
	u32 ar;

3187
	if (var->unusable || !var->present)
A
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3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198
		ar = 1 << 16;
	else {
		ar = var->type & 15;
		ar |= (var->s & 1) << 4;
		ar |= (var->dpl & 3) << 5;
		ar |= (var->present & 1) << 7;
		ar |= (var->avl & 1) << 12;
		ar |= (var->l & 1) << 13;
		ar |= (var->db & 1) << 14;
		ar |= (var->g & 1) << 15;
	}
3199 3200 3201 3202 3203 3204 3205

	return ar;
}

static void vmx_set_segment(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg)
{
3206
	struct vcpu_vmx *vmx = to_vmx(vcpu);
3207
	const struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
3208 3209
	u32 ar;

A
Avi Kivity 已提交
3210 3211
	vmx_segment_cache_clear(vmx);

3212
	if (vmx->rmode.vm86_active && seg == VCPU_SREG_TR) {
3213
		vmcs_write16(sf->selector, var->selector);
3214
		vmx->rmode.segs[VCPU_SREG_TR] = *var;
3215 3216 3217 3218 3219
		return;
	}
	vmcs_writel(sf->base, var->base);
	vmcs_write32(sf->limit, var->limit);
	vmcs_write16(sf->selector, var->selector);
3220
	if (vmx->rmode.vm86_active && var->s) {
3221
		vmx->rmode.segs[seg] = *var;
3222 3223 3224 3225 3226 3227 3228 3229
		/*
		 * Hack real-mode segments into vm86 compatibility.
		 */
		if (var->base == 0xffff0000 && var->selector == 0xf000)
			vmcs_writel(sf->base, 0xf0000);
		ar = 0xf3;
	} else
		ar = vmx_segment_access_rights(var);
3230 3231 3232 3233 3234 3235

	/*
	 *   Fix the "Accessed" bit in AR field of segment registers for older
	 * qemu binaries.
	 *   IA32 arch specifies that at the time of processor reset the
	 * "Accessed" bit in the AR field of segment registers is 1. And qemu
G
Guo Chao 已提交
3236
	 * is setting it to 0 in the userland code. This causes invalid guest
3237 3238 3239 3240 3241 3242 3243 3244
	 * state vmexit when "unrestricted guest" mode is turned on.
	 *    Fix for this setup issue in cpu_reset is being pushed in the qemu
	 * tree. Newer qemu binaries with that qemu fix would not need this
	 * kvm hack.
	 */
	if (enable_unrestricted_guest && (seg != VCPU_SREG_LDTR))
		ar |= 0x1; /* Accessed */

A
Avi Kivity 已提交
3245
	vmcs_write32(sf->ar_bytes, ar);
A
Avi Kivity 已提交
3246
	__clear_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail);
3247 3248 3249 3250 3251 3252 3253 3254 3255 3256 3257 3258 3259 3260 3261 3262 3263 3264 3265 3266 3267 3268

	/*
	 * Fix segments for real mode guest in hosts that don't have
	 * "unrestricted_mode" or it was disabled.
	 * This is done to allow migration of the guests from hosts with
	 * unrestricted guest like Westmere to older host that don't have
	 * unrestricted guest like Nehelem.
	 */
	if (!enable_unrestricted_guest && vmx->rmode.vm86_active) {
		switch (seg) {
		case VCPU_SREG_CS:
			vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
			vmcs_write32(GUEST_CS_LIMIT, 0xffff);
			if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
				vmcs_writel(GUEST_CS_BASE, 0xf0000);
			vmcs_write16(GUEST_CS_SELECTOR,
				     vmcs_readl(GUEST_CS_BASE) >> 4);
			break;
		case VCPU_SREG_ES:
		case VCPU_SREG_DS:
		case VCPU_SREG_GS:
		case VCPU_SREG_FS:
3269
			fix_rmode_seg(seg, &vmx->rmode.segs[seg]);
3270 3271 3272 3273 3274 3275 3276 3277 3278
			break;
		case VCPU_SREG_SS:
			vmcs_write16(GUEST_SS_SELECTOR,
				     vmcs_readl(GUEST_SS_BASE) >> 4);
			vmcs_write32(GUEST_SS_LIMIT, 0xffff);
			vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
			break;
		}
	}
A
Avi Kivity 已提交
3279 3280 3281 3282
}

static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
{
A
Avi Kivity 已提交
3283
	u32 ar = vmx_read_guest_seg_ar(to_vmx(vcpu), VCPU_SREG_CS);
A
Avi Kivity 已提交
3284 3285 3286 3287 3288

	*db = (ar >> 14) & 1;
	*l = (ar >> 13) & 1;
}

3289
static void vmx_get_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
A
Avi Kivity 已提交
3290
{
3291 3292
	dt->size = vmcs_read32(GUEST_IDTR_LIMIT);
	dt->address = vmcs_readl(GUEST_IDTR_BASE);
A
Avi Kivity 已提交
3293 3294
}

3295
static void vmx_set_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
A
Avi Kivity 已提交
3296
{
3297 3298
	vmcs_write32(GUEST_IDTR_LIMIT, dt->size);
	vmcs_writel(GUEST_IDTR_BASE, dt->address);
A
Avi Kivity 已提交
3299 3300
}

3301
static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
A
Avi Kivity 已提交
3302
{
3303 3304
	dt->size = vmcs_read32(GUEST_GDTR_LIMIT);
	dt->address = vmcs_readl(GUEST_GDTR_BASE);
A
Avi Kivity 已提交
3305 3306
}

3307
static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
A
Avi Kivity 已提交
3308
{
3309 3310
	vmcs_write32(GUEST_GDTR_LIMIT, dt->size);
	vmcs_writel(GUEST_GDTR_BASE, dt->address);
A
Avi Kivity 已提交
3311 3312
}

3313 3314 3315 3316 3317 3318 3319 3320 3321 3322
static bool rmode_segment_valid(struct kvm_vcpu *vcpu, int seg)
{
	struct kvm_segment var;
	u32 ar;

	vmx_get_segment(vcpu, &var, seg);
	ar = vmx_segment_access_rights(&var);

	if (var.base != (var.selector << 4))
		return false;
3323
	if (var.limit < 0xffff)
3324
		return false;
3325
	if (((ar | (3 << AR_DPL_SHIFT)) & ~(AR_G_MASK | AR_DB_MASK)) != 0xf3)
3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338
		return false;

	return true;
}

static bool code_segment_valid(struct kvm_vcpu *vcpu)
{
	struct kvm_segment cs;
	unsigned int cs_rpl;

	vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
	cs_rpl = cs.selector & SELECTOR_RPL_MASK;

3339 3340
	if (cs.unusable)
		return false;
3341 3342 3343 3344
	if (~cs.type & (AR_TYPE_CODE_MASK|AR_TYPE_ACCESSES_MASK))
		return false;
	if (!cs.s)
		return false;
3345
	if (cs.type & AR_TYPE_WRITEABLE_MASK) {
3346 3347
		if (cs.dpl > cs_rpl)
			return false;
3348
	} else {
3349 3350 3351 3352 3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364 3365 3366
		if (cs.dpl != cs_rpl)
			return false;
	}
	if (!cs.present)
		return false;

	/* TODO: Add Reserved field check, this'll require a new member in the kvm_segment_field structure */
	return true;
}

static bool stack_segment_valid(struct kvm_vcpu *vcpu)
{
	struct kvm_segment ss;
	unsigned int ss_rpl;

	vmx_get_segment(vcpu, &ss, VCPU_SREG_SS);
	ss_rpl = ss.selector & SELECTOR_RPL_MASK;

3367 3368 3369
	if (ss.unusable)
		return true;
	if (ss.type != 3 && ss.type != 7)
3370 3371 3372 3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387 3388
		return false;
	if (!ss.s)
		return false;
	if (ss.dpl != ss_rpl) /* DPL != RPL */
		return false;
	if (!ss.present)
		return false;

	return true;
}

static bool data_segment_valid(struct kvm_vcpu *vcpu, int seg)
{
	struct kvm_segment var;
	unsigned int rpl;

	vmx_get_segment(vcpu, &var, seg);
	rpl = var.selector & SELECTOR_RPL_MASK;

3389 3390
	if (var.unusable)
		return true;
3391 3392 3393 3394 3395 3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406 3407 3408 3409 3410 3411
	if (!var.s)
		return false;
	if (!var.present)
		return false;
	if (~var.type & (AR_TYPE_CODE_MASK|AR_TYPE_WRITEABLE_MASK)) {
		if (var.dpl < rpl) /* DPL < RPL */
			return false;
	}

	/* TODO: Add other members to kvm_segment_field to allow checking for other access
	 * rights flags
	 */
	return true;
}

static bool tr_valid(struct kvm_vcpu *vcpu)
{
	struct kvm_segment tr;

	vmx_get_segment(vcpu, &tr, VCPU_SREG_TR);

3412 3413
	if (tr.unusable)
		return false;
3414 3415
	if (tr.selector & SELECTOR_TI_MASK)	/* TI = 1 */
		return false;
3416
	if (tr.type != 3 && tr.type != 11) /* TODO: Check if guest is in IA32e mode */
3417 3418 3419 3420 3421 3422 3423 3424 3425 3426 3427 3428 3429
		return false;
	if (!tr.present)
		return false;

	return true;
}

static bool ldtr_valid(struct kvm_vcpu *vcpu)
{
	struct kvm_segment ldtr;

	vmx_get_segment(vcpu, &ldtr, VCPU_SREG_LDTR);

3430 3431
	if (ldtr.unusable)
		return true;
3432 3433 3434 3435 3436 3437 3438 3439 3440 3441 3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452 3453 3454 3455 3456 3457 3458 3459 3460
	if (ldtr.selector & SELECTOR_TI_MASK)	/* TI = 1 */
		return false;
	if (ldtr.type != 2)
		return false;
	if (!ldtr.present)
		return false;

	return true;
}

static bool cs_ss_rpl_check(struct kvm_vcpu *vcpu)
{
	struct kvm_segment cs, ss;

	vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
	vmx_get_segment(vcpu, &ss, VCPU_SREG_SS);

	return ((cs.selector & SELECTOR_RPL_MASK) ==
		 (ss.selector & SELECTOR_RPL_MASK));
}

/*
 * Check if guest state is valid. Returns true if valid, false if
 * not.
 * We assume that registers are always usable
 */
static bool guest_state_valid(struct kvm_vcpu *vcpu)
{
	/* real mode guest state checks */
3461
	if (!is_protmode(vcpu)) {
3462 3463 3464 3465 3466 3467 3468 3469 3470 3471 3472 3473 3474 3475 3476 3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502
		if (!rmode_segment_valid(vcpu, VCPU_SREG_CS))
			return false;
		if (!rmode_segment_valid(vcpu, VCPU_SREG_SS))
			return false;
		if (!rmode_segment_valid(vcpu, VCPU_SREG_DS))
			return false;
		if (!rmode_segment_valid(vcpu, VCPU_SREG_ES))
			return false;
		if (!rmode_segment_valid(vcpu, VCPU_SREG_FS))
			return false;
		if (!rmode_segment_valid(vcpu, VCPU_SREG_GS))
			return false;
	} else {
	/* protected mode guest state checks */
		if (!cs_ss_rpl_check(vcpu))
			return false;
		if (!code_segment_valid(vcpu))
			return false;
		if (!stack_segment_valid(vcpu))
			return false;
		if (!data_segment_valid(vcpu, VCPU_SREG_DS))
			return false;
		if (!data_segment_valid(vcpu, VCPU_SREG_ES))
			return false;
		if (!data_segment_valid(vcpu, VCPU_SREG_FS))
			return false;
		if (!data_segment_valid(vcpu, VCPU_SREG_GS))
			return false;
		if (!tr_valid(vcpu))
			return false;
		if (!ldtr_valid(vcpu))
			return false;
	}
	/* TODO:
	 * - Add checks on RIP
	 * - Add checks on RFLAGS
	 */

	return true;
}

M
Mike Day 已提交
3503
static int init_rmode_tss(struct kvm *kvm)
A
Avi Kivity 已提交
3504
{
3505
	gfn_t fn;
3506
	u16 data = 0;
3507
	int r, idx, ret = 0;
A
Avi Kivity 已提交
3508

3509 3510
	idx = srcu_read_lock(&kvm->srcu);
	fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
3511 3512
	r = kvm_clear_guest_page(kvm, fn, 0, PAGE_SIZE);
	if (r < 0)
3513
		goto out;
3514
	data = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
3515 3516
	r = kvm_write_guest_page(kvm, fn++, &data,
			TSS_IOPB_BASE_OFFSET, sizeof(u16));
3517
	if (r < 0)
3518
		goto out;
3519 3520
	r = kvm_clear_guest_page(kvm, fn++, 0, PAGE_SIZE);
	if (r < 0)
3521
		goto out;
3522 3523
	r = kvm_clear_guest_page(kvm, fn, 0, PAGE_SIZE);
	if (r < 0)
3524
		goto out;
3525
	data = ~0;
3526 3527 3528
	r = kvm_write_guest_page(kvm, fn, &data,
				 RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1,
				 sizeof(u8));
3529
	if (r < 0)
3530 3531 3532 3533
		goto out;

	ret = 1;
out:
3534
	srcu_read_unlock(&kvm->srcu, idx);
3535
	return ret;
A
Avi Kivity 已提交
3536 3537
}

3538 3539
static int init_rmode_identity_map(struct kvm *kvm)
{
3540
	int i, idx, r, ret;
3541 3542 3543
	pfn_t identity_map_pfn;
	u32 tmp;

3544
	if (!enable_ept)
3545 3546 3547 3548 3549 3550 3551 3552 3553
		return 1;
	if (unlikely(!kvm->arch.ept_identity_pagetable)) {
		printk(KERN_ERR "EPT: identity-mapping pagetable "
			"haven't been allocated!\n");
		return 0;
	}
	if (likely(kvm->arch.ept_identity_pagetable_done))
		return 1;
	ret = 0;
3554
	identity_map_pfn = kvm->arch.ept_identity_map_addr >> PAGE_SHIFT;
3555
	idx = srcu_read_lock(&kvm->srcu);
3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 3570
	r = kvm_clear_guest_page(kvm, identity_map_pfn, 0, PAGE_SIZE);
	if (r < 0)
		goto out;
	/* Set up identity-mapping pagetable for EPT in real mode */
	for (i = 0; i < PT32_ENT_PER_PAGE; i++) {
		tmp = (i << 22) + (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER |
			_PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_PSE);
		r = kvm_write_guest_page(kvm, identity_map_pfn,
				&tmp, i * sizeof(tmp), sizeof(tmp));
		if (r < 0)
			goto out;
	}
	kvm->arch.ept_identity_pagetable_done = true;
	ret = 1;
out:
3571
	srcu_read_unlock(&kvm->srcu, idx);
3572 3573 3574
	return ret;
}

A
Avi Kivity 已提交
3575 3576
static void seg_setup(int seg)
{
3577
	const struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
3578
	unsigned int ar;
A
Avi Kivity 已提交
3579 3580 3581 3582

	vmcs_write16(sf->selector, 0);
	vmcs_writel(sf->base, 0);
	vmcs_write32(sf->limit, 0xffff);
3583 3584 3585 3586 3587 3588 3589 3590
	if (enable_unrestricted_guest) {
		ar = 0x93;
		if (seg == VCPU_SREG_CS)
			ar |= 0x08; /* code segment */
	} else
		ar = 0xf3;

	vmcs_write32(sf->ar_bytes, ar);
A
Avi Kivity 已提交
3591 3592
}

3593 3594 3595 3596 3597
static int alloc_apic_access_page(struct kvm *kvm)
{
	struct kvm_userspace_memory_region kvm_userspace_mem;
	int r = 0;

3598
	mutex_lock(&kvm->slots_lock);
3599
	if (kvm->arch.apic_access_page)
3600 3601 3602 3603 3604 3605 3606 3607
		goto out;
	kvm_userspace_mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
	kvm_userspace_mem.flags = 0;
	kvm_userspace_mem.guest_phys_addr = 0xfee00000ULL;
	kvm_userspace_mem.memory_size = PAGE_SIZE;
	r = __kvm_set_memory_region(kvm, &kvm_userspace_mem, 0);
	if (r)
		goto out;
3608

3609
	kvm->arch.apic_access_page = gfn_to_page(kvm, 0xfee00);
3610
out:
3611
	mutex_unlock(&kvm->slots_lock);
3612 3613 3614
	return r;
}

3615 3616 3617 3618 3619
static int alloc_identity_pagetable(struct kvm *kvm)
{
	struct kvm_userspace_memory_region kvm_userspace_mem;
	int r = 0;

3620
	mutex_lock(&kvm->slots_lock);
3621 3622 3623 3624
	if (kvm->arch.ept_identity_pagetable)
		goto out;
	kvm_userspace_mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
	kvm_userspace_mem.flags = 0;
3625 3626
	kvm_userspace_mem.guest_phys_addr =
		kvm->arch.ept_identity_map_addr;
3627 3628 3629 3630 3631 3632
	kvm_userspace_mem.memory_size = PAGE_SIZE;
	r = __kvm_set_memory_region(kvm, &kvm_userspace_mem, 0);
	if (r)
		goto out;

	kvm->arch.ept_identity_pagetable = gfn_to_page(kvm,
3633
			kvm->arch.ept_identity_map_addr >> PAGE_SHIFT);
3634
out:
3635
	mutex_unlock(&kvm->slots_lock);
3636 3637 3638
	return r;
}

3639 3640 3641 3642 3643
static void allocate_vpid(struct vcpu_vmx *vmx)
{
	int vpid;

	vmx->vpid = 0;
3644
	if (!enable_vpid)
3645 3646 3647 3648 3649 3650 3651 3652 3653 3654
		return;
	spin_lock(&vmx_vpid_lock);
	vpid = find_first_zero_bit(vmx_vpid_bitmap, VMX_NR_VPIDS);
	if (vpid < VMX_NR_VPIDS) {
		vmx->vpid = vpid;
		__set_bit(vpid, vmx_vpid_bitmap);
	}
	spin_unlock(&vmx_vpid_lock);
}

3655 3656 3657 3658 3659 3660 3661 3662 3663 3664
static void free_vpid(struct vcpu_vmx *vmx)
{
	if (!enable_vpid)
		return;
	spin_lock(&vmx_vpid_lock);
	if (vmx->vpid != 0)
		__clear_bit(vmx->vpid, vmx_vpid_bitmap);
	spin_unlock(&vmx_vpid_lock);
}

3665
static void __vmx_disable_intercept_for_msr(unsigned long *msr_bitmap, u32 msr)
S
Sheng Yang 已提交
3666
{
3667
	int f = sizeof(unsigned long);
S
Sheng Yang 已提交
3668 3669 3670 3671 3672 3673 3674 3675 3676 3677

	if (!cpu_has_vmx_msr_bitmap())
		return;

	/*
	 * See Intel PRM Vol. 3, 20.6.9 (MSR-Bitmap Address). Early manuals
	 * have the write-low and read-high bitmap offsets the wrong way round.
	 * We can control MSRs 0x00000000-0x00001fff and 0xc0000000-0xc0001fff.
	 */
	if (msr <= 0x1fff) {
3678 3679
		__clear_bit(msr, msr_bitmap + 0x000 / f); /* read-low */
		__clear_bit(msr, msr_bitmap + 0x800 / f); /* write-low */
S
Sheng Yang 已提交
3680 3681
	} else if ((msr >= 0xc0000000) && (msr <= 0xc0001fff)) {
		msr &= 0x1fff;
3682 3683
		__clear_bit(msr, msr_bitmap + 0x400 / f); /* read-high */
		__clear_bit(msr, msr_bitmap + 0xc00 / f); /* write-high */
S
Sheng Yang 已提交
3684 3685 3686
	}
}

3687 3688 3689 3690 3691 3692 3693
static void vmx_disable_intercept_for_msr(u32 msr, bool longmode_only)
{
	if (!longmode_only)
		__vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy, msr);
	__vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode, msr);
}

3694 3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709 3710
/*
 * Set up the vmcs's constant host-state fields, i.e., host-state fields that
 * will not change in the lifetime of the guest.
 * Note that host-state that does change is set elsewhere. E.g., host-state
 * that is set differently for each CPU is set in vmx_vcpu_load(), not here.
 */
static void vmx_set_constant_host_state(void)
{
	u32 low32, high32;
	unsigned long tmpl;
	struct desc_ptr dt;

	vmcs_writel(HOST_CR0, read_cr0() | X86_CR0_TS);  /* 22.2.3 */
	vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
	vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */

	vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
A
Avi Kivity 已提交
3711 3712 3713 3714 3715 3716 3717 3718 3719
#ifdef CONFIG_X86_64
	/*
	 * Load null selectors, so we can avoid reloading them in
	 * __vmx_load_host_state(), in case userspace uses the null selectors
	 * too (the expected case).
	 */
	vmcs_write16(HOST_DS_SELECTOR, 0);
	vmcs_write16(HOST_ES_SELECTOR, 0);
#else
3720 3721
	vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
	vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
A
Avi Kivity 已提交
3722
#endif
3723 3724 3725 3726 3727 3728
	vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
	vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */

	native_store_idt(&dt);
	vmcs_writel(HOST_IDTR_BASE, dt.address);   /* 22.2.4 */

A
Avi Kivity 已提交
3729
	vmcs_writel(HOST_RIP, vmx_return); /* 22.2.5 */
3730 3731 3732 3733 3734 3735 3736 3737 3738 3739 3740 3741

	rdmsr(MSR_IA32_SYSENTER_CS, low32, high32);
	vmcs_write32(HOST_IA32_SYSENTER_CS, low32);
	rdmsrl(MSR_IA32_SYSENTER_EIP, tmpl);
	vmcs_writel(HOST_IA32_SYSENTER_EIP, tmpl);   /* 22.2.3 */

	if (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_PAT) {
		rdmsr(MSR_IA32_CR_PAT, low32, high32);
		vmcs_write64(HOST_IA32_PAT, low32 | ((u64) high32 << 32));
	}
}

3742 3743 3744 3745 3746
static void set_cr4_guest_host_mask(struct vcpu_vmx *vmx)
{
	vmx->vcpu.arch.cr4_guest_owned_bits = KVM_CR4_GUEST_OWNED_BITS;
	if (enable_ept)
		vmx->vcpu.arch.cr4_guest_owned_bits |= X86_CR4_PGE;
3747 3748 3749
	if (is_guest_mode(&vmx->vcpu))
		vmx->vcpu.arch.cr4_guest_owned_bits &=
			~get_vmcs12(&vmx->vcpu)->cr4_guest_host_mask;
3750 3751 3752 3753 3754 3755 3756 3757 3758 3759 3760 3761 3762 3763 3764 3765 3766 3767 3768 3769 3770 3771 3772 3773 3774 3775 3776 3777 3778 3779
	vmcs_writel(CR4_GUEST_HOST_MASK, ~vmx->vcpu.arch.cr4_guest_owned_bits);
}

static u32 vmx_exec_control(struct vcpu_vmx *vmx)
{
	u32 exec_control = vmcs_config.cpu_based_exec_ctrl;
	if (!vm_need_tpr_shadow(vmx->vcpu.kvm)) {
		exec_control &= ~CPU_BASED_TPR_SHADOW;
#ifdef CONFIG_X86_64
		exec_control |= CPU_BASED_CR8_STORE_EXITING |
				CPU_BASED_CR8_LOAD_EXITING;
#endif
	}
	if (!enable_ept)
		exec_control |= CPU_BASED_CR3_STORE_EXITING |
				CPU_BASED_CR3_LOAD_EXITING  |
				CPU_BASED_INVLPG_EXITING;
	return exec_control;
}

static u32 vmx_secondary_exec_control(struct vcpu_vmx *vmx)
{
	u32 exec_control = vmcs_config.cpu_based_2nd_exec_ctrl;
	if (!vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))
		exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
	if (vmx->vpid == 0)
		exec_control &= ~SECONDARY_EXEC_ENABLE_VPID;
	if (!enable_ept) {
		exec_control &= ~SECONDARY_EXEC_ENABLE_EPT;
		enable_unrestricted_guest = 0;
3780 3781
		/* Enable INVPCID for non-ept guests may cause performance regression. */
		exec_control &= ~SECONDARY_EXEC_ENABLE_INVPCID;
3782 3783 3784 3785 3786 3787 3788 3789
	}
	if (!enable_unrestricted_guest)
		exec_control &= ~SECONDARY_EXEC_UNRESTRICTED_GUEST;
	if (!ple_gap)
		exec_control &= ~SECONDARY_EXEC_PAUSE_LOOP_EXITING;
	return exec_control;
}

3790 3791 3792 3793 3794 3795 3796 3797 3798 3799 3800
static void ept_set_mmio_spte_mask(void)
{
	/*
	 * EPT Misconfigurations can be generated if the value of bits 2:0
	 * of an EPT paging-structure entry is 110b (write/execute).
	 * Also, magic bits (0xffull << 49) is set to quickly identify mmio
	 * spte.
	 */
	kvm_mmu_set_mmio_spte_mask(0xffull << 49 | 0x6ull);
}

A
Avi Kivity 已提交
3801 3802 3803
/*
 * Sets up the vmcs for emulated real mode.
 */
R
Rusty Russell 已提交
3804
static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
A
Avi Kivity 已提交
3805
{
3806
#ifdef CONFIG_X86_64
A
Avi Kivity 已提交
3807
	unsigned long a;
3808
#endif
A
Avi Kivity 已提交
3809 3810 3811
	int i;

	/* I/O */
3812 3813
	vmcs_write64(IO_BITMAP_A, __pa(vmx_io_bitmap_a));
	vmcs_write64(IO_BITMAP_B, __pa(vmx_io_bitmap_b));
A
Avi Kivity 已提交
3814

S
Sheng Yang 已提交
3815
	if (cpu_has_vmx_msr_bitmap())
3816
		vmcs_write64(MSR_BITMAP, __pa(vmx_msr_bitmap_legacy));
S
Sheng Yang 已提交
3817

A
Avi Kivity 已提交
3818 3819 3820
	vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */

	/* Control */
3821 3822
	vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
		vmcs_config.pin_based_exec_ctrl);
3823

3824
	vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, vmx_exec_control(vmx));
A
Avi Kivity 已提交
3825

3826
	if (cpu_has_secondary_exec_ctrls()) {
3827 3828
		vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
				vmx_secondary_exec_control(vmx));
3829
	}
3830

3831 3832 3833 3834 3835
	if (ple_gap) {
		vmcs_write32(PLE_GAP, ple_gap);
		vmcs_write32(PLE_WINDOW, ple_window);
	}

3836 3837
	vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
	vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
A
Avi Kivity 已提交
3838 3839
	vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */

3840 3841
	vmcs_write16(HOST_FS_SELECTOR, 0);            /* 22.2.4 */
	vmcs_write16(HOST_GS_SELECTOR, 0);            /* 22.2.4 */
3842
	vmx_set_constant_host_state();
3843
#ifdef CONFIG_X86_64
A
Avi Kivity 已提交
3844 3845 3846 3847 3848 3849 3850 3851 3852
	rdmsrl(MSR_FS_BASE, a);
	vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
	rdmsrl(MSR_GS_BASE, a);
	vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
#else
	vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
	vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
#endif

3853 3854
	vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
	vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
3855
	vmcs_write64(VM_EXIT_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.host));
3856
	vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
3857
	vmcs_write64(VM_ENTRY_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.guest));
A
Avi Kivity 已提交
3858

S
Sheng Yang 已提交
3859
	if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) {
3860 3861
		u32 msr_low, msr_high;
		u64 host_pat;
S
Sheng Yang 已提交
3862 3863 3864 3865 3866 3867 3868 3869
		rdmsr(MSR_IA32_CR_PAT, msr_low, msr_high);
		host_pat = msr_low | ((u64) msr_high << 32);
		/* Write the default value follow host pat */
		vmcs_write64(GUEST_IA32_PAT, host_pat);
		/* Keep arch.pat sync with GUEST_IA32_PAT */
		vmx->vcpu.arch.pat = host_pat;
	}

A
Avi Kivity 已提交
3870 3871 3872
	for (i = 0; i < NR_VMX_MSR; ++i) {
		u32 index = vmx_msr_index[i];
		u32 data_low, data_high;
3873
		int j = vmx->nmsrs;
A
Avi Kivity 已提交
3874 3875 3876

		if (rdmsr_safe(index, &data_low, &data_high) < 0)
			continue;
3877 3878
		if (wrmsr_safe(index, data_low, data_high) < 0)
			continue;
3879 3880
		vmx->guest_msrs[j].index = i;
		vmx->guest_msrs[j].data = 0;
3881
		vmx->guest_msrs[j].mask = -1ull;
3882
		++vmx->nmsrs;
A
Avi Kivity 已提交
3883 3884
	}

3885
	vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
A
Avi Kivity 已提交
3886 3887

	/* 22.2.1, 20.8.1 */
3888 3889
	vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);

3890
	vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
3891
	set_cr4_guest_host_mask(vmx);
3892

3893
	kvm_write_tsc(&vmx->vcpu, 0);
3894

3895 3896 3897 3898 3899 3900 3901
	return 0;
}

static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
{
	struct vcpu_vmx *vmx = to_vmx(vcpu);
	u64 msr;
3902
	int ret;
3903

3904
	vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP));
3905

3906
	vmx->rmode.vm86_active = 0;
3907

3908 3909
	vmx->soft_vnmi_blocked = 0;

3910
	vmx->vcpu.arch.regs[VCPU_REGS_RDX] = get_rdx_init_val();
3911
	kvm_set_cr8(&vmx->vcpu, 0);
3912
	msr = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
3913
	if (kvm_vcpu_is_bsp(&vmx->vcpu))
3914 3915 3916
		msr |= MSR_IA32_APICBASE_BSP;
	kvm_set_apic_base(&vmx->vcpu, msr);

3917 3918 3919
	ret = fx_init(&vmx->vcpu);
	if (ret != 0)
		goto out;
3920

A
Avi Kivity 已提交
3921 3922
	vmx_segment_cache_clear(vmx);

3923
	seg_setup(VCPU_SREG_CS);
3924 3925 3926 3927
	/*
	 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
	 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
	 */
3928
	if (kvm_vcpu_is_bsp(&vmx->vcpu)) {
3929 3930 3931
		vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
		vmcs_writel(GUEST_CS_BASE, 0x000f0000);
	} else {
3932 3933
		vmcs_write16(GUEST_CS_SELECTOR, vmx->vcpu.arch.sipi_vector << 8);
		vmcs_writel(GUEST_CS_BASE, vmx->vcpu.arch.sipi_vector << 12);
3934 3935 3936 3937 3938 3939 3940 3941 3942 3943 3944 3945 3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956
	}

	seg_setup(VCPU_SREG_DS);
	seg_setup(VCPU_SREG_ES);
	seg_setup(VCPU_SREG_FS);
	seg_setup(VCPU_SREG_GS);
	seg_setup(VCPU_SREG_SS);

	vmcs_write16(GUEST_TR_SELECTOR, 0);
	vmcs_writel(GUEST_TR_BASE, 0);
	vmcs_write32(GUEST_TR_LIMIT, 0xffff);
	vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);

	vmcs_write16(GUEST_LDTR_SELECTOR, 0);
	vmcs_writel(GUEST_LDTR_BASE, 0);
	vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
	vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);

	vmcs_write32(GUEST_SYSENTER_CS, 0);
	vmcs_writel(GUEST_SYSENTER_ESP, 0);
	vmcs_writel(GUEST_SYSENTER_EIP, 0);

	vmcs_writel(GUEST_RFLAGS, 0x02);
3957
	if (kvm_vcpu_is_bsp(&vmx->vcpu))
3958
		kvm_rip_write(vcpu, 0xfff0);
3959
	else
3960 3961
		kvm_rip_write(vcpu, 0);
	kvm_register_write(vcpu, VCPU_REGS_RSP, 0);
3962 3963 3964 3965 3966 3967 3968 3969 3970

	vmcs_writel(GUEST_DR7, 0x400);

	vmcs_writel(GUEST_GDTR_BASE, 0);
	vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);

	vmcs_writel(GUEST_IDTR_BASE, 0);
	vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);

3971
	vmcs_write32(GUEST_ACTIVITY_STATE, GUEST_ACTIVITY_ACTIVE);
3972 3973 3974 3975 3976 3977 3978 3979
	vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
	vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);

	/* Special registers */
	vmcs_write64(GUEST_IA32_DEBUGCTL, 0);

	setup_msrs(vmx);

A
Avi Kivity 已提交
3980 3981
	vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */

3982 3983 3984 3985
	if (cpu_has_vmx_tpr_shadow()) {
		vmcs_write64(VIRTUAL_APIC_PAGE_ADDR, 0);
		if (vm_need_tpr_shadow(vmx->vcpu.kvm))
			vmcs_write64(VIRTUAL_APIC_PAGE_ADDR,
3986
				     __pa(vmx->vcpu.arch.apic->regs));
3987 3988 3989 3990 3991
		vmcs_write32(TPR_THRESHOLD, 0);
	}

	if (vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))
		vmcs_write64(APIC_ACCESS_ADDR,
3992
			     page_to_phys(vmx->vcpu.kvm->arch.apic_access_page));
A
Avi Kivity 已提交
3993

3994 3995 3996
	if (vmx->vpid != 0)
		vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid);

3997
	vmx->vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET;
3998
	vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
3999
	vmx_set_cr0(&vmx->vcpu, kvm_read_cr0(vcpu)); /* enter rmode */
4000
	srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
R
Rusty Russell 已提交
4001 4002 4003 4004
	vmx_set_cr4(&vmx->vcpu, 0);
	vmx_set_efer(&vmx->vcpu, 0);
	vmx_fpu_activate(&vmx->vcpu);
	update_exception_bitmap(&vmx->vcpu);
A
Avi Kivity 已提交
4005

4006
	vpid_sync_context(vmx);
4007

4008
	ret = 0;
A
Avi Kivity 已提交
4009

4010 4011 4012
	/* HACK: Don't enable emulation on guest boot/reset */
	vmx->emulation_required = 0;

A
Avi Kivity 已提交
4013 4014 4015 4016
out:
	return ret;
}

4017 4018 4019 4020 4021 4022 4023 4024 4025 4026
/*
 * In nested virtualization, check if L1 asked to exit on external interrupts.
 * For most existing hypervisors, this will always return true.
 */
static bool nested_exit_on_intr(struct kvm_vcpu *vcpu)
{
	return get_vmcs12(vcpu)->pin_based_vm_exec_control &
		PIN_BASED_EXT_INTR_MASK;
}

4027 4028 4029
static void enable_irq_window(struct kvm_vcpu *vcpu)
{
	u32 cpu_based_vm_exec_control;
4030 4031 4032 4033 4034
	if (is_guest_mode(vcpu) && nested_exit_on_intr(vcpu)) {
		/*
		 * We get here if vmx_interrupt_allowed() said we can't
		 * inject to L1 now because L2 must run. Ask L2 to exit
		 * right after entry, so we can inject to L1 more promptly.
4035
		 */
4036
		kvm_make_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
4037
		return;
4038
	}
4039 4040 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4053

	cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
	cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
	vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
}

static void enable_nmi_window(struct kvm_vcpu *vcpu)
{
	u32 cpu_based_vm_exec_control;

	if (!cpu_has_virtual_nmis()) {
		enable_irq_window(vcpu);
		return;
	}

4054 4055 4056 4057
	if (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & GUEST_INTR_STATE_STI) {
		enable_irq_window(vcpu);
		return;
	}
4058 4059 4060 4061 4062
	cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
	cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_NMI_PENDING;
	vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
}

4063
static void vmx_inject_irq(struct kvm_vcpu *vcpu)
4064
{
4065
	struct vcpu_vmx *vmx = to_vmx(vcpu);
4066 4067
	uint32_t intr;
	int irq = vcpu->arch.interrupt.nr;
4068

4069
	trace_kvm_inj_virq(irq);
F
Feng (Eric) Liu 已提交
4070

4071
	++vcpu->stat.irq_injections;
4072
	if (vmx->rmode.vm86_active) {
4073 4074 4075 4076
		int inc_eip = 0;
		if (vcpu->arch.interrupt.soft)
			inc_eip = vcpu->arch.event_exit_inst_len;
		if (kvm_inject_realmode_interrupt(vcpu, irq, inc_eip) != EMULATE_DONE)
4077
			kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4078 4079
		return;
	}
4080 4081 4082 4083 4084 4085 4086 4087
	intr = irq | INTR_INFO_VALID_MASK;
	if (vcpu->arch.interrupt.soft) {
		intr |= INTR_TYPE_SOFT_INTR;
		vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
			     vmx->vcpu.arch.event_exit_inst_len);
	} else
		intr |= INTR_TYPE_EXT_INTR;
	vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr);
4088 4089
}

4090 4091
static void vmx_inject_nmi(struct kvm_vcpu *vcpu)
{
J
Jan Kiszka 已提交
4092 4093
	struct vcpu_vmx *vmx = to_vmx(vcpu);

4094 4095 4096
	if (is_guest_mode(vcpu))
		return;

4097 4098 4099 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109
	if (!cpu_has_virtual_nmis()) {
		/*
		 * Tracking the NMI-blocked state in software is built upon
		 * finding the next open IRQ window. This, in turn, depends on
		 * well-behaving guests: They have to keep IRQs disabled at
		 * least as long as the NMI handler runs. Otherwise we may
		 * cause NMI nesting, maybe breaking the guest. But as this is
		 * highly unlikely, we can live with the residual risk.
		 */
		vmx->soft_vnmi_blocked = 1;
		vmx->vnmi_blocked_time = 0;
	}

4110
	++vcpu->stat.nmi_injections;
4111
	vmx->nmi_known_unmasked = false;
4112
	if (vmx->rmode.vm86_active) {
4113
		if (kvm_inject_realmode_interrupt(vcpu, NMI_VECTOR, 0) != EMULATE_DONE)
4114
			kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
J
Jan Kiszka 已提交
4115 4116
		return;
	}
4117 4118 4119 4120
	vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
			INTR_TYPE_NMI_INTR | INTR_INFO_VALID_MASK | NMI_VECTOR);
}

4121
static int vmx_nmi_allowed(struct kvm_vcpu *vcpu)
4122
{
4123
	if (!cpu_has_virtual_nmis() && to_vmx(vcpu)->soft_vnmi_blocked)
4124
		return 0;
4125

4126
	return	!(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
4127 4128
		  (GUEST_INTR_STATE_MOV_SS | GUEST_INTR_STATE_STI
		   | GUEST_INTR_STATE_NMI));
4129 4130
}

J
Jan Kiszka 已提交
4131 4132 4133 4134
static bool vmx_get_nmi_mask(struct kvm_vcpu *vcpu)
{
	if (!cpu_has_virtual_nmis())
		return to_vmx(vcpu)->soft_vnmi_blocked;
4135 4136
	if (to_vmx(vcpu)->nmi_known_unmasked)
		return false;
4137
	return vmcs_read32(GUEST_INTERRUPTIBILITY_INFO)	& GUEST_INTR_STATE_NMI;
J
Jan Kiszka 已提交
4138 4139 4140 4141 4142 4143 4144 4145 4146 4147 4148 4149
}

static void vmx_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked)
{
	struct vcpu_vmx *vmx = to_vmx(vcpu);

	if (!cpu_has_virtual_nmis()) {
		if (vmx->soft_vnmi_blocked != masked) {
			vmx->soft_vnmi_blocked = masked;
			vmx->vnmi_blocked_time = 0;
		}
	} else {
4150
		vmx->nmi_known_unmasked = !masked;
J
Jan Kiszka 已提交
4151 4152 4153 4154 4155 4156 4157 4158 4159
		if (masked)
			vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO,
				      GUEST_INTR_STATE_NMI);
		else
			vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO,
					GUEST_INTR_STATE_NMI);
	}
}

4160 4161
static int vmx_interrupt_allowed(struct kvm_vcpu *vcpu)
{
4162
	if (is_guest_mode(vcpu) && nested_exit_on_intr(vcpu)) {
4163 4164 4165 4166
		struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
		if (to_vmx(vcpu)->nested.nested_run_pending ||
		    (vmcs12->idt_vectoring_info_field &
		     VECTORING_INFO_VALID_MASK))
4167 4168 4169 4170 4171 4172 4173
			return 0;
		nested_vmx_vmexit(vcpu);
		vmcs12->vm_exit_reason = EXIT_REASON_EXTERNAL_INTERRUPT;
		vmcs12->vm_exit_intr_info = 0;
		/* fall through to normal code, but now in L1, not L2 */
	}

4174 4175 4176
	return (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
		!(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
			(GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS));
4177 4178
}

4179 4180 4181 4182
static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr)
{
	int ret;
	struct kvm_userspace_memory_region tss_mem = {
4183
		.slot = TSS_PRIVATE_MEMSLOT,
4184 4185 4186 4187 4188 4189 4190 4191
		.guest_phys_addr = addr,
		.memory_size = PAGE_SIZE * 3,
		.flags = 0,
	};

	ret = kvm_set_memory_region(kvm, &tss_mem, 0);
	if (ret)
		return ret;
4192
	kvm->arch.tss_addr = addr;
4193 4194 4195
	if (!init_rmode_tss(kvm))
		return  -ENOMEM;

4196 4197 4198
	return 0;
}

A
Avi Kivity 已提交
4199 4200 4201
static int handle_rmode_exception(struct kvm_vcpu *vcpu,
				  int vec, u32 err_code)
{
4202 4203 4204 4205 4206
	/*
	 * Instruction with address size override prefix opcode 0x67
	 * Cause the #SS fault with 0 error code in VM86 mode.
	 */
	if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
4207
		if (emulate_instruction(vcpu, 0) == EMULATE_DONE)
A
Avi Kivity 已提交
4208
			return 1;
4209 4210 4211 4212 4213 4214 4215
	/*
	 * Forward all other exceptions that are valid in real mode.
	 * FIXME: Breaks guest debugging in real mode, needs to be fixed with
	 *        the required debugging infrastructure rework.
	 */
	switch (vec) {
	case DB_VECTOR:
J
Jan Kiszka 已提交
4216 4217 4218 4219 4220
		if (vcpu->guest_debug &
		    (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))
			return 0;
		kvm_queue_exception(vcpu, vec);
		return 1;
4221
	case BP_VECTOR:
4222 4223 4224 4225 4226 4227
		/*
		 * Update instruction length as we may reinject the exception
		 * from user space while in guest debugging mode.
		 */
		to_vmx(vcpu)->vcpu.arch.event_exit_inst_len =
			vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
J
Jan Kiszka 已提交
4228 4229 4230 4231
		if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
			return 0;
		/* fall through */
	case DE_VECTOR:
4232 4233 4234 4235 4236 4237 4238 4239 4240 4241
	case OF_VECTOR:
	case BR_VECTOR:
	case UD_VECTOR:
	case DF_VECTOR:
	case SS_VECTOR:
	case GP_VECTOR:
	case MF_VECTOR:
		kvm_queue_exception(vcpu, vec);
		return 1;
	}
A
Avi Kivity 已提交
4242 4243 4244
	return 0;
}

A
Andi Kleen 已提交
4245 4246 4247 4248 4249 4250 4251 4252 4253 4254 4255 4256 4257 4258 4259 4260 4261 4262 4263
/*
 * Trigger machine check on the host. We assume all the MSRs are already set up
 * by the CPU and that we still run on the same CPU as the MCE occurred on.
 * We pass a fake environment to the machine check handler because we want
 * the guest to be always treated like user space, no matter what context
 * it used internally.
 */
static void kvm_machine_check(void)
{
#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_64)
	struct pt_regs regs = {
		.cs = 3, /* Fake ring 3 no matter what the guest ran on */
		.flags = X86_EFLAGS_IF,
	};

	do_machine_check(&regs, 0);
#endif
}

A
Avi Kivity 已提交
4264
static int handle_machine_check(struct kvm_vcpu *vcpu)
A
Andi Kleen 已提交
4265 4266 4267 4268 4269
{
	/* already handled by vcpu_run */
	return 1;
}

A
Avi Kivity 已提交
4270
static int handle_exception(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
4271
{
4272
	struct vcpu_vmx *vmx = to_vmx(vcpu);
A
Avi Kivity 已提交
4273
	struct kvm_run *kvm_run = vcpu->run;
J
Jan Kiszka 已提交
4274
	u32 intr_info, ex_no, error_code;
4275
	unsigned long cr2, rip, dr6;
A
Avi Kivity 已提交
4276 4277 4278
	u32 vect_info;
	enum emulation_result er;

4279
	vect_info = vmx->idt_vectoring_info;
4280
	intr_info = vmx->exit_intr_info;
A
Avi Kivity 已提交
4281

A
Andi Kleen 已提交
4282
	if (is_machine_check(intr_info))
A
Avi Kivity 已提交
4283
		return handle_machine_check(vcpu);
A
Andi Kleen 已提交
4284

A
Avi Kivity 已提交
4285
	if ((vect_info & VECTORING_INFO_VALID_MASK) &&
4286 4287 4288 4289 4290 4291 4292 4293
	    !is_page_fault(intr_info)) {
		vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
		vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_SIMUL_EX;
		vcpu->run->internal.ndata = 2;
		vcpu->run->internal.data[0] = vect_info;
		vcpu->run->internal.data[1] = intr_info;
		return 0;
	}
A
Avi Kivity 已提交
4294

4295
	if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_NMI_INTR)
4296
		return 1;  /* already handled by vmx_vcpu_run() */
4297 4298

	if (is_no_device(intr_info)) {
4299
		vmx_fpu_activate(vcpu);
4300 4301 4302
		return 1;
	}

4303
	if (is_invalid_opcode(intr_info)) {
4304
		er = emulate_instruction(vcpu, EMULTYPE_TRAP_UD);
4305
		if (er != EMULATE_DONE)
4306
			kvm_queue_exception(vcpu, UD_VECTOR);
4307 4308 4309
		return 1;
	}

A
Avi Kivity 已提交
4310
	error_code = 0;
4311
	if (intr_info & INTR_INFO_DELIVER_CODE_MASK)
A
Avi Kivity 已提交
4312 4313
		error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
	if (is_page_fault(intr_info)) {
4314
		/* EPT won't cause page fault directly */
J
Julia Lawall 已提交
4315
		BUG_ON(enable_ept);
A
Avi Kivity 已提交
4316
		cr2 = vmcs_readl(EXIT_QUALIFICATION);
4317 4318
		trace_kvm_page_fault(cr2, error_code);

4319
		if (kvm_event_needs_reinjection(vcpu))
4320
			kvm_mmu_unprotect_page_virt(vcpu, cr2);
4321
		return kvm_mmu_page_fault(vcpu, cr2, error_code, NULL, 0);
A
Avi Kivity 已提交
4322 4323
	}

4324
	if (vmx->rmode.vm86_active &&
A
Avi Kivity 已提交
4325
	    handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
4326
								error_code)) {
4327 4328
		if (vcpu->arch.halt_request) {
			vcpu->arch.halt_request = 0;
4329 4330
			return kvm_emulate_halt(vcpu);
		}
A
Avi Kivity 已提交
4331
		return 1;
4332
	}
A
Avi Kivity 已提交
4333

J
Jan Kiszka 已提交
4334
	ex_no = intr_info & INTR_INFO_VECTOR_MASK;
4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346 4347
	switch (ex_no) {
	case DB_VECTOR:
		dr6 = vmcs_readl(EXIT_QUALIFICATION);
		if (!(vcpu->guest_debug &
		      (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {
			vcpu->arch.dr6 = dr6 | DR6_FIXED_1;
			kvm_queue_exception(vcpu, DB_VECTOR);
			return 1;
		}
		kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1;
		kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7);
		/* fall through */
	case BP_VECTOR:
4348 4349 4350 4351 4352 4353 4354
		/*
		 * Update instruction length as we may reinject #BP from
		 * user space while in guest debugging mode. Reading it for
		 * #DB as well causes no harm, it is not used in that case.
		 */
		vmx->vcpu.arch.event_exit_inst_len =
			vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
A
Avi Kivity 已提交
4355
		kvm_run->exit_reason = KVM_EXIT_DEBUG;
4356
		rip = kvm_rip_read(vcpu);
J
Jan Kiszka 已提交
4357 4358
		kvm_run->debug.arch.pc = vmcs_readl(GUEST_CS_BASE) + rip;
		kvm_run->debug.arch.exception = ex_no;
4359 4360
		break;
	default:
J
Jan Kiszka 已提交
4361 4362 4363
		kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
		kvm_run->ex.exception = ex_no;
		kvm_run->ex.error_code = error_code;
4364
		break;
A
Avi Kivity 已提交
4365 4366 4367 4368
	}
	return 0;
}

A
Avi Kivity 已提交
4369
static int handle_external_interrupt(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
4370
{
A
Avi Kivity 已提交
4371
	++vcpu->stat.irq_exits;
A
Avi Kivity 已提交
4372 4373 4374
	return 1;
}

A
Avi Kivity 已提交
4375
static int handle_triple_fault(struct kvm_vcpu *vcpu)
4376
{
A
Avi Kivity 已提交
4377
	vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4378 4379
	return 0;
}
A
Avi Kivity 已提交
4380

A
Avi Kivity 已提交
4381
static int handle_io(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
4382
{
4383
	unsigned long exit_qualification;
4384
	int size, in, string;
4385
	unsigned port;
A
Avi Kivity 已提交
4386

4387
	exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
4388
	string = (exit_qualification & 16) != 0;
4389
	in = (exit_qualification & 8) != 0;
4390

4391
	++vcpu->stat.io_exits;
4392

4393
	if (string || in)
4394
		return emulate_instruction(vcpu, 0) == EMULATE_DONE;
4395

4396 4397
	port = exit_qualification >> 16;
	size = (exit_qualification & 7) + 1;
4398
	skip_emulated_instruction(vcpu);
4399 4400

	return kvm_fast_pio_out(vcpu, size, port);
A
Avi Kivity 已提交
4401 4402
}

I
Ingo Molnar 已提交
4403 4404 4405 4406 4407 4408 4409 4410 4411 4412 4413
static void
vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
{
	/*
	 * Patch in the VMCALL instruction:
	 */
	hypercall[0] = 0x0f;
	hypercall[1] = 0x01;
	hypercall[2] = 0xc1;
}

G
Guo Chao 已提交
4414
/* called to set cr0 as appropriate for a mov-to-cr0 exit. */
4415 4416 4417 4418 4419 4420 4421 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431 4432 4433 4434 4435 4436 4437 4438 4439 4440 4441 4442 4443 4444 4445 4446 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458 4459 4460 4461 4462 4463 4464 4465
static int handle_set_cr0(struct kvm_vcpu *vcpu, unsigned long val)
{
	if (to_vmx(vcpu)->nested.vmxon &&
	    ((val & VMXON_CR0_ALWAYSON) != VMXON_CR0_ALWAYSON))
		return 1;

	if (is_guest_mode(vcpu)) {
		/*
		 * We get here when L2 changed cr0 in a way that did not change
		 * any of L1's shadowed bits (see nested_vmx_exit_handled_cr),
		 * but did change L0 shadowed bits. This can currently happen
		 * with the TS bit: L0 may want to leave TS on (for lazy fpu
		 * loading) while pretending to allow the guest to change it.
		 */
		if (kvm_set_cr0(vcpu, (val & vcpu->arch.cr0_guest_owned_bits) |
			 (vcpu->arch.cr0 & ~vcpu->arch.cr0_guest_owned_bits)))
			return 1;
		vmcs_writel(CR0_READ_SHADOW, val);
		return 0;
	} else
		return kvm_set_cr0(vcpu, val);
}

static int handle_set_cr4(struct kvm_vcpu *vcpu, unsigned long val)
{
	if (is_guest_mode(vcpu)) {
		if (kvm_set_cr4(vcpu, (val & vcpu->arch.cr4_guest_owned_bits) |
			 (vcpu->arch.cr4 & ~vcpu->arch.cr4_guest_owned_bits)))
			return 1;
		vmcs_writel(CR4_READ_SHADOW, val);
		return 0;
	} else
		return kvm_set_cr4(vcpu, val);
}

/* called to set cr0 as approriate for clts instruction exit. */
static void handle_clts(struct kvm_vcpu *vcpu)
{
	if (is_guest_mode(vcpu)) {
		/*
		 * We get here when L2 did CLTS, and L1 didn't shadow CR0.TS
		 * but we did (!fpu_active). We need to keep GUEST_CR0.TS on,
		 * just pretend it's off (also in arch.cr0 for fpu_activate).
		 */
		vmcs_writel(CR0_READ_SHADOW,
			vmcs_readl(CR0_READ_SHADOW) & ~X86_CR0_TS);
		vcpu->arch.cr0 &= ~X86_CR0_TS;
	} else
		vmx_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
}

A
Avi Kivity 已提交
4466
static int handle_cr(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
4467
{
4468
	unsigned long exit_qualification, val;
A
Avi Kivity 已提交
4469 4470
	int cr;
	int reg;
4471
	int err;
A
Avi Kivity 已提交
4472

4473
	exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
A
Avi Kivity 已提交
4474 4475 4476 4477
	cr = exit_qualification & 15;
	reg = (exit_qualification >> 8) & 15;
	switch ((exit_qualification >> 4) & 3) {
	case 0: /* mov to cr */
4478 4479
		val = kvm_register_read(vcpu, reg);
		trace_kvm_cr_write(cr, val);
A
Avi Kivity 已提交
4480 4481
		switch (cr) {
		case 0:
4482
			err = handle_set_cr0(vcpu, val);
4483
			kvm_complete_insn_gp(vcpu, err);
A
Avi Kivity 已提交
4484 4485
			return 1;
		case 3:
4486
			err = kvm_set_cr3(vcpu, val);
4487
			kvm_complete_insn_gp(vcpu, err);
A
Avi Kivity 已提交
4488 4489
			return 1;
		case 4:
4490
			err = handle_set_cr4(vcpu, val);
4491
			kvm_complete_insn_gp(vcpu, err);
A
Avi Kivity 已提交
4492
			return 1;
4493 4494 4495
		case 8: {
				u8 cr8_prev = kvm_get_cr8(vcpu);
				u8 cr8 = kvm_register_read(vcpu, reg);
A
Andre Przywara 已提交
4496
				err = kvm_set_cr8(vcpu, cr8);
4497
				kvm_complete_insn_gp(vcpu, err);
4498 4499 4500 4501
				if (irqchip_in_kernel(vcpu->kvm))
					return 1;
				if (cr8_prev <= cr8)
					return 1;
A
Avi Kivity 已提交
4502
				vcpu->run->exit_reason = KVM_EXIT_SET_TPR;
4503 4504
				return 0;
			}
A
Avi Kivity 已提交
4505 4506
		};
		break;
4507
	case 2: /* clts */
4508
		handle_clts(vcpu);
4509
		trace_kvm_cr_write(0, kvm_read_cr0(vcpu));
4510
		skip_emulated_instruction(vcpu);
A
Avi Kivity 已提交
4511
		vmx_fpu_activate(vcpu);
4512
		return 1;
A
Avi Kivity 已提交
4513 4514 4515
	case 1: /*mov from cr*/
		switch (cr) {
		case 3:
4516 4517 4518
			val = kvm_read_cr3(vcpu);
			kvm_register_write(vcpu, reg, val);
			trace_kvm_cr_read(cr, val);
A
Avi Kivity 已提交
4519 4520 4521
			skip_emulated_instruction(vcpu);
			return 1;
		case 8:
4522 4523 4524
			val = kvm_get_cr8(vcpu);
			kvm_register_write(vcpu, reg, val);
			trace_kvm_cr_read(cr, val);
A
Avi Kivity 已提交
4525 4526 4527 4528 4529
			skip_emulated_instruction(vcpu);
			return 1;
		}
		break;
	case 3: /* lmsw */
4530
		val = (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f;
4531
		trace_kvm_cr_write(0, (kvm_read_cr0(vcpu) & ~0xful) | val);
4532
		kvm_lmsw(vcpu, val);
A
Avi Kivity 已提交
4533 4534 4535 4536 4537 4538

		skip_emulated_instruction(vcpu);
		return 1;
	default:
		break;
	}
A
Avi Kivity 已提交
4539
	vcpu->run->exit_reason = 0;
4540
	vcpu_unimpl(vcpu, "unhandled control register: op %d cr %d\n",
A
Avi Kivity 已提交
4541 4542 4543 4544
	       (int)(exit_qualification >> 4) & 3, cr);
	return 0;
}

A
Avi Kivity 已提交
4545
static int handle_dr(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
4546
{
4547
	unsigned long exit_qualification;
A
Avi Kivity 已提交
4548 4549
	int dr, reg;

4550
	/* Do not handle if the CPL > 0, will trigger GP on re-entry */
4551 4552
	if (!kvm_require_cpl(vcpu, 0))
		return 1;
4553 4554 4555 4556 4557 4558 4559 4560
	dr = vmcs_readl(GUEST_DR7);
	if (dr & DR7_GD) {
		/*
		 * As the vm-exit takes precedence over the debug trap, we
		 * need to emulate the latter, either for the host or the
		 * guest debugging itself.
		 */
		if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
A
Avi Kivity 已提交
4561 4562 4563
			vcpu->run->debug.arch.dr6 = vcpu->arch.dr6;
			vcpu->run->debug.arch.dr7 = dr;
			vcpu->run->debug.arch.pc =
4564 4565
				vmcs_readl(GUEST_CS_BASE) +
				vmcs_readl(GUEST_RIP);
A
Avi Kivity 已提交
4566 4567
			vcpu->run->debug.arch.exception = DB_VECTOR;
			vcpu->run->exit_reason = KVM_EXIT_DEBUG;
4568 4569 4570 4571 4572 4573 4574 4575 4576 4577
			return 0;
		} else {
			vcpu->arch.dr7 &= ~DR7_GD;
			vcpu->arch.dr6 |= DR6_BD;
			vmcs_writel(GUEST_DR7, vcpu->arch.dr7);
			kvm_queue_exception(vcpu, DB_VECTOR);
			return 1;
		}
	}

4578
	exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
4579 4580 4581
	dr = exit_qualification & DEBUG_REG_ACCESS_NUM;
	reg = DEBUG_REG_ACCESS_REG(exit_qualification);
	if (exit_qualification & TYPE_MOV_FROM_DR) {
4582 4583 4584 4585 4586
		unsigned long val;
		if (!kvm_get_dr(vcpu, dr, &val))
			kvm_register_write(vcpu, reg, val);
	} else
		kvm_set_dr(vcpu, dr, vcpu->arch.regs[reg]);
A
Avi Kivity 已提交
4587 4588 4589 4590
	skip_emulated_instruction(vcpu);
	return 1;
}

4591 4592 4593 4594 4595
static void vmx_set_dr7(struct kvm_vcpu *vcpu, unsigned long val)
{
	vmcs_writel(GUEST_DR7, val);
}

A
Avi Kivity 已提交
4596
static int handle_cpuid(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
4597
{
4598 4599
	kvm_emulate_cpuid(vcpu);
	return 1;
A
Avi Kivity 已提交
4600 4601
}

A
Avi Kivity 已提交
4602
static int handle_rdmsr(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
4603
{
4604
	u32 ecx = vcpu->arch.regs[VCPU_REGS_RCX];
A
Avi Kivity 已提交
4605 4606 4607
	u64 data;

	if (vmx_get_msr(vcpu, ecx, &data)) {
4608
		trace_kvm_msr_read_ex(ecx);
4609
		kvm_inject_gp(vcpu, 0);
A
Avi Kivity 已提交
4610 4611 4612
		return 1;
	}

4613
	trace_kvm_msr_read(ecx, data);
F
Feng (Eric) Liu 已提交
4614

A
Avi Kivity 已提交
4615
	/* FIXME: handling of bits 32:63 of rax, rdx */
4616 4617
	vcpu->arch.regs[VCPU_REGS_RAX] = data & -1u;
	vcpu->arch.regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
A
Avi Kivity 已提交
4618 4619 4620 4621
	skip_emulated_instruction(vcpu);
	return 1;
}

A
Avi Kivity 已提交
4622
static int handle_wrmsr(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
4623
{
4624 4625 4626
	u32 ecx = vcpu->arch.regs[VCPU_REGS_RCX];
	u64 data = (vcpu->arch.regs[VCPU_REGS_RAX] & -1u)
		| ((u64)(vcpu->arch.regs[VCPU_REGS_RDX] & -1u) << 32);
A
Avi Kivity 已提交
4627 4628

	if (vmx_set_msr(vcpu, ecx, data) != 0) {
4629
		trace_kvm_msr_write_ex(ecx, data);
4630
		kvm_inject_gp(vcpu, 0);
A
Avi Kivity 已提交
4631 4632 4633
		return 1;
	}

4634
	trace_kvm_msr_write(ecx, data);
A
Avi Kivity 已提交
4635 4636 4637 4638
	skip_emulated_instruction(vcpu);
	return 1;
}

A
Avi Kivity 已提交
4639
static int handle_tpr_below_threshold(struct kvm_vcpu *vcpu)
4640
{
4641
	kvm_make_request(KVM_REQ_EVENT, vcpu);
4642 4643 4644
	return 1;
}

A
Avi Kivity 已提交
4645
static int handle_interrupt_window(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
4646
{
4647 4648 4649 4650 4651 4652
	u32 cpu_based_vm_exec_control;

	/* clear pending irq */
	cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
	cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
	vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
F
Feng (Eric) Liu 已提交
4653

4654 4655
	kvm_make_request(KVM_REQ_EVENT, vcpu);

4656
	++vcpu->stat.irq_window_exits;
F
Feng (Eric) Liu 已提交
4657

4658 4659 4660 4661
	/*
	 * If the user space waits to inject interrupts, exit as soon as
	 * possible
	 */
4662
	if (!irqchip_in_kernel(vcpu->kvm) &&
A
Avi Kivity 已提交
4663
	    vcpu->run->request_interrupt_window &&
4664
	    !kvm_cpu_has_interrupt(vcpu)) {
A
Avi Kivity 已提交
4665
		vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
4666 4667
		return 0;
	}
A
Avi Kivity 已提交
4668 4669 4670
	return 1;
}

A
Avi Kivity 已提交
4671
static int handle_halt(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
4672 4673
{
	skip_emulated_instruction(vcpu);
4674
	return kvm_emulate_halt(vcpu);
A
Avi Kivity 已提交
4675 4676
}

A
Avi Kivity 已提交
4677
static int handle_vmcall(struct kvm_vcpu *vcpu)
4678
{
4679
	skip_emulated_instruction(vcpu);
4680 4681
	kvm_emulate_hypercall(vcpu);
	return 1;
4682 4683
}

4684 4685
static int handle_invd(struct kvm_vcpu *vcpu)
{
4686
	return emulate_instruction(vcpu, 0) == EMULATE_DONE;
4687 4688
}

A
Avi Kivity 已提交
4689
static int handle_invlpg(struct kvm_vcpu *vcpu)
M
Marcelo Tosatti 已提交
4690
{
4691
	unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
M
Marcelo Tosatti 已提交
4692 4693 4694 4695 4696 4697

	kvm_mmu_invlpg(vcpu, exit_qualification);
	skip_emulated_instruction(vcpu);
	return 1;
}

A
Avi Kivity 已提交
4698 4699 4700 4701 4702 4703 4704 4705 4706 4707
static int handle_rdpmc(struct kvm_vcpu *vcpu)
{
	int err;

	err = kvm_rdpmc(vcpu);
	kvm_complete_insn_gp(vcpu, err);

	return 1;
}

A
Avi Kivity 已提交
4708
static int handle_wbinvd(struct kvm_vcpu *vcpu)
E
Eddie Dong 已提交
4709 4710
{
	skip_emulated_instruction(vcpu);
4711
	kvm_emulate_wbinvd(vcpu);
E
Eddie Dong 已提交
4712 4713 4714
	return 1;
}

4715 4716 4717 4718 4719 4720 4721 4722 4723 4724
static int handle_xsetbv(struct kvm_vcpu *vcpu)
{
	u64 new_bv = kvm_read_edx_eax(vcpu);
	u32 index = kvm_register_read(vcpu, VCPU_REGS_RCX);

	if (kvm_set_xcr(vcpu, index, new_bv) == 0)
		skip_emulated_instruction(vcpu);
	return 1;
}

A
Avi Kivity 已提交
4725
static int handle_apic_access(struct kvm_vcpu *vcpu)
4726
{
4727 4728 4729 4730 4731 4732 4733 4734 4735 4736 4737 4738 4739 4740 4741 4742 4743 4744
	if (likely(fasteoi)) {
		unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
		int access_type, offset;

		access_type = exit_qualification & APIC_ACCESS_TYPE;
		offset = exit_qualification & APIC_ACCESS_OFFSET;
		/*
		 * Sane guest uses MOV to write EOI, with written value
		 * not cared. So make a short-circuit here by avoiding
		 * heavy instruction emulation.
		 */
		if ((access_type == TYPE_LINEAR_APIC_INST_WRITE) &&
		    (offset == APIC_EOI)) {
			kvm_lapic_set_eoi(vcpu);
			skip_emulated_instruction(vcpu);
			return 1;
		}
	}
4745
	return emulate_instruction(vcpu, 0) == EMULATE_DONE;
4746 4747
}

A
Avi Kivity 已提交
4748
static int handle_task_switch(struct kvm_vcpu *vcpu)
4749
{
J
Jan Kiszka 已提交
4750
	struct vcpu_vmx *vmx = to_vmx(vcpu);
4751
	unsigned long exit_qualification;
4752 4753
	bool has_error_code = false;
	u32 error_code = 0;
4754
	u16 tss_selector;
4755
	int reason, type, idt_v, idt_index;
4756 4757

	idt_v = (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK);
4758
	idt_index = (vmx->idt_vectoring_info & VECTORING_INFO_VECTOR_MASK);
4759
	type = (vmx->idt_vectoring_info & VECTORING_INFO_TYPE_MASK);
4760 4761 4762 4763

	exit_qualification = vmcs_readl(EXIT_QUALIFICATION);

	reason = (u32)exit_qualification >> 30;
4764 4765 4766 4767
	if (reason == TASK_SWITCH_GATE && idt_v) {
		switch (type) {
		case INTR_TYPE_NMI_INTR:
			vcpu->arch.nmi_injected = false;
4768
			vmx_set_nmi_mask(vcpu, true);
4769 4770
			break;
		case INTR_TYPE_EXT_INTR:
4771
		case INTR_TYPE_SOFT_INTR:
4772 4773 4774
			kvm_clear_interrupt_queue(vcpu);
			break;
		case INTR_TYPE_HARD_EXCEPTION:
4775 4776 4777 4778 4779 4780 4781
			if (vmx->idt_vectoring_info &
			    VECTORING_INFO_DELIVER_CODE_MASK) {
				has_error_code = true;
				error_code =
					vmcs_read32(IDT_VECTORING_ERROR_CODE);
			}
			/* fall through */
4782 4783 4784 4785 4786 4787
		case INTR_TYPE_SOFT_EXCEPTION:
			kvm_clear_exception_queue(vcpu);
			break;
		default:
			break;
		}
J
Jan Kiszka 已提交
4788
	}
4789 4790
	tss_selector = exit_qualification;

4791 4792 4793 4794 4795
	if (!idt_v || (type != INTR_TYPE_HARD_EXCEPTION &&
		       type != INTR_TYPE_EXT_INTR &&
		       type != INTR_TYPE_NMI_INTR))
		skip_emulated_instruction(vcpu);

4796 4797 4798
	if (kvm_task_switch(vcpu, tss_selector,
			    type == INTR_TYPE_SOFT_INTR ? idt_index : -1, reason,
			    has_error_code, error_code) == EMULATE_FAIL) {
4799 4800 4801
		vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
		vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
		vcpu->run->internal.ndata = 0;
4802
		return 0;
4803
	}
4804 4805 4806 4807 4808 4809 4810 4811 4812 4813

	/* clear all local breakpoint enable flags */
	vmcs_writel(GUEST_DR7, vmcs_readl(GUEST_DR7) & ~55);

	/*
	 * TODO: What about debug traps on tss switch?
	 *       Are we supposed to inject them and update dr6?
	 */

	return 1;
4814 4815
}

A
Avi Kivity 已提交
4816
static int handle_ept_violation(struct kvm_vcpu *vcpu)
4817
{
4818
	unsigned long exit_qualification;
4819
	gpa_t gpa;
4820
	u32 error_code;
4821 4822
	int gla_validity;

4823
	exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
4824 4825 4826

	if (exit_qualification & (1 << 6)) {
		printk(KERN_ERR "EPT: GPA exceeds GAW!\n");
4827
		return -EINVAL;
4828 4829 4830 4831 4832 4833 4834
	}

	gla_validity = (exit_qualification >> 7) & 0x3;
	if (gla_validity != 0x3 && gla_validity != 0x1 && gla_validity != 0) {
		printk(KERN_ERR "EPT: Handling EPT violation failed!\n");
		printk(KERN_ERR "EPT: GPA: 0x%lx, GVA: 0x%lx\n",
			(long unsigned int)vmcs_read64(GUEST_PHYSICAL_ADDRESS),
4835
			vmcs_readl(GUEST_LINEAR_ADDRESS));
4836 4837
		printk(KERN_ERR "EPT: Exit qualification is 0x%lx\n",
			(long unsigned int)exit_qualification);
A
Avi Kivity 已提交
4838 4839
		vcpu->run->exit_reason = KVM_EXIT_UNKNOWN;
		vcpu->run->hw.hardware_exit_reason = EXIT_REASON_EPT_VIOLATION;
4840
		return 0;
4841 4842 4843
	}

	gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS);
4844
	trace_kvm_page_fault(gpa, exit_qualification);
4845 4846 4847 4848 4849 4850 4851

	/* It is a write fault? */
	error_code = exit_qualification & (1U << 1);
	/* ept page table is present? */
	error_code |= (exit_qualification >> 3) & 0x1;

	return kvm_mmu_page_fault(vcpu, gpa, error_code, NULL, 0);
4852 4853
}

4854 4855 4856 4857 4858 4859 4860 4861 4862 4863 4864 4865 4866 4867 4868 4869 4870 4871 4872 4873 4874 4875 4876 4877 4878 4879 4880 4881 4882 4883 4884 4885 4886 4887 4888 4889 4890 4891 4892 4893 4894 4895 4896 4897 4898 4899 4900 4901 4902 4903 4904 4905 4906 4907 4908 4909 4910 4911 4912 4913 4914
static u64 ept_rsvd_mask(u64 spte, int level)
{
	int i;
	u64 mask = 0;

	for (i = 51; i > boot_cpu_data.x86_phys_bits; i--)
		mask |= (1ULL << i);

	if (level > 2)
		/* bits 7:3 reserved */
		mask |= 0xf8;
	else if (level == 2) {
		if (spte & (1ULL << 7))
			/* 2MB ref, bits 20:12 reserved */
			mask |= 0x1ff000;
		else
			/* bits 6:3 reserved */
			mask |= 0x78;
	}

	return mask;
}

static void ept_misconfig_inspect_spte(struct kvm_vcpu *vcpu, u64 spte,
				       int level)
{
	printk(KERN_ERR "%s: spte 0x%llx level %d\n", __func__, spte, level);

	/* 010b (write-only) */
	WARN_ON((spte & 0x7) == 0x2);

	/* 110b (write/execute) */
	WARN_ON((spte & 0x7) == 0x6);

	/* 100b (execute-only) and value not supported by logical processor */
	if (!cpu_has_vmx_ept_execute_only())
		WARN_ON((spte & 0x7) == 0x4);

	/* not 000b */
	if ((spte & 0x7)) {
		u64 rsvd_bits = spte & ept_rsvd_mask(spte, level);

		if (rsvd_bits != 0) {
			printk(KERN_ERR "%s: rsvd_bits = 0x%llx\n",
					 __func__, rsvd_bits);
			WARN_ON(1);
		}

		if (level == 1 || (level == 2 && (spte & (1ULL << 7)))) {
			u64 ept_mem_type = (spte & 0x38) >> 3;

			if (ept_mem_type == 2 || ept_mem_type == 3 ||
			    ept_mem_type == 7) {
				printk(KERN_ERR "%s: ept_mem_type=0x%llx\n",
						__func__, ept_mem_type);
				WARN_ON(1);
			}
		}
	}
}

A
Avi Kivity 已提交
4915
static int handle_ept_misconfig(struct kvm_vcpu *vcpu)
4916 4917
{
	u64 sptes[4];
4918
	int nr_sptes, i, ret;
4919 4920 4921 4922
	gpa_t gpa;

	gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS);

4923 4924 4925 4926 4927 4928 4929 4930
	ret = handle_mmio_page_fault_common(vcpu, gpa, true);
	if (likely(ret == 1))
		return x86_emulate_instruction(vcpu, gpa, 0, NULL, 0) ==
					      EMULATE_DONE;
	if (unlikely(!ret))
		return 1;

	/* It is the real ept misconfig */
4931 4932 4933 4934 4935 4936 4937 4938
	printk(KERN_ERR "EPT: Misconfiguration.\n");
	printk(KERN_ERR "EPT: GPA: 0x%llx\n", gpa);

	nr_sptes = kvm_mmu_get_spte_hierarchy(vcpu, gpa, sptes);

	for (i = PT64_ROOT_LEVEL; i > PT64_ROOT_LEVEL - nr_sptes; --i)
		ept_misconfig_inspect_spte(vcpu, sptes[i-1], i);

A
Avi Kivity 已提交
4939 4940
	vcpu->run->exit_reason = KVM_EXIT_UNKNOWN;
	vcpu->run->hw.hardware_exit_reason = EXIT_REASON_EPT_MISCONFIG;
4941 4942 4943 4944

	return 0;
}

A
Avi Kivity 已提交
4945
static int handle_nmi_window(struct kvm_vcpu *vcpu)
4946 4947 4948 4949 4950 4951 4952 4953
{
	u32 cpu_based_vm_exec_control;

	/* clear pending NMI */
	cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
	cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_NMI_PENDING;
	vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
	++vcpu->stat.nmi_window_exits;
4954
	kvm_make_request(KVM_REQ_EVENT, vcpu);
4955 4956 4957 4958

	return 1;
}

4959
static int handle_invalid_guest_state(struct kvm_vcpu *vcpu)
4960
{
4961 4962
	struct vcpu_vmx *vmx = to_vmx(vcpu);
	enum emulation_result err = EMULATE_DONE;
4963
	int ret = 1;
4964 4965
	u32 cpu_exec_ctrl;
	bool intr_window_requested;
4966
	unsigned count = 130;
4967 4968 4969

	cpu_exec_ctrl = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
	intr_window_requested = cpu_exec_ctrl & CPU_BASED_VIRTUAL_INTR_PENDING;
4970

4971
	while (!guest_state_valid(vcpu) && count-- != 0) {
4972
		if (intr_window_requested && vmx_interrupt_allowed(vcpu))
4973 4974
			return handle_interrupt_window(&vmx->vcpu);

4975 4976 4977
		if (test_bit(KVM_REQ_EVENT, &vcpu->requests))
			return 1;

4978
		err = emulate_instruction(vcpu, 0);
4979

4980 4981 4982 4983
		if (err == EMULATE_DO_MMIO) {
			ret = 0;
			goto out;
		}
4984

4985 4986 4987 4988
		if (err != EMULATE_DONE) {
			vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
			vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
			vcpu->run->internal.ndata = 0;
4989
			return 0;
4990
		}
4991 4992

		if (signal_pending(current))
4993
			goto out;
4994 4995 4996 4997
		if (need_resched())
			schedule();
	}

4998
	vmx->emulation_required = !guest_state_valid(vcpu);
4999 5000
out:
	return ret;
5001 5002
}

5003 5004 5005 5006
/*
 * Indicate a busy-waiting vcpu in spinlock. We do not enable the PAUSE
 * exiting, so only get here on cpu with PAUSE-Loop-Exiting.
 */
5007
static int handle_pause(struct kvm_vcpu *vcpu)
5008 5009 5010 5011 5012 5013 5014
{
	skip_emulated_instruction(vcpu);
	kvm_vcpu_on_spin(vcpu);

	return 1;
}

5015 5016 5017 5018 5019 5020
static int handle_invalid_op(struct kvm_vcpu *vcpu)
{
	kvm_queue_exception(vcpu, UD_VECTOR);
	return 1;
}

5021 5022 5023 5024 5025 5026 5027 5028 5029 5030 5031 5032 5033 5034 5035 5036 5037 5038 5039 5040 5041 5042 5043 5044 5045 5046 5047 5048 5049 5050 5051 5052 5053 5054 5055 5056 5057 5058 5059 5060 5061 5062 5063 5064 5065 5066 5067 5068 5069 5070 5071 5072 5073 5074 5075 5076 5077 5078 5079 5080 5081 5082 5083 5084 5085 5086 5087 5088 5089 5090 5091 5092 5093 5094 5095 5096 5097 5098 5099 5100 5101 5102 5103
/*
 * To run an L2 guest, we need a vmcs02 based on the L1-specified vmcs12.
 * We could reuse a single VMCS for all the L2 guests, but we also want the
 * option to allocate a separate vmcs02 for each separate loaded vmcs12 - this
 * allows keeping them loaded on the processor, and in the future will allow
 * optimizations where prepare_vmcs02 doesn't need to set all the fields on
 * every entry if they never change.
 * So we keep, in vmx->nested.vmcs02_pool, a cache of size VMCS02_POOL_SIZE
 * (>=0) with a vmcs02 for each recently loaded vmcs12s, most recent first.
 *
 * The following functions allocate and free a vmcs02 in this pool.
 */

/* Get a VMCS from the pool to use as vmcs02 for the current vmcs12. */
static struct loaded_vmcs *nested_get_current_vmcs02(struct vcpu_vmx *vmx)
{
	struct vmcs02_list *item;
	list_for_each_entry(item, &vmx->nested.vmcs02_pool, list)
		if (item->vmptr == vmx->nested.current_vmptr) {
			list_move(&item->list, &vmx->nested.vmcs02_pool);
			return &item->vmcs02;
		}

	if (vmx->nested.vmcs02_num >= max(VMCS02_POOL_SIZE, 1)) {
		/* Recycle the least recently used VMCS. */
		item = list_entry(vmx->nested.vmcs02_pool.prev,
			struct vmcs02_list, list);
		item->vmptr = vmx->nested.current_vmptr;
		list_move(&item->list, &vmx->nested.vmcs02_pool);
		return &item->vmcs02;
	}

	/* Create a new VMCS */
	item = (struct vmcs02_list *)
		kmalloc(sizeof(struct vmcs02_list), GFP_KERNEL);
	if (!item)
		return NULL;
	item->vmcs02.vmcs = alloc_vmcs();
	if (!item->vmcs02.vmcs) {
		kfree(item);
		return NULL;
	}
	loaded_vmcs_init(&item->vmcs02);
	item->vmptr = vmx->nested.current_vmptr;
	list_add(&(item->list), &(vmx->nested.vmcs02_pool));
	vmx->nested.vmcs02_num++;
	return &item->vmcs02;
}

/* Free and remove from pool a vmcs02 saved for a vmcs12 (if there is one) */
static void nested_free_vmcs02(struct vcpu_vmx *vmx, gpa_t vmptr)
{
	struct vmcs02_list *item;
	list_for_each_entry(item, &vmx->nested.vmcs02_pool, list)
		if (item->vmptr == vmptr) {
			free_loaded_vmcs(&item->vmcs02);
			list_del(&item->list);
			kfree(item);
			vmx->nested.vmcs02_num--;
			return;
		}
}

/*
 * Free all VMCSs saved for this vcpu, except the one pointed by
 * vmx->loaded_vmcs. These include the VMCSs in vmcs02_pool (except the one
 * currently used, if running L2), and vmcs01 when running L2.
 */
static void nested_free_all_saved_vmcss(struct vcpu_vmx *vmx)
{
	struct vmcs02_list *item, *n;
	list_for_each_entry_safe(item, n, &vmx->nested.vmcs02_pool, list) {
		if (vmx->loaded_vmcs != &item->vmcs02)
			free_loaded_vmcs(&item->vmcs02);
		list_del(&item->list);
		kfree(item);
	}
	vmx->nested.vmcs02_num = 0;

	if (vmx->loaded_vmcs != &vmx->vmcs01)
		free_loaded_vmcs(&vmx->vmcs01);
}

5104 5105 5106 5107 5108 5109 5110 5111 5112 5113 5114 5115 5116 5117 5118 5119 5120 5121 5122 5123 5124 5125 5126 5127 5128 5129 5130 5131 5132 5133 5134 5135 5136 5137 5138 5139
/*
 * Emulate the VMXON instruction.
 * Currently, we just remember that VMX is active, and do not save or even
 * inspect the argument to VMXON (the so-called "VMXON pointer") because we
 * do not currently need to store anything in that guest-allocated memory
 * region. Consequently, VMCLEAR and VMPTRLD also do not verify that the their
 * argument is different from the VMXON pointer (which the spec says they do).
 */
static int handle_vmon(struct kvm_vcpu *vcpu)
{
	struct kvm_segment cs;
	struct vcpu_vmx *vmx = to_vmx(vcpu);

	/* The Intel VMX Instruction Reference lists a bunch of bits that
	 * are prerequisite to running VMXON, most notably cr4.VMXE must be
	 * set to 1 (see vmx_set_cr4() for when we allow the guest to set this).
	 * Otherwise, we should fail with #UD. We test these now:
	 */
	if (!kvm_read_cr4_bits(vcpu, X86_CR4_VMXE) ||
	    !kvm_read_cr0_bits(vcpu, X86_CR0_PE) ||
	    (vmx_get_rflags(vcpu) & X86_EFLAGS_VM)) {
		kvm_queue_exception(vcpu, UD_VECTOR);
		return 1;
	}

	vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
	if (is_long_mode(vcpu) && !cs.l) {
		kvm_queue_exception(vcpu, UD_VECTOR);
		return 1;
	}

	if (vmx_get_cpl(vcpu)) {
		kvm_inject_gp(vcpu, 0);
		return 1;
	}

5140 5141 5142
	INIT_LIST_HEAD(&(vmx->nested.vmcs02_pool));
	vmx->nested.vmcs02_num = 0;

5143 5144 5145 5146 5147 5148 5149 5150 5151 5152 5153 5154 5155 5156 5157 5158 5159 5160 5161 5162 5163 5164 5165 5166 5167 5168 5169 5170 5171 5172 5173 5174 5175 5176 5177 5178 5179 5180 5181 5182 5183 5184 5185 5186 5187
	vmx->nested.vmxon = true;

	skip_emulated_instruction(vcpu);
	return 1;
}

/*
 * Intel's VMX Instruction Reference specifies a common set of prerequisites
 * for running VMX instructions (except VMXON, whose prerequisites are
 * slightly different). It also specifies what exception to inject otherwise.
 */
static int nested_vmx_check_permission(struct kvm_vcpu *vcpu)
{
	struct kvm_segment cs;
	struct vcpu_vmx *vmx = to_vmx(vcpu);

	if (!vmx->nested.vmxon) {
		kvm_queue_exception(vcpu, UD_VECTOR);
		return 0;
	}

	vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
	if ((vmx_get_rflags(vcpu) & X86_EFLAGS_VM) ||
	    (is_long_mode(vcpu) && !cs.l)) {
		kvm_queue_exception(vcpu, UD_VECTOR);
		return 0;
	}

	if (vmx_get_cpl(vcpu)) {
		kvm_inject_gp(vcpu, 0);
		return 0;
	}

	return 1;
}

/*
 * Free whatever needs to be freed from vmx->nested when L1 goes down, or
 * just stops using VMX.
 */
static void free_nested(struct vcpu_vmx *vmx)
{
	if (!vmx->nested.vmxon)
		return;
	vmx->nested.vmxon = false;
5188 5189 5190 5191 5192 5193
	if (vmx->nested.current_vmptr != -1ull) {
		kunmap(vmx->nested.current_vmcs12_page);
		nested_release_page(vmx->nested.current_vmcs12_page);
		vmx->nested.current_vmptr = -1ull;
		vmx->nested.current_vmcs12 = NULL;
	}
5194 5195 5196 5197 5198
	/* Unpin physical memory we referred to in current vmcs02 */
	if (vmx->nested.apic_access_page) {
		nested_release_page(vmx->nested.apic_access_page);
		vmx->nested.apic_access_page = 0;
	}
5199 5200

	nested_free_all_saved_vmcss(vmx);
5201 5202 5203 5204 5205 5206 5207 5208 5209 5210 5211 5212
}

/* Emulate the VMXOFF instruction */
static int handle_vmoff(struct kvm_vcpu *vcpu)
{
	if (!nested_vmx_check_permission(vcpu))
		return 1;
	free_nested(to_vmx(vcpu));
	skip_emulated_instruction(vcpu);
	return 1;
}

5213 5214 5215 5216 5217 5218 5219 5220 5221 5222 5223 5224 5225 5226 5227 5228 5229 5230 5231 5232 5233 5234 5235 5236 5237 5238 5239 5240 5241 5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 5252 5253 5254 5255 5256 5257 5258 5259 5260 5261 5262 5263 5264 5265
/*
 * Decode the memory-address operand of a vmx instruction, as recorded on an
 * exit caused by such an instruction (run by a guest hypervisor).
 * On success, returns 0. When the operand is invalid, returns 1 and throws
 * #UD or #GP.
 */
static int get_vmx_mem_address(struct kvm_vcpu *vcpu,
				 unsigned long exit_qualification,
				 u32 vmx_instruction_info, gva_t *ret)
{
	/*
	 * According to Vol. 3B, "Information for VM Exits Due to Instruction
	 * Execution", on an exit, vmx_instruction_info holds most of the
	 * addressing components of the operand. Only the displacement part
	 * is put in exit_qualification (see 3B, "Basic VM-Exit Information").
	 * For how an actual address is calculated from all these components,
	 * refer to Vol. 1, "Operand Addressing".
	 */
	int  scaling = vmx_instruction_info & 3;
	int  addr_size = (vmx_instruction_info >> 7) & 7;
	bool is_reg = vmx_instruction_info & (1u << 10);
	int  seg_reg = (vmx_instruction_info >> 15) & 7;
	int  index_reg = (vmx_instruction_info >> 18) & 0xf;
	bool index_is_valid = !(vmx_instruction_info & (1u << 22));
	int  base_reg       = (vmx_instruction_info >> 23) & 0xf;
	bool base_is_valid  = !(vmx_instruction_info & (1u << 27));

	if (is_reg) {
		kvm_queue_exception(vcpu, UD_VECTOR);
		return 1;
	}

	/* Addr = segment_base + offset */
	/* offset = base + [index * scale] + displacement */
	*ret = vmx_get_segment_base(vcpu, seg_reg);
	if (base_is_valid)
		*ret += kvm_register_read(vcpu, base_reg);
	if (index_is_valid)
		*ret += kvm_register_read(vcpu, index_reg)<<scaling;
	*ret += exit_qualification; /* holds the displacement */

	if (addr_size == 1) /* 32 bit */
		*ret &= 0xffffffff;

	/*
	 * TODO: throw #GP (and return 1) in various cases that the VM*
	 * instructions require it - e.g., offset beyond segment limit,
	 * unusable or unreadable/unwritable segment, non-canonical 64-bit
	 * address, and so on. Currently these are not checked.
	 */
	return 0;
}

5266 5267 5268 5269 5270 5271 5272 5273 5274 5275 5276 5277 5278 5279 5280 5281 5282 5283 5284 5285 5286 5287 5288 5289 5290 5291 5292 5293 5294 5295 5296 5297 5298 5299 5300 5301 5302 5303
/*
 * The following 3 functions, nested_vmx_succeed()/failValid()/failInvalid(),
 * set the success or error code of an emulated VMX instruction, as specified
 * by Vol 2B, VMX Instruction Reference, "Conventions".
 */
static void nested_vmx_succeed(struct kvm_vcpu *vcpu)
{
	vmx_set_rflags(vcpu, vmx_get_rflags(vcpu)
			& ~(X86_EFLAGS_CF | X86_EFLAGS_PF | X86_EFLAGS_AF |
			    X86_EFLAGS_ZF | X86_EFLAGS_SF | X86_EFLAGS_OF));
}

static void nested_vmx_failInvalid(struct kvm_vcpu *vcpu)
{
	vmx_set_rflags(vcpu, (vmx_get_rflags(vcpu)
			& ~(X86_EFLAGS_PF | X86_EFLAGS_AF | X86_EFLAGS_ZF |
			    X86_EFLAGS_SF | X86_EFLAGS_OF))
			| X86_EFLAGS_CF);
}

static void nested_vmx_failValid(struct kvm_vcpu *vcpu,
					u32 vm_instruction_error)
{
	if (to_vmx(vcpu)->nested.current_vmptr == -1ull) {
		/*
		 * failValid writes the error number to the current VMCS, which
		 * can't be done there isn't a current VMCS.
		 */
		nested_vmx_failInvalid(vcpu);
		return;
	}
	vmx_set_rflags(vcpu, (vmx_get_rflags(vcpu)
			& ~(X86_EFLAGS_CF | X86_EFLAGS_PF | X86_EFLAGS_AF |
			    X86_EFLAGS_SF | X86_EFLAGS_OF))
			| X86_EFLAGS_ZF);
	get_vmcs12(vcpu)->vm_instruction_error = vm_instruction_error;
}

N
Nadav Har'El 已提交
5304 5305 5306 5307 5308 5309 5310 5311 5312 5313 5314 5315 5316 5317 5318 5319 5320 5321 5322 5323 5324 5325 5326 5327 5328 5329 5330 5331 5332 5333 5334 5335 5336 5337 5338 5339 5340 5341 5342 5343 5344 5345 5346 5347 5348 5349 5350 5351 5352 5353 5354 5355 5356 5357 5358 5359 5360 5361 5362 5363
/* Emulate the VMCLEAR instruction */
static int handle_vmclear(struct kvm_vcpu *vcpu)
{
	struct vcpu_vmx *vmx = to_vmx(vcpu);
	gva_t gva;
	gpa_t vmptr;
	struct vmcs12 *vmcs12;
	struct page *page;
	struct x86_exception e;

	if (!nested_vmx_check_permission(vcpu))
		return 1;

	if (get_vmx_mem_address(vcpu, vmcs_readl(EXIT_QUALIFICATION),
			vmcs_read32(VMX_INSTRUCTION_INFO), &gva))
		return 1;

	if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &vmptr,
				sizeof(vmptr), &e)) {
		kvm_inject_page_fault(vcpu, &e);
		return 1;
	}

	if (!IS_ALIGNED(vmptr, PAGE_SIZE)) {
		nested_vmx_failValid(vcpu, VMXERR_VMCLEAR_INVALID_ADDRESS);
		skip_emulated_instruction(vcpu);
		return 1;
	}

	if (vmptr == vmx->nested.current_vmptr) {
		kunmap(vmx->nested.current_vmcs12_page);
		nested_release_page(vmx->nested.current_vmcs12_page);
		vmx->nested.current_vmptr = -1ull;
		vmx->nested.current_vmcs12 = NULL;
	}

	page = nested_get_page(vcpu, vmptr);
	if (page == NULL) {
		/*
		 * For accurate processor emulation, VMCLEAR beyond available
		 * physical memory should do nothing at all. However, it is
		 * possible that a nested vmx bug, not a guest hypervisor bug,
		 * resulted in this case, so let's shut down before doing any
		 * more damage:
		 */
		kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
		return 1;
	}
	vmcs12 = kmap(page);
	vmcs12->launch_state = 0;
	kunmap(page);
	nested_release_page(page);

	nested_free_vmcs02(vmx, vmptr);

	skip_emulated_instruction(vcpu);
	nested_vmx_succeed(vcpu);
	return 1;
}

5364 5365 5366 5367 5368 5369 5370 5371 5372 5373 5374 5375 5376 5377 5378
static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch);

/* Emulate the VMLAUNCH instruction */
static int handle_vmlaunch(struct kvm_vcpu *vcpu)
{
	return nested_vmx_run(vcpu, true);
}

/* Emulate the VMRESUME instruction */
static int handle_vmresume(struct kvm_vcpu *vcpu)
{

	return nested_vmx_run(vcpu, false);
}

5379 5380 5381 5382 5383 5384 5385 5386 5387 5388 5389 5390 5391 5392 5393 5394 5395 5396 5397 5398 5399 5400 5401 5402 5403 5404 5405 5406 5407 5408 5409 5410 5411 5412 5413 5414 5415 5416 5417 5418 5419 5420 5421 5422 5423 5424 5425 5426 5427 5428 5429 5430 5431 5432 5433 5434 5435 5436 5437 5438 5439 5440 5441 5442 5443 5444 5445 5446 5447 5448 5449 5450 5451 5452 5453 5454 5455 5456 5457 5458 5459 5460 5461 5462 5463 5464 5465 5466 5467 5468 5469 5470 5471 5472 5473 5474 5475 5476 5477 5478 5479 5480 5481 5482 5483 5484 5485 5486 5487 5488 5489 5490 5491 5492 5493 5494 5495 5496 5497 5498 5499 5500 5501 5502 5503 5504 5505 5506 5507 5508 5509 5510 5511 5512 5513 5514 5515 5516 5517 5518 5519 5520 5521 5522 5523 5524 5525 5526 5527 5528 5529 5530 5531 5532 5533 5534 5535 5536 5537 5538 5539 5540 5541 5542 5543 5544 5545 5546 5547 5548 5549 5550 5551 5552 5553 5554 5555 5556 5557 5558 5559 5560 5561 5562 5563 5564 5565 5566 5567
enum vmcs_field_type {
	VMCS_FIELD_TYPE_U16 = 0,
	VMCS_FIELD_TYPE_U64 = 1,
	VMCS_FIELD_TYPE_U32 = 2,
	VMCS_FIELD_TYPE_NATURAL_WIDTH = 3
};

static inline int vmcs_field_type(unsigned long field)
{
	if (0x1 & field)	/* the *_HIGH fields are all 32 bit */
		return VMCS_FIELD_TYPE_U32;
	return (field >> 13) & 0x3 ;
}

static inline int vmcs_field_readonly(unsigned long field)
{
	return (((field >> 10) & 0x3) == 1);
}

/*
 * Read a vmcs12 field. Since these can have varying lengths and we return
 * one type, we chose the biggest type (u64) and zero-extend the return value
 * to that size. Note that the caller, handle_vmread, might need to use only
 * some of the bits we return here (e.g., on 32-bit guests, only 32 bits of
 * 64-bit fields are to be returned).
 */
static inline bool vmcs12_read_any(struct kvm_vcpu *vcpu,
					unsigned long field, u64 *ret)
{
	short offset = vmcs_field_to_offset(field);
	char *p;

	if (offset < 0)
		return 0;

	p = ((char *)(get_vmcs12(vcpu))) + offset;

	switch (vmcs_field_type(field)) {
	case VMCS_FIELD_TYPE_NATURAL_WIDTH:
		*ret = *((natural_width *)p);
		return 1;
	case VMCS_FIELD_TYPE_U16:
		*ret = *((u16 *)p);
		return 1;
	case VMCS_FIELD_TYPE_U32:
		*ret = *((u32 *)p);
		return 1;
	case VMCS_FIELD_TYPE_U64:
		*ret = *((u64 *)p);
		return 1;
	default:
		return 0; /* can never happen. */
	}
}

/*
 * VMX instructions which assume a current vmcs12 (i.e., that VMPTRLD was
 * used before) all generate the same failure when it is missing.
 */
static int nested_vmx_check_vmcs12(struct kvm_vcpu *vcpu)
{
	struct vcpu_vmx *vmx = to_vmx(vcpu);
	if (vmx->nested.current_vmptr == -1ull) {
		nested_vmx_failInvalid(vcpu);
		skip_emulated_instruction(vcpu);
		return 0;
	}
	return 1;
}

static int handle_vmread(struct kvm_vcpu *vcpu)
{
	unsigned long field;
	u64 field_value;
	unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
	u32 vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
	gva_t gva = 0;

	if (!nested_vmx_check_permission(vcpu) ||
	    !nested_vmx_check_vmcs12(vcpu))
		return 1;

	/* Decode instruction info and find the field to read */
	field = kvm_register_read(vcpu, (((vmx_instruction_info) >> 28) & 0xf));
	/* Read the field, zero-extended to a u64 field_value */
	if (!vmcs12_read_any(vcpu, field, &field_value)) {
		nested_vmx_failValid(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
		skip_emulated_instruction(vcpu);
		return 1;
	}
	/*
	 * Now copy part of this value to register or memory, as requested.
	 * Note that the number of bits actually copied is 32 or 64 depending
	 * on the guest's mode (32 or 64 bit), not on the given field's length.
	 */
	if (vmx_instruction_info & (1u << 10)) {
		kvm_register_write(vcpu, (((vmx_instruction_info) >> 3) & 0xf),
			field_value);
	} else {
		if (get_vmx_mem_address(vcpu, exit_qualification,
				vmx_instruction_info, &gva))
			return 1;
		/* _system ok, as nested_vmx_check_permission verified cpl=0 */
		kvm_write_guest_virt_system(&vcpu->arch.emulate_ctxt, gva,
			     &field_value, (is_long_mode(vcpu) ? 8 : 4), NULL);
	}

	nested_vmx_succeed(vcpu);
	skip_emulated_instruction(vcpu);
	return 1;
}


static int handle_vmwrite(struct kvm_vcpu *vcpu)
{
	unsigned long field;
	gva_t gva;
	unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
	u32 vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
	char *p;
	short offset;
	/* The value to write might be 32 or 64 bits, depending on L1's long
	 * mode, and eventually we need to write that into a field of several
	 * possible lengths. The code below first zero-extends the value to 64
	 * bit (field_value), and then copies only the approriate number of
	 * bits into the vmcs12 field.
	 */
	u64 field_value = 0;
	struct x86_exception e;

	if (!nested_vmx_check_permission(vcpu) ||
	    !nested_vmx_check_vmcs12(vcpu))
		return 1;

	if (vmx_instruction_info & (1u << 10))
		field_value = kvm_register_read(vcpu,
			(((vmx_instruction_info) >> 3) & 0xf));
	else {
		if (get_vmx_mem_address(vcpu, exit_qualification,
				vmx_instruction_info, &gva))
			return 1;
		if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva,
			   &field_value, (is_long_mode(vcpu) ? 8 : 4), &e)) {
			kvm_inject_page_fault(vcpu, &e);
			return 1;
		}
	}


	field = kvm_register_read(vcpu, (((vmx_instruction_info) >> 28) & 0xf));
	if (vmcs_field_readonly(field)) {
		nested_vmx_failValid(vcpu,
			VMXERR_VMWRITE_READ_ONLY_VMCS_COMPONENT);
		skip_emulated_instruction(vcpu);
		return 1;
	}

	offset = vmcs_field_to_offset(field);
	if (offset < 0) {
		nested_vmx_failValid(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
		skip_emulated_instruction(vcpu);
		return 1;
	}
	p = ((char *) get_vmcs12(vcpu)) + offset;

	switch (vmcs_field_type(field)) {
	case VMCS_FIELD_TYPE_U16:
		*(u16 *)p = field_value;
		break;
	case VMCS_FIELD_TYPE_U32:
		*(u32 *)p = field_value;
		break;
	case VMCS_FIELD_TYPE_U64:
		*(u64 *)p = field_value;
		break;
	case VMCS_FIELD_TYPE_NATURAL_WIDTH:
		*(natural_width *)p = field_value;
		break;
	default:
		nested_vmx_failValid(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
		skip_emulated_instruction(vcpu);
		return 1;
	}

	nested_vmx_succeed(vcpu);
	skip_emulated_instruction(vcpu);
	return 1;
}

N
Nadav Har'El 已提交
5568 5569 5570 5571 5572 5573 5574 5575 5576 5577 5578 5579 5580 5581 5582 5583 5584 5585 5586 5587 5588 5589 5590 5591 5592 5593 5594 5595 5596 5597 5598 5599 5600 5601 5602 5603 5604 5605 5606 5607 5608 5609 5610 5611 5612 5613 5614 5615 5616 5617 5618 5619 5620 5621 5622 5623 5624 5625 5626 5627
/* Emulate the VMPTRLD instruction */
static int handle_vmptrld(struct kvm_vcpu *vcpu)
{
	struct vcpu_vmx *vmx = to_vmx(vcpu);
	gva_t gva;
	gpa_t vmptr;
	struct x86_exception e;

	if (!nested_vmx_check_permission(vcpu))
		return 1;

	if (get_vmx_mem_address(vcpu, vmcs_readl(EXIT_QUALIFICATION),
			vmcs_read32(VMX_INSTRUCTION_INFO), &gva))
		return 1;

	if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &vmptr,
				sizeof(vmptr), &e)) {
		kvm_inject_page_fault(vcpu, &e);
		return 1;
	}

	if (!IS_ALIGNED(vmptr, PAGE_SIZE)) {
		nested_vmx_failValid(vcpu, VMXERR_VMPTRLD_INVALID_ADDRESS);
		skip_emulated_instruction(vcpu);
		return 1;
	}

	if (vmx->nested.current_vmptr != vmptr) {
		struct vmcs12 *new_vmcs12;
		struct page *page;
		page = nested_get_page(vcpu, vmptr);
		if (page == NULL) {
			nested_vmx_failInvalid(vcpu);
			skip_emulated_instruction(vcpu);
			return 1;
		}
		new_vmcs12 = kmap(page);
		if (new_vmcs12->revision_id != VMCS12_REVISION) {
			kunmap(page);
			nested_release_page_clean(page);
			nested_vmx_failValid(vcpu,
				VMXERR_VMPTRLD_INCORRECT_VMCS_REVISION_ID);
			skip_emulated_instruction(vcpu);
			return 1;
		}
		if (vmx->nested.current_vmptr != -1ull) {
			kunmap(vmx->nested.current_vmcs12_page);
			nested_release_page(vmx->nested.current_vmcs12_page);
		}

		vmx->nested.current_vmptr = vmptr;
		vmx->nested.current_vmcs12 = new_vmcs12;
		vmx->nested.current_vmcs12_page = page;
	}

	nested_vmx_succeed(vcpu);
	skip_emulated_instruction(vcpu);
	return 1;
}

N
Nadav Har'El 已提交
5628 5629 5630 5631 5632 5633 5634 5635 5636 5637 5638 5639 5640 5641 5642 5643 5644 5645 5646 5647 5648 5649 5650 5651 5652 5653
/* Emulate the VMPTRST instruction */
static int handle_vmptrst(struct kvm_vcpu *vcpu)
{
	unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
	u32 vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
	gva_t vmcs_gva;
	struct x86_exception e;

	if (!nested_vmx_check_permission(vcpu))
		return 1;

	if (get_vmx_mem_address(vcpu, exit_qualification,
			vmx_instruction_info, &vmcs_gva))
		return 1;
	/* ok to use *_system, as nested_vmx_check_permission verified cpl=0 */
	if (kvm_write_guest_virt_system(&vcpu->arch.emulate_ctxt, vmcs_gva,
				 (void *)&to_vmx(vcpu)->nested.current_vmptr,
				 sizeof(u64), &e)) {
		kvm_inject_page_fault(vcpu, &e);
		return 1;
	}
	nested_vmx_succeed(vcpu);
	skip_emulated_instruction(vcpu);
	return 1;
}

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5654 5655 5656 5657 5658
/*
 * The exit handlers return 1 if the exit was handled fully and guest execution
 * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
 * to be done to userspace and return 0.
 */
5659
static int (*const kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu) = {
A
Avi Kivity 已提交
5660 5661
	[EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
	[EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
5662
	[EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
5663
	[EXIT_REASON_NMI_WINDOW]	      = handle_nmi_window,
A
Avi Kivity 已提交
5664 5665 5666 5667 5668 5669 5670 5671
	[EXIT_REASON_IO_INSTRUCTION]          = handle_io,
	[EXIT_REASON_CR_ACCESS]               = handle_cr,
	[EXIT_REASON_DR_ACCESS]               = handle_dr,
	[EXIT_REASON_CPUID]                   = handle_cpuid,
	[EXIT_REASON_MSR_READ]                = handle_rdmsr,
	[EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
	[EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
	[EXIT_REASON_HLT]                     = handle_halt,
5672
	[EXIT_REASON_INVD]		      = handle_invd,
M
Marcelo Tosatti 已提交
5673
	[EXIT_REASON_INVLPG]		      = handle_invlpg,
A
Avi Kivity 已提交
5674
	[EXIT_REASON_RDPMC]                   = handle_rdpmc,
5675
	[EXIT_REASON_VMCALL]                  = handle_vmcall,
N
Nadav Har'El 已提交
5676
	[EXIT_REASON_VMCLEAR]	              = handle_vmclear,
5677
	[EXIT_REASON_VMLAUNCH]                = handle_vmlaunch,
N
Nadav Har'El 已提交
5678
	[EXIT_REASON_VMPTRLD]                 = handle_vmptrld,
N
Nadav Har'El 已提交
5679
	[EXIT_REASON_VMPTRST]                 = handle_vmptrst,
5680
	[EXIT_REASON_VMREAD]                  = handle_vmread,
5681
	[EXIT_REASON_VMRESUME]                = handle_vmresume,
5682
	[EXIT_REASON_VMWRITE]                 = handle_vmwrite,
5683 5684
	[EXIT_REASON_VMOFF]                   = handle_vmoff,
	[EXIT_REASON_VMON]                    = handle_vmon,
5685 5686
	[EXIT_REASON_TPR_BELOW_THRESHOLD]     = handle_tpr_below_threshold,
	[EXIT_REASON_APIC_ACCESS]             = handle_apic_access,
E
Eddie Dong 已提交
5687
	[EXIT_REASON_WBINVD]                  = handle_wbinvd,
5688
	[EXIT_REASON_XSETBV]                  = handle_xsetbv,
5689
	[EXIT_REASON_TASK_SWITCH]             = handle_task_switch,
A
Andi Kleen 已提交
5690
	[EXIT_REASON_MCE_DURING_VMENTRY]      = handle_machine_check,
5691 5692
	[EXIT_REASON_EPT_VIOLATION]	      = handle_ept_violation,
	[EXIT_REASON_EPT_MISCONFIG]           = handle_ept_misconfig,
5693
	[EXIT_REASON_PAUSE_INSTRUCTION]       = handle_pause,
5694 5695
	[EXIT_REASON_MWAIT_INSTRUCTION]	      = handle_invalid_op,
	[EXIT_REASON_MONITOR_INSTRUCTION]     = handle_invalid_op,
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Avi Kivity 已提交
5696 5697 5698
};

static const int kvm_vmx_max_exit_handlers =
5699
	ARRAY_SIZE(kvm_vmx_exit_handlers);
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Avi Kivity 已提交
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5701 5702 5703 5704 5705 5706 5707 5708 5709 5710 5711 5712 5713 5714 5715 5716 5717 5718 5719 5720 5721 5722 5723 5724 5725 5726 5727 5728 5729 5730 5731 5732 5733 5734 5735 5736 5737 5738 5739 5740 5741 5742 5743 5744 5745 5746 5747 5748 5749 5750 5751 5752 5753 5754 5755 5756 5757 5758 5759 5760 5761 5762 5763 5764 5765 5766 5767 5768 5769 5770 5771 5772 5773 5774 5775 5776 5777 5778 5779 5780 5781 5782 5783 5784 5785 5786 5787 5788 5789 5790 5791 5792 5793 5794 5795 5796 5797 5798 5799 5800 5801 5802 5803 5804 5805 5806 5807 5808 5809 5810 5811 5812 5813 5814 5815 5816 5817 5818 5819 5820 5821 5822 5823 5824 5825 5826 5827 5828 5829 5830 5831 5832 5833 5834
/*
 * Return 1 if we should exit from L2 to L1 to handle an MSR access access,
 * rather than handle it ourselves in L0. I.e., check whether L1 expressed
 * disinterest in the current event (read or write a specific MSR) by using an
 * MSR bitmap. This may be the case even when L0 doesn't use MSR bitmaps.
 */
static bool nested_vmx_exit_handled_msr(struct kvm_vcpu *vcpu,
	struct vmcs12 *vmcs12, u32 exit_reason)
{
	u32 msr_index = vcpu->arch.regs[VCPU_REGS_RCX];
	gpa_t bitmap;

	if (!nested_cpu_has(get_vmcs12(vcpu), CPU_BASED_USE_MSR_BITMAPS))
		return 1;

	/*
	 * The MSR_BITMAP page is divided into four 1024-byte bitmaps,
	 * for the four combinations of read/write and low/high MSR numbers.
	 * First we need to figure out which of the four to use:
	 */
	bitmap = vmcs12->msr_bitmap;
	if (exit_reason == EXIT_REASON_MSR_WRITE)
		bitmap += 2048;
	if (msr_index >= 0xc0000000) {
		msr_index -= 0xc0000000;
		bitmap += 1024;
	}

	/* Then read the msr_index'th bit from this bitmap: */
	if (msr_index < 1024*8) {
		unsigned char b;
		kvm_read_guest(vcpu->kvm, bitmap + msr_index/8, &b, 1);
		return 1 & (b >> (msr_index & 7));
	} else
		return 1; /* let L1 handle the wrong parameter */
}

/*
 * Return 1 if we should exit from L2 to L1 to handle a CR access exit,
 * rather than handle it ourselves in L0. I.e., check if L1 wanted to
 * intercept (via guest_host_mask etc.) the current event.
 */
static bool nested_vmx_exit_handled_cr(struct kvm_vcpu *vcpu,
	struct vmcs12 *vmcs12)
{
	unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
	int cr = exit_qualification & 15;
	int reg = (exit_qualification >> 8) & 15;
	unsigned long val = kvm_register_read(vcpu, reg);

	switch ((exit_qualification >> 4) & 3) {
	case 0: /* mov to cr */
		switch (cr) {
		case 0:
			if (vmcs12->cr0_guest_host_mask &
			    (val ^ vmcs12->cr0_read_shadow))
				return 1;
			break;
		case 3:
			if ((vmcs12->cr3_target_count >= 1 &&
					vmcs12->cr3_target_value0 == val) ||
				(vmcs12->cr3_target_count >= 2 &&
					vmcs12->cr3_target_value1 == val) ||
				(vmcs12->cr3_target_count >= 3 &&
					vmcs12->cr3_target_value2 == val) ||
				(vmcs12->cr3_target_count >= 4 &&
					vmcs12->cr3_target_value3 == val))
				return 0;
			if (nested_cpu_has(vmcs12, CPU_BASED_CR3_LOAD_EXITING))
				return 1;
			break;
		case 4:
			if (vmcs12->cr4_guest_host_mask &
			    (vmcs12->cr4_read_shadow ^ val))
				return 1;
			break;
		case 8:
			if (nested_cpu_has(vmcs12, CPU_BASED_CR8_LOAD_EXITING))
				return 1;
			break;
		}
		break;
	case 2: /* clts */
		if ((vmcs12->cr0_guest_host_mask & X86_CR0_TS) &&
		    (vmcs12->cr0_read_shadow & X86_CR0_TS))
			return 1;
		break;
	case 1: /* mov from cr */
		switch (cr) {
		case 3:
			if (vmcs12->cpu_based_vm_exec_control &
			    CPU_BASED_CR3_STORE_EXITING)
				return 1;
			break;
		case 8:
			if (vmcs12->cpu_based_vm_exec_control &
			    CPU_BASED_CR8_STORE_EXITING)
				return 1;
			break;
		}
		break;
	case 3: /* lmsw */
		/*
		 * lmsw can change bits 1..3 of cr0, and only set bit 0 of
		 * cr0. Other attempted changes are ignored, with no exit.
		 */
		if (vmcs12->cr0_guest_host_mask & 0xe &
		    (val ^ vmcs12->cr0_read_shadow))
			return 1;
		if ((vmcs12->cr0_guest_host_mask & 0x1) &&
		    !(vmcs12->cr0_read_shadow & 0x1) &&
		    (val & 0x1))
			return 1;
		break;
	}
	return 0;
}

/*
 * Return 1 if we should exit from L2 to L1 to handle an exit, or 0 if we
 * should handle it ourselves in L0 (and then continue L2). Only call this
 * when in is_guest_mode (L2).
 */
static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
{
	u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
	u32 intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
	struct vcpu_vmx *vmx = to_vmx(vcpu);
	struct vmcs12 *vmcs12 = get_vmcs12(vcpu);

	if (vmx->nested.nested_run_pending)
		return 0;

	if (unlikely(vmx->fail)) {
5835 5836
		pr_info_ratelimited("%s failed vm entry %x\n", __func__,
				    vmcs_read32(VM_INSTRUCTION_ERROR));
5837 5838 5839 5840 5841 5842 5843 5844 5845 5846 5847 5848 5849 5850 5851 5852 5853 5854 5855 5856 5857 5858 5859 5860 5861 5862 5863 5864 5865 5866 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876 5877 5878 5879 5880 5881 5882 5883 5884 5885 5886 5887 5888 5889 5890 5891 5892 5893 5894 5895 5896 5897 5898 5899 5900 5901 5902 5903 5904 5905 5906 5907 5908 5909 5910 5911 5912 5913 5914 5915 5916 5917 5918 5919 5920 5921 5922 5923
		return 1;
	}

	switch (exit_reason) {
	case EXIT_REASON_EXCEPTION_NMI:
		if (!is_exception(intr_info))
			return 0;
		else if (is_page_fault(intr_info))
			return enable_ept;
		return vmcs12->exception_bitmap &
				(1u << (intr_info & INTR_INFO_VECTOR_MASK));
	case EXIT_REASON_EXTERNAL_INTERRUPT:
		return 0;
	case EXIT_REASON_TRIPLE_FAULT:
		return 1;
	case EXIT_REASON_PENDING_INTERRUPT:
	case EXIT_REASON_NMI_WINDOW:
		/*
		 * prepare_vmcs02() set the CPU_BASED_VIRTUAL_INTR_PENDING bit
		 * (aka Interrupt Window Exiting) only when L1 turned it on,
		 * so if we got a PENDING_INTERRUPT exit, this must be for L1.
		 * Same for NMI Window Exiting.
		 */
		return 1;
	case EXIT_REASON_TASK_SWITCH:
		return 1;
	case EXIT_REASON_CPUID:
		return 1;
	case EXIT_REASON_HLT:
		return nested_cpu_has(vmcs12, CPU_BASED_HLT_EXITING);
	case EXIT_REASON_INVD:
		return 1;
	case EXIT_REASON_INVLPG:
		return nested_cpu_has(vmcs12, CPU_BASED_INVLPG_EXITING);
	case EXIT_REASON_RDPMC:
		return nested_cpu_has(vmcs12, CPU_BASED_RDPMC_EXITING);
	case EXIT_REASON_RDTSC:
		return nested_cpu_has(vmcs12, CPU_BASED_RDTSC_EXITING);
	case EXIT_REASON_VMCALL: case EXIT_REASON_VMCLEAR:
	case EXIT_REASON_VMLAUNCH: case EXIT_REASON_VMPTRLD:
	case EXIT_REASON_VMPTRST: case EXIT_REASON_VMREAD:
	case EXIT_REASON_VMRESUME: case EXIT_REASON_VMWRITE:
	case EXIT_REASON_VMOFF: case EXIT_REASON_VMON:
		/*
		 * VMX instructions trap unconditionally. This allows L1 to
		 * emulate them for its L2 guest, i.e., allows 3-level nesting!
		 */
		return 1;
	case EXIT_REASON_CR_ACCESS:
		return nested_vmx_exit_handled_cr(vcpu, vmcs12);
	case EXIT_REASON_DR_ACCESS:
		return nested_cpu_has(vmcs12, CPU_BASED_MOV_DR_EXITING);
	case EXIT_REASON_IO_INSTRUCTION:
		/* TODO: support IO bitmaps */
		return 1;
	case EXIT_REASON_MSR_READ:
	case EXIT_REASON_MSR_WRITE:
		return nested_vmx_exit_handled_msr(vcpu, vmcs12, exit_reason);
	case EXIT_REASON_INVALID_STATE:
		return 1;
	case EXIT_REASON_MWAIT_INSTRUCTION:
		return nested_cpu_has(vmcs12, CPU_BASED_MWAIT_EXITING);
	case EXIT_REASON_MONITOR_INSTRUCTION:
		return nested_cpu_has(vmcs12, CPU_BASED_MONITOR_EXITING);
	case EXIT_REASON_PAUSE_INSTRUCTION:
		return nested_cpu_has(vmcs12, CPU_BASED_PAUSE_EXITING) ||
			nested_cpu_has2(vmcs12,
				SECONDARY_EXEC_PAUSE_LOOP_EXITING);
	case EXIT_REASON_MCE_DURING_VMENTRY:
		return 0;
	case EXIT_REASON_TPR_BELOW_THRESHOLD:
		return 1;
	case EXIT_REASON_APIC_ACCESS:
		return nested_cpu_has2(vmcs12,
			SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES);
	case EXIT_REASON_EPT_VIOLATION:
	case EXIT_REASON_EPT_MISCONFIG:
		return 0;
	case EXIT_REASON_WBINVD:
		return nested_cpu_has2(vmcs12, SECONDARY_EXEC_WBINVD_EXITING);
	case EXIT_REASON_XSETBV:
		return 1;
	default:
		return 1;
	}
}

5924 5925 5926 5927 5928 5929
static void vmx_get_exit_info(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2)
{
	*info1 = vmcs_readl(EXIT_QUALIFICATION);
	*info2 = vmcs_read32(VM_EXIT_INTR_INFO);
}

A
Avi Kivity 已提交
5930 5931 5932 5933
/*
 * The guest has exited.  See if we can fix it or if we need userspace
 * assistance.
 */
A
Avi Kivity 已提交
5934
static int vmx_handle_exit(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
5935
{
5936
	struct vcpu_vmx *vmx = to_vmx(vcpu);
A
Andi Kleen 已提交
5937
	u32 exit_reason = vmx->exit_reason;
5938
	u32 vectoring_info = vmx->idt_vectoring_info;
5939

5940 5941 5942
	/* If guest state is invalid, start emulating */
	if (vmx->emulation_required && emulate_invalid_guest_state)
		return handle_invalid_guest_state(vcpu);
5943

5944 5945 5946 5947 5948 5949 5950 5951
	/*
	 * the KVM_REQ_EVENT optimization bit is only on for one entry, and if
	 * we did not inject a still-pending event to L1 now because of
	 * nested_run_pending, we need to re-enable this bit.
	 */
	if (vmx->nested.nested_run_pending)
		kvm_make_request(KVM_REQ_EVENT, vcpu);

5952 5953
	if (!is_guest_mode(vcpu) && (exit_reason == EXIT_REASON_VMLAUNCH ||
	    exit_reason == EXIT_REASON_VMRESUME))
5954 5955 5956 5957 5958 5959 5960 5961 5962
		vmx->nested.nested_run_pending = 1;
	else
		vmx->nested.nested_run_pending = 0;

	if (is_guest_mode(vcpu) && nested_vmx_exit_handled(vcpu)) {
		nested_vmx_vmexit(vcpu);
		return 1;
	}

5963 5964 5965 5966 5967 5968 5969
	if (exit_reason & VMX_EXIT_REASONS_FAILED_VMENTRY) {
		vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY;
		vcpu->run->fail_entry.hardware_entry_failure_reason
			= exit_reason;
		return 0;
	}

5970
	if (unlikely(vmx->fail)) {
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Avi Kivity 已提交
5971 5972
		vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY;
		vcpu->run->fail_entry.hardware_entry_failure_reason
5973 5974 5975
			= vmcs_read32(VM_INSTRUCTION_ERROR);
		return 0;
	}
A
Avi Kivity 已提交
5976

M
Mike Day 已提交
5977
	if ((vectoring_info & VECTORING_INFO_VALID_MASK) &&
5978
			(exit_reason != EXIT_REASON_EXCEPTION_NMI &&
J
Jan Kiszka 已提交
5979 5980 5981 5982 5983
			exit_reason != EXIT_REASON_EPT_VIOLATION &&
			exit_reason != EXIT_REASON_TASK_SWITCH))
		printk(KERN_WARNING "%s: unexpected, valid vectoring info "
		       "(0x%x) and exit reason is 0x%x\n",
		       __func__, vectoring_info, exit_reason);
5984

5985 5986 5987
	if (unlikely(!cpu_has_virtual_nmis() && vmx->soft_vnmi_blocked &&
	    !(is_guest_mode(vcpu) && nested_cpu_has_virtual_nmis(
	                                get_vmcs12(vcpu), vcpu)))) {
5988
		if (vmx_interrupt_allowed(vcpu)) {
5989 5990
			vmx->soft_vnmi_blocked = 0;
		} else if (vmx->vnmi_blocked_time > 1000000000LL &&
5991
			   vcpu->arch.nmi_pending) {
5992 5993 5994 5995 5996 5997 5998 5999 6000 6001 6002 6003 6004
			/*
			 * This CPU don't support us in finding the end of an
			 * NMI-blocked window if the guest runs with IRQs
			 * disabled. So we pull the trigger after 1 s of
			 * futile waiting, but inform the user about this.
			 */
			printk(KERN_WARNING "%s: Breaking out of NMI-blocked "
			       "state on VCPU %d after 1 s timeout\n",
			       __func__, vcpu->vcpu_id);
			vmx->soft_vnmi_blocked = 0;
		}
	}

A
Avi Kivity 已提交
6005 6006
	if (exit_reason < kvm_vmx_max_exit_handlers
	    && kvm_vmx_exit_handlers[exit_reason])
A
Avi Kivity 已提交
6007
		return kvm_vmx_exit_handlers[exit_reason](vcpu);
A
Avi Kivity 已提交
6008
	else {
A
Avi Kivity 已提交
6009 6010
		vcpu->run->exit_reason = KVM_EXIT_UNKNOWN;
		vcpu->run->hw.hardware_exit_reason = exit_reason;
A
Avi Kivity 已提交
6011 6012 6013 6014
	}
	return 0;
}

6015
static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
6016
{
6017
	if (irr == -1 || tpr < irr) {
6018 6019 6020 6021
		vmcs_write32(TPR_THRESHOLD, 0);
		return;
	}

6022
	vmcs_write32(TPR_THRESHOLD, irr);
6023 6024
}

6025
static void vmx_complete_atomic_exit(struct vcpu_vmx *vmx)
6026
{
6027 6028 6029 6030 6031 6032
	u32 exit_intr_info;

	if (!(vmx->exit_reason == EXIT_REASON_MCE_DURING_VMENTRY
	      || vmx->exit_reason == EXIT_REASON_EXCEPTION_NMI))
		return;

6033
	vmx->exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
6034
	exit_intr_info = vmx->exit_intr_info;
A
Andi Kleen 已提交
6035 6036

	/* Handle machine checks before interrupts are enabled */
6037
	if (is_machine_check(exit_intr_info))
A
Andi Kleen 已提交
6038 6039
		kvm_machine_check();

6040
	/* We need to handle NMIs before interrupts are enabled */
6041
	if ((exit_intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_NMI_INTR &&
6042 6043
	    (exit_intr_info & INTR_INFO_VALID_MASK)) {
		kvm_before_handle_nmi(&vmx->vcpu);
6044
		asm("int $2");
6045 6046
		kvm_after_handle_nmi(&vmx->vcpu);
	}
6047
}
6048

6049 6050
static void vmx_recover_nmi_blocking(struct vcpu_vmx *vmx)
{
6051
	u32 exit_intr_info;
6052 6053 6054 6055 6056
	bool unblock_nmi;
	u8 vector;
	bool idtv_info_valid;

	idtv_info_valid = vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK;
6057

6058
	if (cpu_has_virtual_nmis()) {
6059 6060
		if (vmx->nmi_known_unmasked)
			return;
6061 6062 6063 6064 6065
		/*
		 * Can't use vmx->exit_intr_info since we're not sure what
		 * the exit reason is.
		 */
		exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
6066 6067 6068
		unblock_nmi = (exit_intr_info & INTR_INFO_UNBLOCK_NMI) != 0;
		vector = exit_intr_info & INTR_INFO_VECTOR_MASK;
		/*
6069
		 * SDM 3: 27.7.1.2 (September 2008)
6070 6071
		 * Re-set bit "block by NMI" before VM entry if vmexit caused by
		 * a guest IRET fault.
6072 6073 6074 6075 6076
		 * SDM 3: 23.2.2 (September 2008)
		 * Bit 12 is undefined in any of the following cases:
		 *  If the VM exit sets the valid bit in the IDT-vectoring
		 *   information field.
		 *  If the VM exit is due to a double fault.
6077
		 */
6078 6079
		if ((exit_intr_info & INTR_INFO_VALID_MASK) && unblock_nmi &&
		    vector != DF_VECTOR && !idtv_info_valid)
6080 6081
			vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO,
				      GUEST_INTR_STATE_NMI);
6082 6083 6084 6085
		else
			vmx->nmi_known_unmasked =
				!(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO)
				  & GUEST_INTR_STATE_NMI);
6086 6087 6088
	} else if (unlikely(vmx->soft_vnmi_blocked))
		vmx->vnmi_blocked_time +=
			ktime_to_ns(ktime_sub(ktime_get(), vmx->entry_time));
6089 6090
}

6091 6092 6093 6094
static void __vmx_complete_interrupts(struct vcpu_vmx *vmx,
				      u32 idt_vectoring_info,
				      int instr_len_field,
				      int error_code_field)
6095 6096 6097 6098 6099 6100
{
	u8 vector;
	int type;
	bool idtv_info_valid;

	idtv_info_valid = idt_vectoring_info & VECTORING_INFO_VALID_MASK;
6101

6102 6103 6104 6105 6106 6107 6108
	vmx->vcpu.arch.nmi_injected = false;
	kvm_clear_exception_queue(&vmx->vcpu);
	kvm_clear_interrupt_queue(&vmx->vcpu);

	if (!idtv_info_valid)
		return;

6109 6110
	kvm_make_request(KVM_REQ_EVENT, &vmx->vcpu);

6111 6112
	vector = idt_vectoring_info & VECTORING_INFO_VECTOR_MASK;
	type = idt_vectoring_info & VECTORING_INFO_TYPE_MASK;
6113

6114
	switch (type) {
6115 6116
	case INTR_TYPE_NMI_INTR:
		vmx->vcpu.arch.nmi_injected = true;
6117
		/*
6118
		 * SDM 3: 27.7.1.2 (September 2008)
6119 6120
		 * Clear bit "block by NMI" before VM entry if a NMI
		 * delivery faulted.
6121
		 */
6122
		vmx_set_nmi_mask(&vmx->vcpu, false);
6123 6124
		break;
	case INTR_TYPE_SOFT_EXCEPTION:
6125
		vmx->vcpu.arch.event_exit_inst_len =
6126
			vmcs_read32(instr_len_field);
6127 6128
		/* fall through */
	case INTR_TYPE_HARD_EXCEPTION:
6129
		if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) {
6130
			u32 err = vmcs_read32(error_code_field);
6131
			kvm_queue_exception_e(&vmx->vcpu, vector, err);
6132 6133
		} else
			kvm_queue_exception(&vmx->vcpu, vector);
6134
		break;
6135 6136
	case INTR_TYPE_SOFT_INTR:
		vmx->vcpu.arch.event_exit_inst_len =
6137
			vmcs_read32(instr_len_field);
6138
		/* fall through */
6139
	case INTR_TYPE_EXT_INTR:
6140 6141
		kvm_queue_interrupt(&vmx->vcpu, vector,
			type == INTR_TYPE_SOFT_INTR);
6142 6143 6144
		break;
	default:
		break;
6145
	}
6146 6147
}

6148 6149
static void vmx_complete_interrupts(struct vcpu_vmx *vmx)
{
6150 6151
	if (is_guest_mode(&vmx->vcpu))
		return;
6152 6153 6154 6155 6156
	__vmx_complete_interrupts(vmx, vmx->idt_vectoring_info,
				  VM_EXIT_INSTRUCTION_LEN,
				  IDT_VECTORING_ERROR_CODE);
}

A
Avi Kivity 已提交
6157 6158
static void vmx_cancel_injection(struct kvm_vcpu *vcpu)
{
6159 6160
	if (is_guest_mode(vcpu))
		return;
A
Avi Kivity 已提交
6161 6162 6163 6164 6165 6166 6167 6168
	__vmx_complete_interrupts(to_vmx(vcpu),
				  vmcs_read32(VM_ENTRY_INTR_INFO_FIELD),
				  VM_ENTRY_INSTRUCTION_LEN,
				  VM_ENTRY_EXCEPTION_ERROR_CODE);

	vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);
}

6169 6170 6171 6172 6173 6174 6175 6176 6177 6178 6179 6180 6181 6182 6183 6184 6185 6186
static void atomic_switch_perf_msrs(struct vcpu_vmx *vmx)
{
	int i, nr_msrs;
	struct perf_guest_switch_msr *msrs;

	msrs = perf_guest_get_msrs(&nr_msrs);

	if (!msrs)
		return;

	for (i = 0; i < nr_msrs; i++)
		if (msrs[i].host == msrs[i].guest)
			clear_atomic_switch_msr(vmx, msrs[i].msr);
		else
			add_atomic_switch_msr(vmx, msrs[i].msr, msrs[i].guest,
					msrs[i].host);
}

6187
static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
A
Avi Kivity 已提交
6188
{
6189
	struct vcpu_vmx *vmx = to_vmx(vcpu);
6190
	unsigned long debugctlmsr;
6191

6192 6193 6194 6195 6196 6197 6198 6199 6200 6201 6202 6203 6204 6205 6206
	if (is_guest_mode(vcpu) && !vmx->nested.nested_run_pending) {
		struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
		if (vmcs12->idt_vectoring_info_field &
				VECTORING_INFO_VALID_MASK) {
			vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
				vmcs12->idt_vectoring_info_field);
			vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
				vmcs12->vm_exit_instruction_len);
			if (vmcs12->idt_vectoring_info_field &
					VECTORING_INFO_DELIVER_CODE_MASK)
				vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE,
					vmcs12->idt_vectoring_error_code);
		}
	}

6207 6208 6209 6210 6211 6212 6213 6214 6215 6216 6217 6218 6219 6220 6221 6222 6223 6224 6225 6226 6227 6228
	/* Record the guest's net vcpu time for enforced NMI injections. */
	if (unlikely(!cpu_has_virtual_nmis() && vmx->soft_vnmi_blocked))
		vmx->entry_time = ktime_get();

	/* Don't enter VMX if guest state is invalid, let the exit handler
	   start emulation until we arrive back to a valid state */
	if (vmx->emulation_required && emulate_invalid_guest_state)
		return;

	if (test_bit(VCPU_REGS_RSP, (unsigned long *)&vcpu->arch.regs_dirty))
		vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]);
	if (test_bit(VCPU_REGS_RIP, (unsigned long *)&vcpu->arch.regs_dirty))
		vmcs_writel(GUEST_RIP, vcpu->arch.regs[VCPU_REGS_RIP]);

	/* When single-stepping over STI and MOV SS, we must clear the
	 * corresponding interruptibility bits in the guest state. Otherwise
	 * vmentry fails as it then expects bit 14 (BS) in pending debug
	 * exceptions being set, but that's not correct for the guest debugging
	 * case. */
	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
		vmx_set_interrupt_shadow(vcpu, 0);

6229
	atomic_switch_perf_msrs(vmx);
6230
	debugctlmsr = get_debugctlmsr();
6231

6232
	vmx->__launched = vmx->loaded_vmcs->launched;
6233
	asm(
A
Avi Kivity 已提交
6234
		/* Store host registers */
A
Avi Kivity 已提交
6235 6236 6237 6238
		"push %%" _ASM_DX "; push %%" _ASM_BP ";"
		"push %%" _ASM_CX " \n\t" /* placeholder for guest rcx */
		"push %%" _ASM_CX " \n\t"
		"cmp %%" _ASM_SP ", %c[host_rsp](%0) \n\t"
6239
		"je 1f \n\t"
A
Avi Kivity 已提交
6240
		"mov %%" _ASM_SP ", %c[host_rsp](%0) \n\t"
6241
		__ex(ASM_VMX_VMWRITE_RSP_RDX) "\n\t"
6242
		"1: \n\t"
6243
		/* Reload cr2 if changed */
A
Avi Kivity 已提交
6244 6245 6246
		"mov %c[cr2](%0), %%" _ASM_AX " \n\t"
		"mov %%cr2, %%" _ASM_DX " \n\t"
		"cmp %%" _ASM_AX ", %%" _ASM_DX " \n\t"
6247
		"je 2f \n\t"
A
Avi Kivity 已提交
6248
		"mov %%" _ASM_AX", %%cr2 \n\t"
6249
		"2: \n\t"
A
Avi Kivity 已提交
6250
		/* Check if vmlaunch of vmresume is needed */
6251
		"cmpl $0, %c[launched](%0) \n\t"
A
Avi Kivity 已提交
6252
		/* Load guest registers.  Don't clobber flags. */
A
Avi Kivity 已提交
6253 6254 6255 6256 6257 6258
		"mov %c[rax](%0), %%" _ASM_AX " \n\t"
		"mov %c[rbx](%0), %%" _ASM_BX " \n\t"
		"mov %c[rdx](%0), %%" _ASM_DX " \n\t"
		"mov %c[rsi](%0), %%" _ASM_SI " \n\t"
		"mov %c[rdi](%0), %%" _ASM_DI " \n\t"
		"mov %c[rbp](%0), %%" _ASM_BP " \n\t"
6259
#ifdef CONFIG_X86_64
6260 6261 6262 6263 6264 6265 6266 6267
		"mov %c[r8](%0),  %%r8  \n\t"
		"mov %c[r9](%0),  %%r9  \n\t"
		"mov %c[r10](%0), %%r10 \n\t"
		"mov %c[r11](%0), %%r11 \n\t"
		"mov %c[r12](%0), %%r12 \n\t"
		"mov %c[r13](%0), %%r13 \n\t"
		"mov %c[r14](%0), %%r14 \n\t"
		"mov %c[r15](%0), %%r15 \n\t"
A
Avi Kivity 已提交
6268
#endif
A
Avi Kivity 已提交
6269
		"mov %c[rcx](%0), %%" _ASM_CX " \n\t" /* kills %0 (ecx) */
6270

A
Avi Kivity 已提交
6271
		/* Enter guest mode */
A
Avi Kivity 已提交
6272
		"jne 1f \n\t"
6273
		__ex(ASM_VMX_VMLAUNCH) "\n\t"
A
Avi Kivity 已提交
6274 6275 6276
		"jmp 2f \n\t"
		"1: " __ex(ASM_VMX_VMRESUME) "\n\t"
		"2: "
A
Avi Kivity 已提交
6277
		/* Save guest registers, load host registers, keep flags */
A
Avi Kivity 已提交
6278
		"mov %0, %c[wordsize](%%" _ASM_SP ") \n\t"
6279
		"pop %0 \n\t"
A
Avi Kivity 已提交
6280 6281 6282 6283 6284 6285 6286
		"mov %%" _ASM_AX ", %c[rax](%0) \n\t"
		"mov %%" _ASM_BX ", %c[rbx](%0) \n\t"
		__ASM_SIZE(pop) " %c[rcx](%0) \n\t"
		"mov %%" _ASM_DX ", %c[rdx](%0) \n\t"
		"mov %%" _ASM_SI ", %c[rsi](%0) \n\t"
		"mov %%" _ASM_DI ", %c[rdi](%0) \n\t"
		"mov %%" _ASM_BP ", %c[rbp](%0) \n\t"
6287
#ifdef CONFIG_X86_64
6288 6289 6290 6291 6292 6293 6294 6295
		"mov %%r8,  %c[r8](%0) \n\t"
		"mov %%r9,  %c[r9](%0) \n\t"
		"mov %%r10, %c[r10](%0) \n\t"
		"mov %%r11, %c[r11](%0) \n\t"
		"mov %%r12, %c[r12](%0) \n\t"
		"mov %%r13, %c[r13](%0) \n\t"
		"mov %%r14, %c[r14](%0) \n\t"
		"mov %%r15, %c[r15](%0) \n\t"
A
Avi Kivity 已提交
6296
#endif
A
Avi Kivity 已提交
6297 6298
		"mov %%cr2, %%" _ASM_AX "   \n\t"
		"mov %%" _ASM_AX ", %c[cr2](%0) \n\t"
6299

A
Avi Kivity 已提交
6300
		"pop  %%" _ASM_BP "; pop  %%" _ASM_DX " \n\t"
6301
		"setbe %c[fail](%0) \n\t"
A
Avi Kivity 已提交
6302 6303 6304 6305
		".pushsection .rodata \n\t"
		".global vmx_return \n\t"
		"vmx_return: " _ASM_PTR " 2b \n\t"
		".popsection"
6306
	      : : "c"(vmx), "d"((unsigned long)HOST_RSP),
6307
		[launched]"i"(offsetof(struct vcpu_vmx, __launched)),
6308
		[fail]"i"(offsetof(struct vcpu_vmx, fail)),
6309
		[host_rsp]"i"(offsetof(struct vcpu_vmx, host_rsp)),
6310 6311 6312 6313 6314 6315 6316
		[rax]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RAX])),
		[rbx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RBX])),
		[rcx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RCX])),
		[rdx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RDX])),
		[rsi]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RSI])),
		[rdi]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RDI])),
		[rbp]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RBP])),
6317
#ifdef CONFIG_X86_64
6318 6319 6320 6321 6322 6323 6324 6325
		[r8]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R8])),
		[r9]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R9])),
		[r10]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R10])),
		[r11]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R11])),
		[r12]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R12])),
		[r13]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R13])),
		[r14]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R14])),
		[r15]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R15])),
A
Avi Kivity 已提交
6326
#endif
6327 6328
		[cr2]"i"(offsetof(struct vcpu_vmx, vcpu.arch.cr2)),
		[wordsize]"i"(sizeof(ulong))
6329 6330
	      : "cc", "memory"
#ifdef CONFIG_X86_64
A
Avi Kivity 已提交
6331
		, "rax", "rbx", "rdi", "rsi"
6332
		, "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
A
Avi Kivity 已提交
6333 6334
#else
		, "eax", "ebx", "edi", "esi"
6335 6336
#endif
	      );
A
Avi Kivity 已提交
6337

6338 6339 6340 6341
	/* MSR_IA32_DEBUGCTLMSR is zeroed on vmexit. Restore it if needed */
	if (debugctlmsr)
		update_debugctlmsr(debugctlmsr);

6342 6343 6344 6345 6346 6347 6348 6349 6350 6351 6352 6353 6354
#ifndef CONFIG_X86_64
	/*
	 * The sysexit path does not restore ds/es, so we must set them to
	 * a reasonable value ourselves.
	 *
	 * We can't defer this to vmx_load_host_state() since that function
	 * may be executed in interrupt context, which saves and restore segments
	 * around it, nullifying its effect.
	 */
	loadsegment(ds, __USER_DS);
	loadsegment(es, __USER_DS);
#endif

A
Avi Kivity 已提交
6355
	vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP)
A
Avi Kivity 已提交
6356
				  | (1 << VCPU_EXREG_RFLAGS)
A
Avi Kivity 已提交
6357
				  | (1 << VCPU_EXREG_CPL)
6358
				  | (1 << VCPU_EXREG_PDPTR)
A
Avi Kivity 已提交
6359
				  | (1 << VCPU_EXREG_SEGMENTS)
6360
				  | (1 << VCPU_EXREG_CR3));
6361 6362
	vcpu->arch.regs_dirty = 0;

6363 6364
	vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);

6365 6366 6367 6368 6369 6370 6371 6372 6373 6374 6375
	if (is_guest_mode(vcpu)) {
		struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
		vmcs12->idt_vectoring_info_field = vmx->idt_vectoring_info;
		if (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK) {
			vmcs12->idt_vectoring_error_code =
				vmcs_read32(IDT_VECTORING_ERROR_CODE);
			vmcs12->vm_exit_instruction_len =
				vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
		}
	}

6376
	vmx->loaded_vmcs->launched = 1;
6377

6378
	vmx->exit_reason = vmcs_read32(VM_EXIT_REASON);
6379
	trace_kvm_exit(vmx->exit_reason, vcpu, KVM_ISA_VMX);
6380 6381 6382

	vmx_complete_atomic_exit(vmx);
	vmx_recover_nmi_blocking(vmx);
6383
	vmx_complete_interrupts(vmx);
A
Avi Kivity 已提交
6384 6385 6386 6387
}

static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
{
R
Rusty Russell 已提交
6388 6389
	struct vcpu_vmx *vmx = to_vmx(vcpu);

6390
	free_vpid(vmx);
6391
	free_nested(vmx);
6392
	free_loaded_vmcs(vmx->loaded_vmcs);
R
Rusty Russell 已提交
6393 6394
	kfree(vmx->guest_msrs);
	kvm_vcpu_uninit(vcpu);
6395
	kmem_cache_free(kvm_vcpu_cache, vmx);
A
Avi Kivity 已提交
6396 6397
}

R
Rusty Russell 已提交
6398
static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
A
Avi Kivity 已提交
6399
{
R
Rusty Russell 已提交
6400
	int err;
6401
	struct vcpu_vmx *vmx = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
6402
	int cpu;
A
Avi Kivity 已提交
6403

6404
	if (!vmx)
R
Rusty Russell 已提交
6405 6406
		return ERR_PTR(-ENOMEM);

6407 6408
	allocate_vpid(vmx);

R
Rusty Russell 已提交
6409 6410 6411
	err = kvm_vcpu_init(&vmx->vcpu, kvm, id);
	if (err)
		goto free_vcpu;
6412

6413
	vmx->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
6414
	err = -ENOMEM;
R
Rusty Russell 已提交
6415 6416 6417
	if (!vmx->guest_msrs) {
		goto uninit_vcpu;
	}
6418

6419 6420 6421
	vmx->loaded_vmcs = &vmx->vmcs01;
	vmx->loaded_vmcs->vmcs = alloc_vmcs();
	if (!vmx->loaded_vmcs->vmcs)
R
Rusty Russell 已提交
6422
		goto free_msrs;
6423 6424 6425 6426 6427
	if (!vmm_exclusive)
		kvm_cpu_vmxon(__pa(per_cpu(vmxarea, raw_smp_processor_id())));
	loaded_vmcs_init(vmx->loaded_vmcs);
	if (!vmm_exclusive)
		kvm_cpu_vmxoff();
6428

6429 6430
	cpu = get_cpu();
	vmx_vcpu_load(&vmx->vcpu, cpu);
Z
Zachary Amsden 已提交
6431
	vmx->vcpu.cpu = cpu;
R
Rusty Russell 已提交
6432
	err = vmx_vcpu_setup(vmx);
R
Rusty Russell 已提交
6433
	vmx_vcpu_put(&vmx->vcpu);
6434
	put_cpu();
R
Rusty Russell 已提交
6435 6436
	if (err)
		goto free_vmcs;
6437
	if (vm_need_virtualize_apic_accesses(kvm))
6438 6439
		err = alloc_apic_access_page(kvm);
		if (err)
6440
			goto free_vmcs;
R
Rusty Russell 已提交
6441

6442 6443 6444 6445
	if (enable_ept) {
		if (!kvm->arch.ept_identity_map_addr)
			kvm->arch.ept_identity_map_addr =
				VMX_EPT_IDENTITY_PAGETABLE_ADDR;
6446
		err = -ENOMEM;
6447 6448
		if (alloc_identity_pagetable(kvm) != 0)
			goto free_vmcs;
6449 6450
		if (!init_rmode_identity_map(kvm))
			goto free_vmcs;
6451
	}
6452

6453 6454 6455
	vmx->nested.current_vmptr = -1ull;
	vmx->nested.current_vmcs12 = NULL;

R
Rusty Russell 已提交
6456 6457 6458
	return &vmx->vcpu;

free_vmcs:
6459
	free_loaded_vmcs(vmx->loaded_vmcs);
R
Rusty Russell 已提交
6460 6461 6462 6463 6464
free_msrs:
	kfree(vmx->guest_msrs);
uninit_vcpu:
	kvm_vcpu_uninit(&vmx->vcpu);
free_vcpu:
6465
	free_vpid(vmx);
6466
	kmem_cache_free(kvm_vcpu_cache, vmx);
R
Rusty Russell 已提交
6467
	return ERR_PTR(err);
A
Avi Kivity 已提交
6468 6469
}

Y
Yang, Sheng 已提交
6470 6471 6472 6473 6474 6475 6476 6477 6478 6479 6480 6481 6482 6483
static void __init vmx_check_processor_compat(void *rtn)
{
	struct vmcs_config vmcs_conf;

	*(int *)rtn = 0;
	if (setup_vmcs_config(&vmcs_conf) < 0)
		*(int *)rtn = -EIO;
	if (memcmp(&vmcs_config, &vmcs_conf, sizeof(struct vmcs_config)) != 0) {
		printk(KERN_ERR "kvm: CPU %d feature inconsistency!\n",
				smp_processor_id());
		*(int *)rtn = -EIO;
	}
}

6484 6485 6486 6487 6488
static int get_ept_level(void)
{
	return VMX_EPT_DEFAULT_GAW + 1;
}

6489
static u64 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
S
Sheng Yang 已提交
6490
{
6491 6492
	u64 ret;

6493 6494 6495 6496 6497 6498 6499 6500
	/* For VT-d and EPT combination
	 * 1. MMIO: always map as UC
	 * 2. EPT with VT-d:
	 *   a. VT-d without snooping control feature: can't guarantee the
	 *	result, try to trust guest.
	 *   b. VT-d with snooping control feature: snooping control feature of
	 *	VT-d engine can guarantee the cache correctness. Just set it
	 *	to WB to keep consistent with host. So the same as item 3.
6501
	 * 3. EPT without VT-d: always map as WB and set IPAT=1 to keep
6502 6503
	 *    consistent with host MTRR
	 */
6504 6505
	if (is_mmio)
		ret = MTRR_TYPE_UNCACHABLE << VMX_EPT_MT_EPTE_SHIFT;
6506 6507 6508 6509
	else if (vcpu->kvm->arch.iommu_domain &&
		!(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY))
		ret = kvm_get_guest_memory_type(vcpu, gfn) <<
		      VMX_EPT_MT_EPTE_SHIFT;
6510
	else
6511
		ret = (MTRR_TYPE_WRBACK << VMX_EPT_MT_EPTE_SHIFT)
6512
			| VMX_EPT_IPAT_BIT;
6513 6514

	return ret;
S
Sheng Yang 已提交
6515 6516
}

6517
static int vmx_get_lpage_level(void)
6518
{
6519 6520 6521 6522 6523
	if (enable_ept && !cpu_has_vmx_ept_1g_page())
		return PT_DIRECTORY_LEVEL;
	else
		/* For shadow and EPT supported 1GB page */
		return PT_PDPE_LEVEL;
6524 6525
}

6526 6527
static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
{
6528 6529 6530 6531 6532 6533 6534 6535 6536 6537 6538 6539 6540 6541 6542 6543 6544 6545
	struct kvm_cpuid_entry2 *best;
	struct vcpu_vmx *vmx = to_vmx(vcpu);
	u32 exec_control;

	vmx->rdtscp_enabled = false;
	if (vmx_rdtscp_supported()) {
		exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
		if (exec_control & SECONDARY_EXEC_RDTSCP) {
			best = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
			if (best && (best->edx & bit(X86_FEATURE_RDTSCP)))
				vmx->rdtscp_enabled = true;
			else {
				exec_control &= ~SECONDARY_EXEC_RDTSCP;
				vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
						exec_control);
			}
		}
	}
6546 6547 6548 6549 6550 6551 6552 6553 6554 6555 6556 6557 6558 6559 6560 6561 6562

	exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
	/* Exposing INVPCID only when PCID is exposed */
	best = kvm_find_cpuid_entry(vcpu, 0x7, 0);
	if (vmx_invpcid_supported() &&
	    best && (best->ecx & bit(X86_FEATURE_INVPCID)) &&
	    guest_cpuid_has_pcid(vcpu)) {
		exec_control |= SECONDARY_EXEC_ENABLE_INVPCID;
		vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
			     exec_control);
	} else {
		exec_control &= ~SECONDARY_EXEC_ENABLE_INVPCID;
		vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
			     exec_control);
		if (best)
			best->ecx &= ~bit(X86_FEATURE_INVPCID);
	}
6563 6564
}

6565 6566
static void vmx_set_supported_cpuid(u32 func, struct kvm_cpuid_entry2 *entry)
{
6567 6568
	if (func == 1 && nested)
		entry->ecx |= bit(X86_FEATURE_VMX);
6569 6570
}

6571 6572 6573 6574 6575 6576 6577 6578 6579 6580 6581 6582 6583 6584 6585 6586 6587 6588 6589 6590 6591 6592 6593 6594 6595 6596 6597 6598 6599 6600 6601 6602 6603 6604 6605 6606 6607 6608 6609 6610 6611 6612 6613 6614 6615 6616 6617 6618 6619 6620 6621 6622 6623 6624 6625 6626 6627 6628 6629 6630 6631 6632 6633 6634 6635 6636 6637 6638 6639 6640 6641 6642 6643 6644 6645 6646 6647 6648 6649 6650 6651 6652 6653 6654 6655 6656 6657 6658 6659 6660 6661 6662 6663 6664 6665 6666 6667 6668 6669 6670 6671 6672 6673 6674 6675 6676 6677 6678 6679 6680 6681 6682 6683 6684 6685 6686 6687 6688 6689 6690 6691 6692 6693 6694 6695 6696 6697 6698 6699 6700 6701 6702 6703 6704 6705 6706 6707 6708 6709 6710 6711 6712 6713 6714 6715 6716 6717 6718 6719 6720 6721 6722 6723 6724 6725 6726 6727 6728 6729 6730 6731 6732 6733 6734 6735 6736 6737 6738 6739 6740 6741 6742 6743 6744 6745 6746 6747 6748 6749 6750 6751 6752 6753 6754 6755 6756 6757 6758 6759 6760 6761 6762 6763
/*
 * prepare_vmcs02 is called when the L1 guest hypervisor runs its nested
 * L2 guest. L1 has a vmcs for L2 (vmcs12), and this function "merges" it
 * with L0's requirements for its guest (a.k.a. vmsc01), so we can run the L2
 * guest in a way that will both be appropriate to L1's requests, and our
 * needs. In addition to modifying the active vmcs (which is vmcs02), this
 * function also has additional necessary side-effects, like setting various
 * vcpu->arch fields.
 */
static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
{
	struct vcpu_vmx *vmx = to_vmx(vcpu);
	u32 exec_control;

	vmcs_write16(GUEST_ES_SELECTOR, vmcs12->guest_es_selector);
	vmcs_write16(GUEST_CS_SELECTOR, vmcs12->guest_cs_selector);
	vmcs_write16(GUEST_SS_SELECTOR, vmcs12->guest_ss_selector);
	vmcs_write16(GUEST_DS_SELECTOR, vmcs12->guest_ds_selector);
	vmcs_write16(GUEST_FS_SELECTOR, vmcs12->guest_fs_selector);
	vmcs_write16(GUEST_GS_SELECTOR, vmcs12->guest_gs_selector);
	vmcs_write16(GUEST_LDTR_SELECTOR, vmcs12->guest_ldtr_selector);
	vmcs_write16(GUEST_TR_SELECTOR, vmcs12->guest_tr_selector);
	vmcs_write32(GUEST_ES_LIMIT, vmcs12->guest_es_limit);
	vmcs_write32(GUEST_CS_LIMIT, vmcs12->guest_cs_limit);
	vmcs_write32(GUEST_SS_LIMIT, vmcs12->guest_ss_limit);
	vmcs_write32(GUEST_DS_LIMIT, vmcs12->guest_ds_limit);
	vmcs_write32(GUEST_FS_LIMIT, vmcs12->guest_fs_limit);
	vmcs_write32(GUEST_GS_LIMIT, vmcs12->guest_gs_limit);
	vmcs_write32(GUEST_LDTR_LIMIT, vmcs12->guest_ldtr_limit);
	vmcs_write32(GUEST_TR_LIMIT, vmcs12->guest_tr_limit);
	vmcs_write32(GUEST_GDTR_LIMIT, vmcs12->guest_gdtr_limit);
	vmcs_write32(GUEST_IDTR_LIMIT, vmcs12->guest_idtr_limit);
	vmcs_write32(GUEST_ES_AR_BYTES, vmcs12->guest_es_ar_bytes);
	vmcs_write32(GUEST_CS_AR_BYTES, vmcs12->guest_cs_ar_bytes);
	vmcs_write32(GUEST_SS_AR_BYTES, vmcs12->guest_ss_ar_bytes);
	vmcs_write32(GUEST_DS_AR_BYTES, vmcs12->guest_ds_ar_bytes);
	vmcs_write32(GUEST_FS_AR_BYTES, vmcs12->guest_fs_ar_bytes);
	vmcs_write32(GUEST_GS_AR_BYTES, vmcs12->guest_gs_ar_bytes);
	vmcs_write32(GUEST_LDTR_AR_BYTES, vmcs12->guest_ldtr_ar_bytes);
	vmcs_write32(GUEST_TR_AR_BYTES, vmcs12->guest_tr_ar_bytes);
	vmcs_writel(GUEST_ES_BASE, vmcs12->guest_es_base);
	vmcs_writel(GUEST_CS_BASE, vmcs12->guest_cs_base);
	vmcs_writel(GUEST_SS_BASE, vmcs12->guest_ss_base);
	vmcs_writel(GUEST_DS_BASE, vmcs12->guest_ds_base);
	vmcs_writel(GUEST_FS_BASE, vmcs12->guest_fs_base);
	vmcs_writel(GUEST_GS_BASE, vmcs12->guest_gs_base);
	vmcs_writel(GUEST_LDTR_BASE, vmcs12->guest_ldtr_base);
	vmcs_writel(GUEST_TR_BASE, vmcs12->guest_tr_base);
	vmcs_writel(GUEST_GDTR_BASE, vmcs12->guest_gdtr_base);
	vmcs_writel(GUEST_IDTR_BASE, vmcs12->guest_idtr_base);

	vmcs_write64(GUEST_IA32_DEBUGCTL, vmcs12->guest_ia32_debugctl);
	vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
		vmcs12->vm_entry_intr_info_field);
	vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE,
		vmcs12->vm_entry_exception_error_code);
	vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
		vmcs12->vm_entry_instruction_len);
	vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
		vmcs12->guest_interruptibility_info);
	vmcs_write32(GUEST_ACTIVITY_STATE, vmcs12->guest_activity_state);
	vmcs_write32(GUEST_SYSENTER_CS, vmcs12->guest_sysenter_cs);
	vmcs_writel(GUEST_DR7, vmcs12->guest_dr7);
	vmcs_writel(GUEST_RFLAGS, vmcs12->guest_rflags);
	vmcs_writel(GUEST_PENDING_DBG_EXCEPTIONS,
		vmcs12->guest_pending_dbg_exceptions);
	vmcs_writel(GUEST_SYSENTER_ESP, vmcs12->guest_sysenter_esp);
	vmcs_writel(GUEST_SYSENTER_EIP, vmcs12->guest_sysenter_eip);

	vmcs_write64(VMCS_LINK_POINTER, -1ull);

	vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
		(vmcs_config.pin_based_exec_ctrl |
		 vmcs12->pin_based_vm_exec_control));

	/*
	 * Whether page-faults are trapped is determined by a combination of
	 * 3 settings: PFEC_MASK, PFEC_MATCH and EXCEPTION_BITMAP.PF.
	 * If enable_ept, L0 doesn't care about page faults and we should
	 * set all of these to L1's desires. However, if !enable_ept, L0 does
	 * care about (at least some) page faults, and because it is not easy
	 * (if at all possible?) to merge L0 and L1's desires, we simply ask
	 * to exit on each and every L2 page fault. This is done by setting
	 * MASK=MATCH=0 and (see below) EB.PF=1.
	 * Note that below we don't need special code to set EB.PF beyond the
	 * "or"ing of the EB of vmcs01 and vmcs12, because when enable_ept,
	 * vmcs01's EB.PF is 0 so the "or" will take vmcs12's value, and when
	 * !enable_ept, EB.PF is 1, so the "or" will always be 1.
	 *
	 * A problem with this approach (when !enable_ept) is that L1 may be
	 * injected with more page faults than it asked for. This could have
	 * caused problems, but in practice existing hypervisors don't care.
	 * To fix this, we will need to emulate the PFEC checking (on the L1
	 * page tables), using walk_addr(), when injecting PFs to L1.
	 */
	vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK,
		enable_ept ? vmcs12->page_fault_error_code_mask : 0);
	vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH,
		enable_ept ? vmcs12->page_fault_error_code_match : 0);

	if (cpu_has_secondary_exec_ctrls()) {
		u32 exec_control = vmx_secondary_exec_control(vmx);
		if (!vmx->rdtscp_enabled)
			exec_control &= ~SECONDARY_EXEC_RDTSCP;
		/* Take the following fields only from vmcs12 */
		exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
		if (nested_cpu_has(vmcs12,
				CPU_BASED_ACTIVATE_SECONDARY_CONTROLS))
			exec_control |= vmcs12->secondary_vm_exec_control;

		if (exec_control & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES) {
			/*
			 * Translate L1 physical address to host physical
			 * address for vmcs02. Keep the page pinned, so this
			 * physical address remains valid. We keep a reference
			 * to it so we can release it later.
			 */
			if (vmx->nested.apic_access_page) /* shouldn't happen */
				nested_release_page(vmx->nested.apic_access_page);
			vmx->nested.apic_access_page =
				nested_get_page(vcpu, vmcs12->apic_access_addr);
			/*
			 * If translation failed, no matter: This feature asks
			 * to exit when accessing the given address, and if it
			 * can never be accessed, this feature won't do
			 * anything anyway.
			 */
			if (!vmx->nested.apic_access_page)
				exec_control &=
				  ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
			else
				vmcs_write64(APIC_ACCESS_ADDR,
				  page_to_phys(vmx->nested.apic_access_page));
		}

		vmcs_write32(SECONDARY_VM_EXEC_CONTROL, exec_control);
	}


	/*
	 * Set host-state according to L0's settings (vmcs12 is irrelevant here)
	 * Some constant fields are set here by vmx_set_constant_host_state().
	 * Other fields are different per CPU, and will be set later when
	 * vmx_vcpu_load() is called, and when vmx_save_host_state() is called.
	 */
	vmx_set_constant_host_state();

	/*
	 * HOST_RSP is normally set correctly in vmx_vcpu_run() just before
	 * entry, but only if the current (host) sp changed from the value
	 * we wrote last (vmx->host_rsp). This cache is no longer relevant
	 * if we switch vmcs, and rather than hold a separate cache per vmcs,
	 * here we just force the write to happen on entry.
	 */
	vmx->host_rsp = 0;

	exec_control = vmx_exec_control(vmx); /* L0's desires */
	exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
	exec_control &= ~CPU_BASED_VIRTUAL_NMI_PENDING;
	exec_control &= ~CPU_BASED_TPR_SHADOW;
	exec_control |= vmcs12->cpu_based_vm_exec_control;
	/*
	 * Merging of IO and MSR bitmaps not currently supported.
	 * Rather, exit every time.
	 */
	exec_control &= ~CPU_BASED_USE_MSR_BITMAPS;
	exec_control &= ~CPU_BASED_USE_IO_BITMAPS;
	exec_control |= CPU_BASED_UNCOND_IO_EXITING;

	vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, exec_control);

	/* EXCEPTION_BITMAP and CR0_GUEST_HOST_MASK should basically be the
	 * bitwise-or of what L1 wants to trap for L2, and what we want to
	 * trap. Note that CR0.TS also needs updating - we do this later.
	 */
	update_exception_bitmap(vcpu);
	vcpu->arch.cr0_guest_owned_bits &= ~vmcs12->cr0_guest_host_mask;
	vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);

	/* Note: IA32_MODE, LOAD_IA32_EFER are modified by vmx_set_efer below */
	vmcs_write32(VM_EXIT_CONTROLS,
		vmcs12->vm_exit_controls | vmcs_config.vmexit_ctrl);
	vmcs_write32(VM_ENTRY_CONTROLS, vmcs12->vm_entry_controls |
		(vmcs_config.vmentry_ctrl & ~VM_ENTRY_IA32E_MODE));

	if (vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_PAT)
		vmcs_write64(GUEST_IA32_PAT, vmcs12->guest_ia32_pat);
	else if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT)
		vmcs_write64(GUEST_IA32_PAT, vmx->vcpu.arch.pat);


	set_cr4_guest_host_mask(vmx);

6764 6765 6766 6767 6768
	if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETING)
		vmcs_write64(TSC_OFFSET,
			vmx->nested.vmcs01_tsc_offset + vmcs12->tsc_offset);
	else
		vmcs_write64(TSC_OFFSET, vmx->nested.vmcs01_tsc_offset);
6769 6770 6771 6772 6773 6774 6775 6776 6777 6778 6779 6780 6781 6782 6783 6784 6785 6786 6787 6788 6789 6790 6791 6792 6793 6794 6795 6796 6797 6798 6799 6800 6801 6802 6803 6804 6805 6806 6807 6808 6809 6810

	if (enable_vpid) {
		/*
		 * Trivially support vpid by letting L2s share their parent
		 * L1's vpid. TODO: move to a more elaborate solution, giving
		 * each L2 its own vpid and exposing the vpid feature to L1.
		 */
		vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid);
		vmx_flush_tlb(vcpu);
	}

	if (vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_EFER)
		vcpu->arch.efer = vmcs12->guest_ia32_efer;
	if (vmcs12->vm_entry_controls & VM_ENTRY_IA32E_MODE)
		vcpu->arch.efer |= (EFER_LMA | EFER_LME);
	else
		vcpu->arch.efer &= ~(EFER_LMA | EFER_LME);
	/* Note: modifies VM_ENTRY/EXIT_CONTROLS and GUEST/HOST_IA32_EFER */
	vmx_set_efer(vcpu, vcpu->arch.efer);

	/*
	 * This sets GUEST_CR0 to vmcs12->guest_cr0, with possibly a modified
	 * TS bit (for lazy fpu) and bits which we consider mandatory enabled.
	 * The CR0_READ_SHADOW is what L2 should have expected to read given
	 * the specifications by L1; It's not enough to take
	 * vmcs12->cr0_read_shadow because on our cr0_guest_host_mask we we
	 * have more bits than L1 expected.
	 */
	vmx_set_cr0(vcpu, vmcs12->guest_cr0);
	vmcs_writel(CR0_READ_SHADOW, nested_read_cr0(vmcs12));

	vmx_set_cr4(vcpu, vmcs12->guest_cr4);
	vmcs_writel(CR4_READ_SHADOW, nested_read_cr4(vmcs12));

	/* shadow page tables on either EPT or shadow page tables */
	kvm_set_cr3(vcpu, vmcs12->guest_cr3);
	kvm_mmu_reset_context(vcpu);

	kvm_register_write(vcpu, VCPU_REGS_RSP, vmcs12->guest_rsp);
	kvm_register_write(vcpu, VCPU_REGS_RIP, vmcs12->guest_rip);
}

6811 6812 6813 6814 6815 6816 6817 6818 6819 6820 6821 6822 6823 6824 6825 6826 6827 6828
/*
 * nested_vmx_run() handles a nested entry, i.e., a VMLAUNCH or VMRESUME on L1
 * for running an L2 nested guest.
 */
static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch)
{
	struct vmcs12 *vmcs12;
	struct vcpu_vmx *vmx = to_vmx(vcpu);
	int cpu;
	struct loaded_vmcs *vmcs02;

	if (!nested_vmx_check_permission(vcpu) ||
	    !nested_vmx_check_vmcs12(vcpu))
		return 1;

	skip_emulated_instruction(vcpu);
	vmcs12 = get_vmcs12(vcpu);

6829 6830 6831 6832 6833 6834 6835 6836 6837 6838 6839 6840 6841 6842 6843 6844 6845 6846 6847 6848 6849 6850 6851 6852 6853 6854 6855 6856 6857 6858 6859 6860 6861 6862
	/*
	 * The nested entry process starts with enforcing various prerequisites
	 * on vmcs12 as required by the Intel SDM, and act appropriately when
	 * they fail: As the SDM explains, some conditions should cause the
	 * instruction to fail, while others will cause the instruction to seem
	 * to succeed, but return an EXIT_REASON_INVALID_STATE.
	 * To speed up the normal (success) code path, we should avoid checking
	 * for misconfigurations which will anyway be caught by the processor
	 * when using the merged vmcs02.
	 */
	if (vmcs12->launch_state == launch) {
		nested_vmx_failValid(vcpu,
			launch ? VMXERR_VMLAUNCH_NONCLEAR_VMCS
			       : VMXERR_VMRESUME_NONLAUNCHED_VMCS);
		return 1;
	}

	if ((vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_MSR_BITMAPS) &&
			!IS_ALIGNED(vmcs12->msr_bitmap, PAGE_SIZE)) {
		/*TODO: Also verify bits beyond physical address width are 0*/
		nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
		return 1;
	}

	if (nested_cpu_has2(vmcs12, SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES) &&
			!IS_ALIGNED(vmcs12->apic_access_addr, PAGE_SIZE)) {
		/*TODO: Also verify bits beyond physical address width are 0*/
		nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
		return 1;
	}

	if (vmcs12->vm_entry_msr_load_count > 0 ||
	    vmcs12->vm_exit_msr_load_count > 0 ||
	    vmcs12->vm_exit_msr_store_count > 0) {
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		pr_warn_ratelimited("%s: VMCS MSR_{LOAD,STORE} unsupported\n",
				    __func__);
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		nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
		return 1;
	}

	if (!vmx_control_verify(vmcs12->cpu_based_vm_exec_control,
	      nested_vmx_procbased_ctls_low, nested_vmx_procbased_ctls_high) ||
	    !vmx_control_verify(vmcs12->secondary_vm_exec_control,
	      nested_vmx_secondary_ctls_low, nested_vmx_secondary_ctls_high) ||
	    !vmx_control_verify(vmcs12->pin_based_vm_exec_control,
	      nested_vmx_pinbased_ctls_low, nested_vmx_pinbased_ctls_high) ||
	    !vmx_control_verify(vmcs12->vm_exit_controls,
	      nested_vmx_exit_ctls_low, nested_vmx_exit_ctls_high) ||
	    !vmx_control_verify(vmcs12->vm_entry_controls,
	      nested_vmx_entry_ctls_low, nested_vmx_entry_ctls_high))
	{
		nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
		return 1;
	}

	if (((vmcs12->host_cr0 & VMXON_CR0_ALWAYSON) != VMXON_CR0_ALWAYSON) ||
	    ((vmcs12->host_cr4 & VMXON_CR4_ALWAYSON) != VMXON_CR4_ALWAYSON)) {
		nested_vmx_failValid(vcpu,
			VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);
		return 1;
	}

	if (((vmcs12->guest_cr0 & VMXON_CR0_ALWAYSON) != VMXON_CR0_ALWAYSON) ||
	    ((vmcs12->guest_cr4 & VMXON_CR4_ALWAYSON) != VMXON_CR4_ALWAYSON)) {
		nested_vmx_entry_failure(vcpu, vmcs12,
			EXIT_REASON_INVALID_STATE, ENTRY_FAIL_DEFAULT);
		return 1;
	}
	if (vmcs12->vmcs_link_pointer != -1ull) {
		nested_vmx_entry_failure(vcpu, vmcs12,
			EXIT_REASON_INVALID_STATE, ENTRY_FAIL_VMCS_LINK_PTR);
		return 1;
	}

	/*
	 * We're finally done with prerequisite checking, and can start with
	 * the nested entry.
	 */

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	vmcs02 = nested_get_current_vmcs02(vmx);
	if (!vmcs02)
		return -ENOMEM;

	enter_guest_mode(vcpu);

	vmx->nested.vmcs01_tsc_offset = vmcs_read64(TSC_OFFSET);

	cpu = get_cpu();
	vmx->loaded_vmcs = vmcs02;
	vmx_vcpu_put(vcpu);
	vmx_vcpu_load(vcpu, cpu);
	vcpu->cpu = cpu;
	put_cpu();

	vmcs12->launch_state = 1;

	prepare_vmcs02(vcpu, vmcs12);

	/*
	 * Note no nested_vmx_succeed or nested_vmx_fail here. At this point
	 * we are no longer running L1, and VMLAUNCH/VMRESUME has not yet
	 * returned as far as L1 is concerned. It will only return (and set
	 * the success flag) when L2 exits (see nested_vmx_vmexit()).
	 */
	return 1;
}

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/*
 * On a nested exit from L2 to L1, vmcs12.guest_cr0 might not be up-to-date
 * because L2 may have changed some cr0 bits directly (CRO_GUEST_HOST_MASK).
 * This function returns the new value we should put in vmcs12.guest_cr0.
 * It's not enough to just return the vmcs02 GUEST_CR0. Rather,
 *  1. Bits that neither L0 nor L1 trapped, were set directly by L2 and are now
 *     available in vmcs02 GUEST_CR0. (Note: It's enough to check that L0
 *     didn't trap the bit, because if L1 did, so would L0).
 *  2. Bits that L1 asked to trap (and therefore L0 also did) could not have
 *     been modified by L2, and L1 knows it. So just leave the old value of
 *     the bit from vmcs12.guest_cr0. Note that the bit from vmcs02 GUEST_CR0
 *     isn't relevant, because if L0 traps this bit it can set it to anything.
 *  3. Bits that L1 didn't trap, but L0 did. L1 believes the guest could have
 *     changed these bits, and therefore they need to be updated, but L0
 *     didn't necessarily allow them to be changed in GUEST_CR0 - and rather
 *     put them in vmcs02 CR0_READ_SHADOW. So take these bits from there.
 */
static inline unsigned long
vmcs12_guest_cr0(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
{
	return
	/*1*/	(vmcs_readl(GUEST_CR0) & vcpu->arch.cr0_guest_owned_bits) |
	/*2*/	(vmcs12->guest_cr0 & vmcs12->cr0_guest_host_mask) |
	/*3*/	(vmcs_readl(CR0_READ_SHADOW) & ~(vmcs12->cr0_guest_host_mask |
			vcpu->arch.cr0_guest_owned_bits));
}

static inline unsigned long
vmcs12_guest_cr4(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
{
	return
	/*1*/	(vmcs_readl(GUEST_CR4) & vcpu->arch.cr4_guest_owned_bits) |
	/*2*/	(vmcs12->guest_cr4 & vmcs12->cr4_guest_host_mask) |
	/*3*/	(vmcs_readl(CR4_READ_SHADOW) & ~(vmcs12->cr4_guest_host_mask |
			vcpu->arch.cr4_guest_owned_bits));
}

/*
 * prepare_vmcs12 is part of what we need to do when the nested L2 guest exits
 * and we want to prepare to run its L1 parent. L1 keeps a vmcs for L2 (vmcs12),
 * and this function updates it to reflect the changes to the guest state while
 * L2 was running (and perhaps made some exits which were handled directly by L0
 * without going back to L1), and to reflect the exit reason.
 * Note that we do not have to copy here all VMCS fields, just those that
 * could have changed by the L2 guest or the exit - i.e., the guest-state and
 * exit-information fields only. Other fields are modified by L1 with VMWRITE,
 * which already writes to vmcs12 directly.
 */
void prepare_vmcs12(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
{
	/* update guest state fields: */
	vmcs12->guest_cr0 = vmcs12_guest_cr0(vcpu, vmcs12);
	vmcs12->guest_cr4 = vmcs12_guest_cr4(vcpu, vmcs12);

	kvm_get_dr(vcpu, 7, (unsigned long *)&vmcs12->guest_dr7);
	vmcs12->guest_rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
	vmcs12->guest_rip = kvm_register_read(vcpu, VCPU_REGS_RIP);
	vmcs12->guest_rflags = vmcs_readl(GUEST_RFLAGS);

	vmcs12->guest_es_selector = vmcs_read16(GUEST_ES_SELECTOR);
	vmcs12->guest_cs_selector = vmcs_read16(GUEST_CS_SELECTOR);
	vmcs12->guest_ss_selector = vmcs_read16(GUEST_SS_SELECTOR);
	vmcs12->guest_ds_selector = vmcs_read16(GUEST_DS_SELECTOR);
	vmcs12->guest_fs_selector = vmcs_read16(GUEST_FS_SELECTOR);
	vmcs12->guest_gs_selector = vmcs_read16(GUEST_GS_SELECTOR);
	vmcs12->guest_ldtr_selector = vmcs_read16(GUEST_LDTR_SELECTOR);
	vmcs12->guest_tr_selector = vmcs_read16(GUEST_TR_SELECTOR);
	vmcs12->guest_es_limit = vmcs_read32(GUEST_ES_LIMIT);
	vmcs12->guest_cs_limit = vmcs_read32(GUEST_CS_LIMIT);
	vmcs12->guest_ss_limit = vmcs_read32(GUEST_SS_LIMIT);
	vmcs12->guest_ds_limit = vmcs_read32(GUEST_DS_LIMIT);
	vmcs12->guest_fs_limit = vmcs_read32(GUEST_FS_LIMIT);
	vmcs12->guest_gs_limit = vmcs_read32(GUEST_GS_LIMIT);
	vmcs12->guest_ldtr_limit = vmcs_read32(GUEST_LDTR_LIMIT);
	vmcs12->guest_tr_limit = vmcs_read32(GUEST_TR_LIMIT);
	vmcs12->guest_gdtr_limit = vmcs_read32(GUEST_GDTR_LIMIT);
	vmcs12->guest_idtr_limit = vmcs_read32(GUEST_IDTR_LIMIT);
	vmcs12->guest_es_ar_bytes = vmcs_read32(GUEST_ES_AR_BYTES);
	vmcs12->guest_cs_ar_bytes = vmcs_read32(GUEST_CS_AR_BYTES);
	vmcs12->guest_ss_ar_bytes = vmcs_read32(GUEST_SS_AR_BYTES);
	vmcs12->guest_ds_ar_bytes = vmcs_read32(GUEST_DS_AR_BYTES);
	vmcs12->guest_fs_ar_bytes = vmcs_read32(GUEST_FS_AR_BYTES);
	vmcs12->guest_gs_ar_bytes = vmcs_read32(GUEST_GS_AR_BYTES);
	vmcs12->guest_ldtr_ar_bytes = vmcs_read32(GUEST_LDTR_AR_BYTES);
	vmcs12->guest_tr_ar_bytes = vmcs_read32(GUEST_TR_AR_BYTES);
	vmcs12->guest_es_base = vmcs_readl(GUEST_ES_BASE);
	vmcs12->guest_cs_base = vmcs_readl(GUEST_CS_BASE);
	vmcs12->guest_ss_base = vmcs_readl(GUEST_SS_BASE);
	vmcs12->guest_ds_base = vmcs_readl(GUEST_DS_BASE);
	vmcs12->guest_fs_base = vmcs_readl(GUEST_FS_BASE);
	vmcs12->guest_gs_base = vmcs_readl(GUEST_GS_BASE);
	vmcs12->guest_ldtr_base = vmcs_readl(GUEST_LDTR_BASE);
	vmcs12->guest_tr_base = vmcs_readl(GUEST_TR_BASE);
	vmcs12->guest_gdtr_base = vmcs_readl(GUEST_GDTR_BASE);
	vmcs12->guest_idtr_base = vmcs_readl(GUEST_IDTR_BASE);

	vmcs12->guest_activity_state = vmcs_read32(GUEST_ACTIVITY_STATE);
	vmcs12->guest_interruptibility_info =
		vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
	vmcs12->guest_pending_dbg_exceptions =
		vmcs_readl(GUEST_PENDING_DBG_EXCEPTIONS);

	/* TODO: These cannot have changed unless we have MSR bitmaps and
	 * the relevant bit asks not to trap the change */
	vmcs12->guest_ia32_debugctl = vmcs_read64(GUEST_IA32_DEBUGCTL);
	if (vmcs12->vm_entry_controls & VM_EXIT_SAVE_IA32_PAT)
		vmcs12->guest_ia32_pat = vmcs_read64(GUEST_IA32_PAT);
	vmcs12->guest_sysenter_cs = vmcs_read32(GUEST_SYSENTER_CS);
	vmcs12->guest_sysenter_esp = vmcs_readl(GUEST_SYSENTER_ESP);
	vmcs12->guest_sysenter_eip = vmcs_readl(GUEST_SYSENTER_EIP);

	/* update exit information fields: */

	vmcs12->vm_exit_reason  = vmcs_read32(VM_EXIT_REASON);
	vmcs12->exit_qualification = vmcs_readl(EXIT_QUALIFICATION);

	vmcs12->vm_exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
	vmcs12->vm_exit_intr_error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
	vmcs12->idt_vectoring_info_field =
		vmcs_read32(IDT_VECTORING_INFO_FIELD);
	vmcs12->idt_vectoring_error_code =
		vmcs_read32(IDT_VECTORING_ERROR_CODE);
	vmcs12->vm_exit_instruction_len = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
	vmcs12->vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);

	/* clear vm-entry fields which are to be cleared on exit */
	if (!(vmcs12->vm_exit_reason & VMX_EXIT_REASONS_FAILED_VMENTRY))
		vmcs12->vm_entry_intr_info_field &= ~INTR_INFO_VALID_MASK;
}

/*
 * A part of what we need to when the nested L2 guest exits and we want to
 * run its L1 parent, is to reset L1's guest state to the host state specified
 * in vmcs12.
 * This function is to be called not only on normal nested exit, but also on
 * a nested entry failure, as explained in Intel's spec, 3B.23.7 ("VM-Entry
 * Failures During or After Loading Guest State").
 * This function should be called when the active VMCS is L1's (vmcs01).
 */
void load_vmcs12_host_state(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
{
	if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_EFER)
		vcpu->arch.efer = vmcs12->host_ia32_efer;
	if (vmcs12->vm_exit_controls & VM_EXIT_HOST_ADDR_SPACE_SIZE)
		vcpu->arch.efer |= (EFER_LMA | EFER_LME);
	else
		vcpu->arch.efer &= ~(EFER_LMA | EFER_LME);
	vmx_set_efer(vcpu, vcpu->arch.efer);

	kvm_register_write(vcpu, VCPU_REGS_RSP, vmcs12->host_rsp);
	kvm_register_write(vcpu, VCPU_REGS_RIP, vmcs12->host_rip);
	/*
	 * Note that calling vmx_set_cr0 is important, even if cr0 hasn't
	 * actually changed, because it depends on the current state of
	 * fpu_active (which may have changed).
	 * Note that vmx_set_cr0 refers to efer set above.
	 */
	kvm_set_cr0(vcpu, vmcs12->host_cr0);
	/*
	 * If we did fpu_activate()/fpu_deactivate() during L2's run, we need
	 * to apply the same changes to L1's vmcs. We just set cr0 correctly,
	 * but we also need to update cr0_guest_host_mask and exception_bitmap.
	 */
	update_exception_bitmap(vcpu);
	vcpu->arch.cr0_guest_owned_bits = (vcpu->fpu_active ? X86_CR0_TS : 0);
	vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);

	/*
	 * Note that CR4_GUEST_HOST_MASK is already set in the original vmcs01
	 * (KVM doesn't change it)- no reason to call set_cr4_guest_host_mask();
	 */
	vcpu->arch.cr4_guest_owned_bits = ~vmcs_readl(CR4_GUEST_HOST_MASK);
	kvm_set_cr4(vcpu, vmcs12->host_cr4);

	/* shadow page tables on either EPT or shadow page tables */
	kvm_set_cr3(vcpu, vmcs12->host_cr3);
	kvm_mmu_reset_context(vcpu);

	if (enable_vpid) {
		/*
		 * Trivially support vpid by letting L2s share their parent
		 * L1's vpid. TODO: move to a more elaborate solution, giving
		 * each L2 its own vpid and exposing the vpid feature to L1.
		 */
		vmx_flush_tlb(vcpu);
	}


	vmcs_write32(GUEST_SYSENTER_CS, vmcs12->host_ia32_sysenter_cs);
	vmcs_writel(GUEST_SYSENTER_ESP, vmcs12->host_ia32_sysenter_esp);
	vmcs_writel(GUEST_SYSENTER_EIP, vmcs12->host_ia32_sysenter_eip);
	vmcs_writel(GUEST_IDTR_BASE, vmcs12->host_idtr_base);
	vmcs_writel(GUEST_GDTR_BASE, vmcs12->host_gdtr_base);
	vmcs_writel(GUEST_TR_BASE, vmcs12->host_tr_base);
	vmcs_writel(GUEST_GS_BASE, vmcs12->host_gs_base);
	vmcs_writel(GUEST_FS_BASE, vmcs12->host_fs_base);
	vmcs_write16(GUEST_ES_SELECTOR, vmcs12->host_es_selector);
	vmcs_write16(GUEST_CS_SELECTOR, vmcs12->host_cs_selector);
	vmcs_write16(GUEST_SS_SELECTOR, vmcs12->host_ss_selector);
	vmcs_write16(GUEST_DS_SELECTOR, vmcs12->host_ds_selector);
	vmcs_write16(GUEST_FS_SELECTOR, vmcs12->host_fs_selector);
	vmcs_write16(GUEST_GS_SELECTOR, vmcs12->host_gs_selector);
	vmcs_write16(GUEST_TR_SELECTOR, vmcs12->host_tr_selector);

	if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PAT)
		vmcs_write64(GUEST_IA32_PAT, vmcs12->host_ia32_pat);
	if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL)
		vmcs_write64(GUEST_IA32_PERF_GLOBAL_CTRL,
			vmcs12->host_ia32_perf_global_ctrl);
}

/*
 * Emulate an exit from nested guest (L2) to L1, i.e., prepare to run L1
 * and modify vmcs12 to make it see what it would expect to see there if
 * L2 was its real guest. Must only be called when in L2 (is_guest_mode())
 */
static void nested_vmx_vmexit(struct kvm_vcpu *vcpu)
{
	struct vcpu_vmx *vmx = to_vmx(vcpu);
	int cpu;
	struct vmcs12 *vmcs12 = get_vmcs12(vcpu);

	leave_guest_mode(vcpu);
	prepare_vmcs12(vcpu, vmcs12);

	cpu = get_cpu();
	vmx->loaded_vmcs = &vmx->vmcs01;
	vmx_vcpu_put(vcpu);
	vmx_vcpu_load(vcpu, cpu);
	vcpu->cpu = cpu;
	put_cpu();

	/* if no vmcs02 cache requested, remove the one we used */
	if (VMCS02_POOL_SIZE == 0)
		nested_free_vmcs02(vmx, vmx->nested.current_vmptr);

	load_vmcs12_host_state(vcpu, vmcs12);

7174
	/* Update TSC_OFFSET if TSC was changed while L2 ran */
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	vmcs_write64(TSC_OFFSET, vmx->nested.vmcs01_tsc_offset);

	/* This is needed for same reason as it was needed in prepare_vmcs02 */
	vmx->host_rsp = 0;

	/* Unpin physical memory we referred to in vmcs02 */
	if (vmx->nested.apic_access_page) {
		nested_release_page(vmx->nested.apic_access_page);
		vmx->nested.apic_access_page = 0;
	}

	/*
	 * Exiting from L2 to L1, we're now back to L1 which thinks it just
	 * finished a VMLAUNCH or VMRESUME instruction, so we need to set the
	 * success or failure flag accordingly.
	 */
	if (unlikely(vmx->fail)) {
		vmx->fail = 0;
		nested_vmx_failValid(vcpu, vmcs_read32(VM_INSTRUCTION_ERROR));
	} else
		nested_vmx_succeed(vcpu);
}

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/*
 * L1's failure to enter L2 is a subset of a normal exit, as explained in
 * 23.7 "VM-entry failures during or after loading guest state" (this also
 * lists the acceptable exit-reason and exit-qualification parameters).
 * It should only be called before L2 actually succeeded to run, and when
 * vmcs01 is current (it doesn't leave_guest_mode() or switch vmcss).
 */
static void nested_vmx_entry_failure(struct kvm_vcpu *vcpu,
			struct vmcs12 *vmcs12,
			u32 reason, unsigned long qualification)
{
	load_vmcs12_host_state(vcpu, vmcs12);
	vmcs12->vm_exit_reason = reason | VMX_EXIT_REASONS_FAILED_VMENTRY;
	vmcs12->exit_qualification = qualification;
	nested_vmx_succeed(vcpu);
}

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static int vmx_check_intercept(struct kvm_vcpu *vcpu,
			       struct x86_instruction_info *info,
			       enum x86_intercept_stage stage)
{
	return X86EMUL_CONTINUE;
}

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static struct kvm_x86_ops vmx_x86_ops = {
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	.cpu_has_kvm_support = cpu_has_kvm_support,
	.disabled_by_bios = vmx_disabled_by_bios,
	.hardware_setup = hardware_setup,
	.hardware_unsetup = hardware_unsetup,
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	.check_processor_compatibility = vmx_check_processor_compat,
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	.hardware_enable = hardware_enable,
	.hardware_disable = hardware_disable,
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	.cpu_has_accelerated_tpr = report_flexpriority,
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	.vcpu_create = vmx_create_vcpu,
	.vcpu_free = vmx_free_vcpu,
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	.vcpu_reset = vmx_vcpu_reset,
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	.prepare_guest_switch = vmx_save_host_state,
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	.vcpu_load = vmx_vcpu_load,
	.vcpu_put = vmx_vcpu_put,

	.set_guest_debug = set_guest_debug,
	.get_msr = vmx_get_msr,
	.set_msr = vmx_set_msr,
	.get_segment_base = vmx_get_segment_base,
	.get_segment = vmx_get_segment,
	.set_segment = vmx_set_segment,
7246
	.get_cpl = vmx_get_cpl,
A
Avi Kivity 已提交
7247
	.get_cs_db_l_bits = vmx_get_cs_db_l_bits,
7248
	.decache_cr0_guest_bits = vmx_decache_cr0_guest_bits,
7249
	.decache_cr3 = vmx_decache_cr3,
7250
	.decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
A
Avi Kivity 已提交
7251 7252 7253 7254 7255 7256 7257 7258
	.set_cr0 = vmx_set_cr0,
	.set_cr3 = vmx_set_cr3,
	.set_cr4 = vmx_set_cr4,
	.set_efer = vmx_set_efer,
	.get_idt = vmx_get_idt,
	.set_idt = vmx_set_idt,
	.get_gdt = vmx_get_gdt,
	.set_gdt = vmx_set_gdt,
7259
	.set_dr7 = vmx_set_dr7,
7260
	.cache_reg = vmx_cache_reg,
A
Avi Kivity 已提交
7261 7262
	.get_rflags = vmx_get_rflags,
	.set_rflags = vmx_set_rflags,
7263
	.fpu_activate = vmx_fpu_activate,
7264
	.fpu_deactivate = vmx_fpu_deactivate,
A
Avi Kivity 已提交
7265 7266 7267 7268

	.tlb_flush = vmx_flush_tlb,

	.run = vmx_vcpu_run,
7269
	.handle_exit = vmx_handle_exit,
A
Avi Kivity 已提交
7270
	.skip_emulated_instruction = skip_emulated_instruction,
7271 7272
	.set_interrupt_shadow = vmx_set_interrupt_shadow,
	.get_interrupt_shadow = vmx_get_interrupt_shadow,
I
Ingo Molnar 已提交
7273
	.patch_hypercall = vmx_patch_hypercall,
E
Eddie Dong 已提交
7274
	.set_irq = vmx_inject_irq,
7275
	.set_nmi = vmx_inject_nmi,
7276
	.queue_exception = vmx_queue_exception,
A
Avi Kivity 已提交
7277
	.cancel_injection = vmx_cancel_injection,
7278
	.interrupt_allowed = vmx_interrupt_allowed,
7279
	.nmi_allowed = vmx_nmi_allowed,
J
Jan Kiszka 已提交
7280 7281
	.get_nmi_mask = vmx_get_nmi_mask,
	.set_nmi_mask = vmx_set_nmi_mask,
7282 7283 7284 7285
	.enable_nmi_window = enable_nmi_window,
	.enable_irq_window = enable_irq_window,
	.update_cr8_intercept = update_cr8_intercept,

7286
	.set_tss_addr = vmx_set_tss_addr,
7287
	.get_tdp_level = get_ept_level,
7288
	.get_mt_mask = vmx_get_mt_mask,
7289

7290 7291
	.get_exit_info = vmx_get_exit_info,

7292
	.get_lpage_level = vmx_get_lpage_level,
7293 7294

	.cpuid_update = vmx_cpuid_update,
7295 7296

	.rdtscp_supported = vmx_rdtscp_supported,
7297
	.invpcid_supported = vmx_invpcid_supported,
7298 7299

	.set_supported_cpuid = vmx_set_supported_cpuid,
7300 7301

	.has_wbinvd_exit = cpu_has_vmx_wbinvd_exit,
7302

7303
	.set_tsc_khz = vmx_set_tsc_khz,
7304
	.write_tsc_offset = vmx_write_tsc_offset,
Z
Zachary Amsden 已提交
7305
	.adjust_tsc_offset = vmx_adjust_tsc_offset,
7306
	.compute_tsc_offset = vmx_compute_tsc_offset,
N
Nadav Har'El 已提交
7307
	.read_l1_tsc = vmx_read_l1_tsc,
7308 7309

	.set_tdp_cr3 = vmx_set_cr3,
7310 7311

	.check_intercept = vmx_check_intercept,
A
Avi Kivity 已提交
7312 7313 7314 7315
};

static int __init vmx_init(void)
{
7316 7317 7318 7319 7320 7321
	int r, i;

	rdmsrl_safe(MSR_EFER, &host_efer);

	for (i = 0; i < NR_VMX_MSR; ++i)
		kvm_define_shared_msr(i, vmx_msr_index[i]);
7322

7323
	vmx_io_bitmap_a = (unsigned long *)__get_free_page(GFP_KERNEL);
7324 7325 7326
	if (!vmx_io_bitmap_a)
		return -ENOMEM;

G
Guo Chao 已提交
7327 7328
	r = -ENOMEM;

7329
	vmx_io_bitmap_b = (unsigned long *)__get_free_page(GFP_KERNEL);
G
Guo Chao 已提交
7330
	if (!vmx_io_bitmap_b)
7331 7332
		goto out;

7333
	vmx_msr_bitmap_legacy = (unsigned long *)__get_free_page(GFP_KERNEL);
G
Guo Chao 已提交
7334
	if (!vmx_msr_bitmap_legacy)
S
Sheng Yang 已提交
7335
		goto out1;
G
Guo Chao 已提交
7336

S
Sheng Yang 已提交
7337

7338
	vmx_msr_bitmap_longmode = (unsigned long *)__get_free_page(GFP_KERNEL);
G
Guo Chao 已提交
7339
	if (!vmx_msr_bitmap_longmode)
7340
		goto out2;
G
Guo Chao 已提交
7341

7342

7343 7344 7345 7346
	/*
	 * Allow direct access to the PC debug port (it is often used for I/O
	 * delays, but the vmexits simply slow things down).
	 */
7347 7348
	memset(vmx_io_bitmap_a, 0xff, PAGE_SIZE);
	clear_bit(0x80, vmx_io_bitmap_a);
7349

7350
	memset(vmx_io_bitmap_b, 0xff, PAGE_SIZE);
7351

7352 7353
	memset(vmx_msr_bitmap_legacy, 0xff, PAGE_SIZE);
	memset(vmx_msr_bitmap_longmode, 0xff, PAGE_SIZE);
S
Sheng Yang 已提交
7354

7355 7356
	set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */

7357 7358
	r = kvm_init(&vmx_x86_ops, sizeof(struct vcpu_vmx),
		     __alignof__(struct vcpu_vmx), THIS_MODULE);
7359
	if (r)
7360
		goto out3;
S
Sheng Yang 已提交
7361

7362 7363 7364 7365 7366 7367
	vmx_disable_intercept_for_msr(MSR_FS_BASE, false);
	vmx_disable_intercept_for_msr(MSR_GS_BASE, false);
	vmx_disable_intercept_for_msr(MSR_KERNEL_GS_BASE, true);
	vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_CS, false);
	vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_ESP, false);
	vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_EIP, false);
7368

7369
	if (enable_ept) {
7370 7371 7372 7373
		kvm_mmu_set_mask_ptes(0ull,
			(enable_ept_ad_bits) ? VMX_EPT_ACCESS_BIT : 0ull,
			(enable_ept_ad_bits) ? VMX_EPT_DIRTY_BIT : 0ull,
			0ull, VMX_EPT_EXECUTABLE_MASK);
7374
		ept_set_mmio_spte_mask();
7375 7376 7377
		kvm_enable_tdp();
	} else
		kvm_disable_tdp();
7378

7379 7380
	return 0;

7381 7382
out3:
	free_page((unsigned long)vmx_msr_bitmap_longmode);
S
Sheng Yang 已提交
7383
out2:
7384
	free_page((unsigned long)vmx_msr_bitmap_legacy);
7385
out1:
7386
	free_page((unsigned long)vmx_io_bitmap_b);
7387
out:
7388
	free_page((unsigned long)vmx_io_bitmap_a);
7389
	return r;
A
Avi Kivity 已提交
7390 7391 7392 7393
}

static void __exit vmx_exit(void)
{
7394 7395
	free_page((unsigned long)vmx_msr_bitmap_legacy);
	free_page((unsigned long)vmx_msr_bitmap_longmode);
7396 7397
	free_page((unsigned long)vmx_io_bitmap_b);
	free_page((unsigned long)vmx_io_bitmap_a);
7398

7399
	kvm_exit();
A
Avi Kivity 已提交
7400 7401 7402 7403
}

module_init(vmx_init)
module_exit(vmx_exit)